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1352 Commits

Author SHA1 Message Date
Philipp Scheff
89fbb02979 add as_mut 2023-06-22 17:49:33 +02:00
Philipp Scheff
5ecf9ec7bc split can 2023-06-22 17:17:51 +02:00
JuliDi
78736328a0
update docs and update to new dma interface 2023-06-22 10:44:08 +02:00
JuliDi
8d0095c618
add option to enable/disable complete transfer interrupt 2023-06-22 10:43:45 +02:00
xoviat
1f2be2dac5
Merge pull request #1569 from xoviat/tl-mbox-2 
wpan: misc. cleanup and add mac
 2023-06-21 21:50:12 +00:00
JuliDi
fdb3c3d6ff
Merge remote-tracking branch 'upstream/main' 2023-06-21 11:52:53 +02:00
Dario Nieuwenhuis
2e625138ff
Merge pull request #1501 from xoviat/can 
async can
 2023-06-20 22:57:31 +00:00
xoviat
ca21027eea
Merge pull request #3 from schphil/can 
fix extended can id
 2023-06-20 17:45:28 -05:00
xoviat
0a551eb7c6 stm32/can: fix time 2023-06-20 17:39:00 -05:00
xoviat
0d67ef795e Merge branch 'main' of https://github.com/embassy-rs/embassy into tl-mbox-2 2023-06-19 21:18:46 -05:00
xoviat
0998221478 stm32/can: update interrupts 2023-06-19 16:05:59 -05:00
Dario Nieuwenhuis
428a4ba3f9 stm32/gpdma: clear all interrupts after reset. 
Reset doesn't clear them, this causes subsequent transfers to instantly
complete because the TC flag was set from before.
 2023-06-19 23:03:31 +02:00
xoviat
aaad906815 Merge branch 'main' of https://github.com/embassy-rs/embassy into can 2023-06-19 15:52:33 -05:00
JuliDi
56ab6d9f14
remove write_X variants 2023-06-19 13:54:22 +02:00
JuliDi
88052480b1
fix typo, minor cleanup 2023-06-19 13:50:17 +02:00
JuliDi
218b102b28
remove Alignment and make Value and Value array look the same 2023-06-19 13:46:17 +02:00
JuliDi
fe7b72948a
add ValueArray type and respective write functions 2023-06-19 13:42:25 +02:00
Dario Nieuwenhuis
3c70f799a2
Merge pull request #1572 from whitequark/bdma-blocking_wait-stop 
BDMA: request stop after busy loop in blocking_wait()
 2023-06-19 09:55:07 +00:00
JuliDi
e0747e937f
remove unsafe for circular dma reg access 2023-06-19 11:15:09 +02:00
JuliDi
320e2cf35b
Merge branch 'main' of github.com:embassy-rs/embassy 2023-06-19 11:14:48 +02:00
Catherine
bbc81146ec BDMA: request stop after busy loop in blocking_wait(). 
Otherwise the channel cannot be used again, since CR.EN remains set
and the DMA channel registers are read-only while it is set.
 2023-06-19 09:06:41 +00:00
Dario Nieuwenhuis
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
JuliDi
f8ee33abb9
add half transfer interrupt and circular dma 2023-06-18 18:51:36 +02:00
xoviat
748d1ea89d stm32/ipcc: minor cleanup 2023-06-18 10:10:05 -05:00
Dario Nieuwenhuis
adaed307b4
Merge pull request #1561 from petegibson/stm32-buffereduart-int-flags-fix 
Ensure idle & ove flags are cleared in BufferedUart ISR on STM32
 2023-06-18 10:40:22 +00:00
Peter Gibson
b4f96e192c Don't read data register to clear flags on usart v3 ^& v4 2023-06-18 08:45:58 +10:00
xoviat
ae83e6f536
Merge pull request #1566 from xoviat/tl-mbox-2 
tl-mbox: switch to new ipcc mechanism
 2023-06-17 20:48:37 +00:00
xoviat
6b5d55eb29 stm32/wpan: convert to new ipcc 2023-06-17 12:00:33 -05:00
xoviat
4c9b7befaa stm32/ipcc: add clear debug 2023-06-17 10:50:06 -05:00
JuliDi
78a2ca8a0e
remove unnecessary use, disable DAC and DMA after transfer 2023-06-17 11:51:57 +02:00
JuliDi
f5d084552d
implement mwe of a DMA write() method for DAC 2023-06-17 11:48:21 +02:00
Dario Nieuwenhuis
ec36225f8a
Merge pull request #1560 from kevswims/feature/stm32g4-pll-enhancements 
Feature/stm32g4 pll enhancements - Add PLL support for the P and Q outputs for G4 series chips
 2023-06-16 16:06:50 +00:00
Philipp Scheff
f6c1108bdf fix extended can id 2023-06-16 14:56:28 +02:00
Peter Gibson
d236f3dbf9 actually fix formatting 2023-06-15 18:35:58 +10:00
Peter Gibson
d23717904b fix formatting 2023-06-15 18:33:01 +10:00
Peter Gibson
837950cd74 ensure DR is read to clear idle/overflow interrupt when they occur independently of the rxne 2023-06-15 13:24:49 +10:00
Kevin Lannen
c94ba84892 stm32g4: PLL: Add support for configuring PLL_P and PLL_Q 2023-06-14 10:44:51 -06:00
goueslati
2d89cfb18f fix merge conflict 2023-06-12 14:27:53 +01:00
goueslati
ca8957da43 stm32/ipcc: move tl_mbox into embassy-stm32-wpan 2023-06-12 12:27:51 +01:00
Dario Nieuwenhuis
98c821ac39 Remove embassy-cortex-m crate, move stuff to embassy-hal-common. 2023-06-09 16:44:20 +02:00
Dario Nieuwenhuis
dc8e34420f Remove executor dep+reexports from HALs. 
Closes #1547
 2023-06-09 16:29:45 +02:00
Carl St-Laurent
8ddeaddc67
Rename to follow ref manual and CubeIDE 2023-06-08 20:46:48 -04:00
Carl St-Laurent
0915fb73b2
Merge branch 'master' into stm32g4-pll 2023-06-08 20:43:14 -04:00
Dario Nieuwenhuis
8c93805ab5 Add rt feature to HALs, cfg out interrupt handling when not set. 2023-06-08 18:57:03 +02:00
Dario Nieuwenhuis
5c2f02c735 Reexport NVIC_PRIO_BITS at HAL root. 
This allows using RTIC with `#[rtic::app(device = embassy_nrf, ...)]`
 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
bce24e8005 asdg 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
921780e6bf Make interrupt module more standard. 
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.

This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
  - It works with `cortex-m` functions for manipulating interrupts, for example.
  - It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
 2023-06-08 18:00:48 +02:00
goueslati
ce1d72c609 wip 2023-06-08 16:26:47 +01:00
ExplodingWaffle
a4b8fc420a Replace Into<bool> for Level with From<Level> for bool 2023-06-05 01:37:56 +01:00
Carl St-Laurent
4185c10bf8
Cleanup 2023-06-04 12:09:03 -04:00
Carl St-Laurent
ade46489f1
Added Vcore boost mode and Flash wait state 2023-06-04 11:57:42 -04:00
Carl St-Laurent
6fe853a7d3
Better comments 2023-06-04 10:58:44 -04:00
Carl St-Laurent
2f269f3256
stm32/rcc: Implement basic PLL support for STM32G4 series 2023-06-03 22:05:24 -04:00
gak
3539dd7d4c
Fix #1528 HS USB on STM32F7 2023-06-03 07:00:31 +10:00
Dario Nieuwenhuis
404aa29289 cortex-m: remove owned interrupts. 2023-06-01 03:25:19 +02:00
Dario Nieuwenhuis
7fcded5705 stm32/rtc: fix build failure in some L4s 2023-05-31 20:03:52 +02:00
xoviat
35083b262b
Merge branch 'main' into can 2023-05-30 21:15:26 -05:00
xoviat
16bfbd4e99 stm32/can: add hw test and cleanup 2023-05-30 21:14:25 -05:00
xoviat
f8d35806dc stm32/can: move to irq binding use embassy channel 2023-05-29 19:09:52 -05:00
xoviat
da0be7114f stm32/uart: fix dma ringbuf tests 2023-05-29 15:14:43 -05:00
xoviat
68441a74c2 Merge branch 'main' of https://github.com/embassy-rs/embassy into uart 2023-05-29 15:07:21 -05:00
xoviat
aba0f8fd6c stm32/uart: refactor rx ringbuffer 
- remove some race conditions
- allow full use of rx buffer
 2023-05-29 14:49:43 -05:00
Dario Nieuwenhuis
46961cfdf7 Fix tests. 2023-05-29 19:46:28 +02:00
bors[bot]
bab03a3927
Merge #1489 #1500 
1489: stm32/ipcc: make IPCC methods static r=xoviat a=OueslatiGhaith



1500: stm32/tests: disable sdmmc test for now r=xoviat a=xoviat



Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-29 14:42:51 +00:00
xoviat
403cbb1dc9 Merge commit '8d7abeb06fbe3e19db3cae3f5220725969ecbb81' of https://github.com/Lytehorse/embassy into can 2023-05-29 09:40:37 -05:00
xoviat
37e104a6b3 stm32/ipcc: refactor tl_mbox 2023-05-27 15:05:23 -05:00
xoviat
7e501855fc stm32/ipcc: move into tl_mbox 2023-05-27 15:05:07 -05:00
xoviat
c19967dcf2 stm32/ipcc: extract tl_mbox linker file to embassy-stm32 2023-05-27 15:03:25 -05:00
Dario Nieuwenhuis
bea42a78a4
Merge pull request #1468 from rmja/assume-noise-free 
Add assume_noise_free to usart configuration
 2023-05-27 00:23:56 +02:00
Rasmus Melchior Jacobsen
cb5df138d6 Use found divider instead of re-reading brr 2023-05-26 23:48:49 +02:00
Rasmus Melchior Jacobsen
fee89ed7c7 Remove ability to set alt layout - it does not work. 2023-05-26 15:41:08 +02:00
goueslati
66304a102d Revert "Merge branch 'tl_mbox' into ipcc" 
This reverts commit 859e539f85, reversing
changes made to 984cd47b41.
 2023-05-26 11:26:58 +01:00
Ghaith Oueslati
859e539f85
Merge branch 'tl_mbox' into ipcc 2023-05-26 11:24:08 +01:00
goueslati
2ccf9f3abd stm32/ipcc: static methods for IPCC 2023-05-26 09:56:55 +01:00
bors[bot]
31b364b9b0
Merge #1480 
1480: stm32: Async flash support for F4 r=rmja a=rmja

This PR depends on https://github.com/embassy-rs/embassy/pull/1478.

It adds async write/erase operations to the F4 series based on the work in https://github.com/embassy-rs/embassy/pull/870 but aligned to the new flash regions.

If one considers the entire `Flash` then nothing has changed other than the async operations have been added.



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
 2023-05-26 08:21:57 +00:00
Rasmus Melchior Jacobsen
d82ba4af8a WHY does format on save not work 2023-05-26 00:35:53 +02:00
Rasmus Melchior Jacobsen
35d8edbc41 nightly guard async traits only 2023-05-26 00:31:41 +02:00
Rasmus Melchior Jacobsen
9115431d35 Move nightly guard and clear data cache reset bit 2023-05-26 00:12:22 +02:00
Rasmus Melchior Jacobsen
e08267df54 Move new async to asynch module to guard for models without flash interrupt 2023-05-25 23:51:10 +02:00
Rasmus Melchior Jacobsen
74104aafda erase_sector_blocking -> blocking_erase_sector 2023-05-25 23:13:20 +02:00
Rasmus Melchior Jacobsen
4478d8322b Endless rustfmt pain 2023-05-25 22:58:13 +02:00
Rasmus Melchior Jacobsen
88543445d8 Fix end address for assertion 2023-05-25 22:52:57 +02:00
Rasmus Melchior Jacobsen
b50d04336e Fix merge error 2023-05-25 22:32:57 +02:00
Rasmus Melchior Jacobsen
ce331b411c Only assert_not_corrupted_read if we read from the second bank 2023-05-25 22:31:24 +02:00
Rasmus Melchior Jacobsen
8528455a75 Errata if _not_ pa12 out low 2023-05-25 22:20:05 +02:00
bors[bot]
d28dc08f09
Merge #1486 
1486: feature(embassy-stm32): add RTC MUX selection to embassy-stm32 L4 family r=Dirbaio a=MathiasKoch

To select and setup LSE and/or LSI

Co-authored-by: Mathias <mk@blackbird.online>
 2023-05-25 20:13:27 +00:00
Rasmus Melchior Jacobsen
344e28360f More blocking rename 2023-05-25 22:09:28 +02:00
Rasmus Melchior Jacobsen
983f01016b Merge branch 'async-flash' of https://github.com/rmja/embassy into async-flash 2023-05-25 21:52:35 +02:00
Rasmus Melchior Jacobsen
9eca19b49d *_blocking -> blocking_* 2023-05-25 21:46:26 +02:00
Rasmus Melchior Jacobsen
860b519f99 Let Flash<Async/Blocking> be a thing 2023-05-25 21:40:54 +02:00
Mathias
181c4c5311 Add RTC MUX selection to embassy-stm32 L4 family, to select and setup LSE and/or LSI 2023-05-25 21:28:32 +02:00
Rasmus Melchior Jacobsen
18d14dff48 Handle errata 2.2.12 2023-05-25 21:14:35 +02:00
Rasmus Melchior Jacobsen
b412784a7a Add runtime checks for errata 2.2.11 2023-05-25 20:55:12 +02:00
Rasmus Melchior Jacobsen
8073bf22e9 Add sector number tests 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
e764a3d9ca Fix unused errors 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
49a31bd5d8 Simplify SR->Result 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
7371eefa86 Align with new bind_interrupt 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
15636f05f5 Actually transition to dual bank mode - key was required 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
efc71e08c4 Default to Async mode 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
bac8ad565e Remove TryLockError, 2023-05-25 20:07:42 +02:00