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ffa0c08140
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129 Commits

Author SHA1 Message Date
xoviat
ffa0c08140 stm32/dma: fix condition check 2023-07-30 20:22:14 -05:00
xoviat
c38c85ef1f stm32/dma: add traces 2023-07-30 19:39:17 -05:00
xoviat
538cf2bc24 stm32/dma: fix condition check 2023-07-30 14:02:41 -05:00
xoviat
6f30e92c7a stm32/dma: don't write to full ringbuf 2023-07-30 10:57:17 -05:00
xoviat
087e649bc2 stm32/dma: fix typos 2023-07-30 09:28:02 -05:00
xoviat
fd9b6487e1 stm32/dma: impl. wringbuf for bdma 2023-07-30 09:25:58 -05:00
xoviat
603c4cb4fa stm32/dma: complete initial ringbuf impl. 2023-07-30 09:18:33 -05:00
xoviat
8064f4bfe0 stm32/dma: add draft writable dma buf 2023-07-29 20:10:29 -05:00
xoviat
6256a6c57c fix comments 2023-07-29 19:27:16 -05:00
xoviat
bae31ebce7 stm32/dma: rename ringbuf 2023-07-29 19:25:18 -05:00
Dario Nieuwenhuis
036e6ae30c
Rename embassy-hal-common to embassy-hal-internal, document it's for internal use only. (#1700) 2023-07-28 13:23:22 +02:00
xoviat
44c8db2911
Merge pull request #1681 from alexferro/feature/stm32-dma-read-exact 
Add a STM32/DMARingBuffer::read_exact helper
 2023-07-28 01:16:48 +00:00
Alex Ferro
4883fdd154 Add a STM32/DMARingBuffer::read_exact helper 
This provides a helper function with an async implementation, that
will only return (or error) when it was able to read that many bytes,
sleeping until ready.

Additionally, corrected the documentation for Ringbuffer functions to use
"elements" instead of "bytes" as the types were already generic over the
word/element size.
 2023-07-22 17:17:01 -06:00
JuliDi
80ce6d1fb7
update DAC triggers to incorporate v3 2023-07-22 19:25:02 +02:00
Dario Nieuwenhuis
dff9bd9711 Remove trivial to remove uses of atomic-polyfill. 2023-07-12 18:30:43 +02:00
Julian
96f1525ffe
Revert changes to dma.rs 2023-06-29 09:20:25 +02:00
JuliDi
daedfbbd87
add dma is_running change doc 2023-06-28 15:39:36 +02:00
JuliDi
56dd22f0ac
feature-gate set_channel_mode, undo dma.rs changes 2023-06-27 21:23:47 +02:00
JuliDi
e7bc84dda8
fix issues when DAC2 present, add additional options to DMA (NOT YET WORKING with STM32H7A3ZI) 2023-06-26 09:42:25 +02:00
JuliDi
ea04a0277b
change dma complete transfer IR default to true 2023-06-23 12:14:26 +02:00
JuliDi
8d0095c618
add option to enable/disable complete transfer interrupt 2023-06-22 10:43:45 +02:00
JuliDi
fdb3c3d6ff
Merge remote-tracking branch 'upstream/main' 2023-06-21 11:52:53 +02:00
Dario Nieuwenhuis
428a4ba3f9 stm32/gpdma: clear all interrupts after reset. 
Reset doesn't clear them, this causes subsequent transfers to instantly
complete because the TC flag was set from before.
 2023-06-19 23:03:31 +02:00
JuliDi
88052480b1
fix typo, minor cleanup 2023-06-19 13:50:17 +02:00
Dario Nieuwenhuis
3c70f799a2
Merge pull request #1572 from whitequark/bdma-blocking_wait-stop 
BDMA: request stop after busy loop in blocking_wait()
 2023-06-19 09:55:07 +00:00
JuliDi
e0747e937f
remove unsafe for circular dma reg access 2023-06-19 11:15:09 +02:00
JuliDi
320e2cf35b
Merge branch 'main' of github.com:embassy-rs/embassy 2023-06-19 11:14:48 +02:00
Catherine
bbc81146ec BDMA: request stop after busy loop in blocking_wait(). 
Otherwise the channel cannot be used again, since CR.EN remains set
and the DMA channel registers are read-only while it is set.
 2023-06-19 09:06:41 +00:00
Dario Nieuwenhuis
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
JuliDi
f8ee33abb9
add half transfer interrupt and circular dma 2023-06-18 18:51:36 +02:00
Dario Nieuwenhuis
98c821ac39 Remove embassy-cortex-m crate, move stuff to embassy-hal-common. 2023-06-09 16:44:20 +02:00
Dario Nieuwenhuis
bce24e8005 asdg 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
921780e6bf Make interrupt module more standard. 
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.

This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
  - It works with `cortex-m` functions for manipulating interrupts, for example.
  - It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
 2023-06-08 18:00:48 +02:00
Dario Nieuwenhuis
404aa29289 cortex-m: remove owned interrupts. 2023-06-01 03:25:19 +02:00
xoviat
da0be7114f stm32/uart: fix dma ringbuf tests 2023-05-29 15:14:43 -05:00
xoviat
aba0f8fd6c stm32/uart: refactor rx ringbuffer 
- remove some race conditions
- allow full use of rx buffer
 2023-05-29 14:49:43 -05:00
Dario Nieuwenhuis
00cde67abe stm32/dma: solve overlapping impl on DmaCtrl on stm32h7 2023-05-01 23:20:51 +02:00
Dario Nieuwenhuis
96e8a7ddb9 stm32/uart: feature-gate ringbuffer out when using gpdma, not supported yet. 2023-05-01 22:43:23 +02:00
Dario Nieuwenhuis
25864ae4dc stm32/bdma: add ringbuffer support. 2023-05-01 22:42:36 +02:00
Dario Nieuwenhuis
14e0090cb1 stm32/dma: remove separate process_tcif. 2023-05-01 22:42:36 +02:00
Rasmus Melchior Jacobsen
fc268df6f5 Support overflow detection for more than one ring-period 2023-05-01 22:42:36 +02:00
Rasmus Melchior Jacobsen
49455792cb Ring-buffered uart rx with one-period overrun detection 2023-05-01 22:42:36 +02:00
Dario Nieuwenhuis
2080d8bb6d stm32/spi: add support for all word sizes. 
Co-Authored-By: anton smeenk <asmeenk@planet.nl>
 2023-04-18 20:56:23 +02:00
Dario Nieuwenhuis
efc70debb3 stm32/dma: add double buffered mode for DMA, update DCMI. 2023-04-18 16:41:24 +02:00
Dario Nieuwenhuis
173c65b543 stm32/dma: refactor. 2023-04-18 16:37:35 +02:00
Dario Nieuwenhuis
44b7fe45e2 stm32/gpdma: fix race condition when resetting channel when done. 2023-04-10 15:11:07 +02:00
Grant Miller
7be4337de9 Add #[must_use] to all futures 2023-02-24 13:01:41 -06:00
bors[bot]
f0f92909c1
Merge #1227 
1227: stm32/dma: fix spurious transfer complete interrupts r=Dirbaio a=pattop

DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
 2023-02-23 15:44:43 +00:00
Patrick Oppenlander
4e884ee2d2 stm32/dma: fix spurious transfer complete interrupts 
DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.
 2023-02-23 10:12:48 +11:00
chemicstry
a53f525f51 stm32/sdmmc: Fix SDIOv1 writes 2023-02-18 01:37:06 +02:00