embassy/embassy-stm32f4/src/serial.rs

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//! Async low power Serial.
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//!
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//! The peripheral is autmatically enabled and disabled as required to save power.
//! Lowest power consumption can only be guaranteed if the send receive futures
//! are dropped correctly (e.g. not using `mem::forget()`).
use core::future::Future;
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use core::ptr;
use core::sync::atomic::{self, Ordering};
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use embassy::interrupt::{Interrupt, InterruptExt};
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use embassy::traits::uart::{Error, Uart};
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use embassy::util::InterruptFuture;
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use crate::hal::dma;
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use crate::hal::dma::config::DmaConfig;
use crate::hal::dma::traits::{PeriAddress, Stream};
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use crate::hal::dma::{MemoryToPeripheral, PeripheralToMemory, Transfer};
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use crate::hal::rcc::Clocks;
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use crate::hal::serial;
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use crate::hal::serial::config::{Config as SerialConfig, DmaConfig as SerialDmaConfig};
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use crate::hal::serial::Pins;
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use crate::hal::serial::{Event as SerialEvent, Serial as HalSerial};
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use crate::interrupt;
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use crate::pac;
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/// Interface to the Serial peripheral
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pub struct Serial<
USART: PeriAddress<MemSize = u8>,
TSTREAM: Stream,
RSTREAM: Stream,
CHANNEL: dma::traits::Channel,
TINT: Interrupt,
RINT: Interrupt,
UINT: Interrupt,
> {
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tx_stream: Option<TSTREAM>,
rx_stream: Option<RSTREAM>,
usart: Option<USART>,
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tx_int: TINT,
rx_int: RINT,
usart_int: UINT,
channel: core::marker::PhantomData<CHANNEL>,
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}
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// static mut INSTANCE: *const Serial<USART1, Stream7<DMA2>, Stream2<DMA2>> = ptr::null_mut();
impl<USART, TSTREAM, RSTREAM, CHANNEL, TINT, RINT, UINT>
Serial<USART, TSTREAM, RSTREAM, CHANNEL, TINT, RINT, UINT>
where
USART: serial::Instance
+ dma::traits::PeriAddress<MemSize = u8>
+ dma::traits::DMASet<TSTREAM, CHANNEL, MemoryToPeripheral>
+ dma::traits::DMASet<RSTREAM, CHANNEL, PeripheralToMemory>
+ WithInterrupt<Instance = UINT>,
TSTREAM: Stream + WithInterrupt<Instance = TINT>,
RSTREAM: Stream + WithInterrupt<Instance = RINT>,
CHANNEL: dma::traits::Channel,
TINT: Interrupt,
RINT: Interrupt,
UINT: Interrupt,
{
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// Leaking futures is forbidden!
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pub unsafe fn new<PINS>(
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usart: USART,
streams: (TSTREAM, RSTREAM),
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pins: PINS,
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tx_int: TINT,
rx_int: RINT,
usart_int: UINT,
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mut config: SerialConfig,
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clocks: Clocks,
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) -> Self
where
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PINS: Pins<USART>,
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{
config.dma = SerialDmaConfig::TxRx;
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let mut serial = HalSerial::new(usart, pins, config, clocks).unwrap();
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serial.listen(SerialEvent::Idle);
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// serial.listen(SerialEvent::Txe);
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let (usart, _) = serial.release();
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let (tx_stream, rx_stream) = streams;
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Serial {
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tx_stream: Some(tx_stream),
rx_stream: Some(rx_stream),
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usart: Some(usart),
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tx_int: tx_int,
rx_int: rx_int,
usart_int: usart_int,
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channel: core::marker::PhantomData,
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}
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}
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}
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impl<USART, TSTREAM, RSTREAM, CHANNEL, TINT, RINT, UINT> Uart
for Serial<USART, TSTREAM, RSTREAM, CHANNEL, TINT, RINT, UINT>
where
USART: serial::Instance
+ dma::traits::PeriAddress<MemSize = u8>
+ dma::traits::DMASet<TSTREAM, CHANNEL, MemoryToPeripheral>
+ dma::traits::DMASet<RSTREAM, CHANNEL, PeripheralToMemory>
+ WithInterrupt<Instance = UINT>
+ 'static,
TSTREAM: Stream + WithInterrupt<Instance = TINT> + 'static,
RSTREAM: Stream + WithInterrupt<Instance = RINT> + 'static,
CHANNEL: dma::traits::Channel + 'static,
TINT: Interrupt + 'static,
RINT: Interrupt + 'static,
UINT: Interrupt + 'static,
{
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type SendFuture<'a> = impl Future<Output = Result<(), Error>> + 'a;
type ReceiveFuture<'a> = impl Future<Output = Result<(), Error>> + 'a;
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/// Sends serial data.
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fn send<'a>(&'a mut self, buf: &'a [u8]) -> Self::SendFuture<'a> {
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#[allow(mutable_transmutes)]
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let static_buf = unsafe { core::mem::transmute::<&'a [u8], &'static mut [u8]>(buf) };
let tx_stream = self.tx_stream.take().unwrap();
let usart = self.usart.take().unwrap();
async move {
let mut tx_transfer = Transfer::init(
tx_stream,
usart,
static_buf,
None,
DmaConfig::default()
.transfer_complete_interrupt(true)
.memory_increment(true)
.double_buffer(false),
);
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let fut = InterruptFuture::new(&mut self.tx_int);
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tx_transfer.start(|_usart| {});
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fut.await;
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let (tx_stream, usart, _buf, _) = tx_transfer.free();
self.tx_stream.replace(tx_stream);
self.usart.replace(usart);
Ok(())
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}
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}
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/// Receives serial data.
///
/// The future is pending until the buffer is completely filled.
/// A common pattern is to use [`stop()`](ReceiveFuture::stop) to cancel
/// unfinished transfers after a timeout to prevent lockup when no more data
/// is incoming.
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fn receive<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReceiveFuture<'a> {
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let static_buf = unsafe { core::mem::transmute::<&'a mut [u8], &'static mut [u8]>(buf) };
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let rx_stream = self.rx_stream.take().unwrap();
let usart = self.usart.take().unwrap();
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async move {
let mut rx_transfer = Transfer::init(
rx_stream,
usart,
static_buf,
None,
DmaConfig::default()
.transfer_complete_interrupt(true)
.memory_increment(true)
.double_buffer(false),
);
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let fut = InterruptFuture::new(&mut self.rx_int);
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rx_transfer.start(|_usart| {});
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fut.await;
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let (rx_stream, usart, _, _) = rx_transfer.free();
self.rx_stream.replace(rx_stream);
self.usart.replace(usart);
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Ok(())
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}
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}
}
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mod private {
pub trait Sealed {}
}
pub trait WithInterrupt: private::Sealed {
type Instance;
}
macro_rules! dma {
($($PER:ident => ($dma:ident, $stream:ident),)+) => {
$(
impl private::Sealed for dma::$stream<pac::$dma> {}
impl WithInterrupt for dma::$stream<pac::$dma> {
type Instance = interrupt::$PER;
}
)+
}
}
macro_rules! usart {
($($PER:ident => ($usart:ident),)+) => {
$(
impl private::Sealed for pac::$usart {}
impl WithInterrupt for pac::$usart {
type Instance = interrupt::$PER;
}
)+
}
}
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#[cfg(any(feature = "stm32f405",))]
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dma! {
DMA2_STREAM0 => (DMA2, Stream0),
DMA2_STREAM1 => (DMA2, Stream1),
DMA2_STREAM2 => (DMA2, Stream2),
DMA2_STREAM3 => (DMA2, Stream3),
DMA2_STREAM4 => (DMA2, Stream4),
DMA2_STREAM5 => (DMA2, Stream5),
DMA2_STREAM6 => (DMA2, Stream6),
DMA2_STREAM7 => (DMA2, Stream7),
DMA1_STREAM0 => (DMA1, Stream0),
DMA1_STREAM1 => (DMA1, Stream1),
DMA1_STREAM2 => (DMA1, Stream2),
DMA1_STREAM3 => (DMA1, Stream3),
DMA1_STREAM4 => (DMA1, Stream4),
DMA1_STREAM5 => (DMA1, Stream5),
DMA1_STREAM6 => (DMA1, Stream6),
}
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#[cfg(any(feature = "stm32f405",))]
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usart! {
USART1 => (USART1),
USART2 => (USART2),
USART3 => (USART3),
UART4 => (UART4),
UART5 => (UART5),
USART6 => (USART6),
}