2023-06-12 13:27:51 +02:00
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#![no_std]
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// This must go FIRST so that all the other modules see its macros.
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pub mod fmt;
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2023-05-02 13:16:48 +02:00
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use core::mem::MaybeUninit;
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2023-06-14 00:12:34 +02:00
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use core::sync::atomic::{compiler_fence, Ordering};
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2023-05-02 13:16:48 +02:00
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2023-06-17 22:37:34 +02:00
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use ble::Ble;
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2023-05-27 22:05:23 +02:00
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use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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2023-06-12 13:27:51 +02:00
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use embassy_stm32::interrupt;
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2023-06-17 19:00:33 +02:00
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use embassy_stm32::ipcc::{Config, Ipcc, ReceiveInterruptHandler, TransmitInterruptHandler};
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2023-06-12 13:27:51 +02:00
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use embassy_stm32::peripherals::IPCC;
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2023-06-17 22:37:34 +02:00
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use mm::MemoryManager;
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use sys::Sys;
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2023-06-18 17:11:36 +02:00
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use tables::*;
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2023-06-12 13:27:51 +02:00
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use unsafe_linked_list::LinkedListNode;
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2023-05-02 13:16:48 +02:00
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2023-06-08 17:26:47 +02:00
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pub mod ble;
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pub mod channels;
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pub mod cmd;
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pub mod consts;
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pub mod evt;
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pub mod mm;
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pub mod shci;
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pub mod sys;
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2023-06-12 13:27:51 +02:00
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pub mod tables;
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2023-06-08 17:26:47 +02:00
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pub mod unsafe_linked_list;
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2023-05-02 13:16:48 +02:00
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2023-06-08 17:26:47 +02:00
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type PacketHeader = LinkedListNode;
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2023-06-12 13:27:51 +02:00
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pub struct TlMbox<'d> {
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2023-05-27 22:05:23 +02:00
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_ipcc: PeripheralRef<'d, IPCC>,
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2023-06-17 22:37:34 +02:00
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pub sys_subsystem: Sys,
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pub mm_subsystem: MemoryManager,
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pub ble_subsystem: Ble,
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2023-05-02 13:16:48 +02:00
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}
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2023-05-27 22:05:23 +02:00
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impl<'d> TlMbox<'d> {
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2023-06-12 13:27:51 +02:00
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pub fn init(
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2023-05-27 22:05:23 +02:00
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ipcc: impl Peripheral<P = IPCC> + 'd,
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2023-06-12 15:44:30 +02:00
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_irqs: impl interrupt::typelevel::Binding<interrupt::typelevel::IPCC_C1_RX, ReceiveInterruptHandler>
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+ interrupt::typelevel::Binding<interrupt::typelevel::IPCC_C1_TX, TransmitInterruptHandler>,
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2023-05-26 10:56:55 +02:00
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config: Config,
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2023-05-27 22:05:23 +02:00
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) -> Self {
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into_ref!(ipcc);
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2023-05-02 13:16:48 +02:00
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unsafe {
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2023-06-14 00:12:34 +02:00
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TL_REF_TABLE.as_mut_ptr().write_volatile(RefTable {
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device_info_table: TL_DEVICE_INFO_TABLE.as_ptr(),
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2023-05-02 13:16:48 +02:00
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ble_table: TL_BLE_TABLE.as_ptr(),
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thread_table: TL_THREAD_TABLE.as_ptr(),
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sys_table: TL_SYS_TABLE.as_ptr(),
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mem_manager_table: TL_MEM_MANAGER_TABLE.as_ptr(),
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traces_table: TL_TRACES_TABLE.as_ptr(),
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mac_802_15_4_table: TL_MAC_802_15_4_TABLE.as_ptr(),
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2023-06-14 00:12:34 +02:00
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// zigbee_table: TL_ZIGBEE_TABLE.as_ptr(),
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// lld_tests_table: TL_LLD_TESTS_TABLE.as_ptr(),
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// ble_lld_table: TL_BLE_LLD_TABLE.as_ptr(),
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2023-05-02 13:16:48 +02:00
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});
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2023-06-14 00:12:34 +02:00
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TL_SYS_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_DEVICE_INFO_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_BLE_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_THREAD_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_MEM_MANAGER_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_TRACES_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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TL_MAC_802_15_4_TABLE
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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2023-06-14 00:17:10 +02:00
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// TL_ZIGBEE_TABLE
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// .as_mut_ptr()
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// .write_volatile(MaybeUninit::zeroed().assume_init());
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// TL_LLD_TESTS_TABLE
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// .as_mut_ptr()
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// .write_volatile(MaybeUninit::zeroed().assume_init());
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// TL_BLE_LLD_TABLE
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// .as_mut_ptr()
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// .write_volatile(MaybeUninit::zeroed().assume_init());
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2023-06-14 00:12:34 +02:00
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EVT_POOL
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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SYS_SPARE_EVT_BUF
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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BLE_SPARE_EVT_BUF
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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{
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BLE_CMD_BUFFER
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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HCI_ACL_DATA_BUFFER
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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CS_BUFFER
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.as_mut_ptr()
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.write_volatile(MaybeUninit::zeroed().assume_init());
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}
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2023-05-02 13:16:48 +02:00
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}
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2023-06-14 00:12:34 +02:00
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compiler_fence(Ordering::SeqCst);
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2023-05-27 22:05:23 +02:00
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Ipcc::enable(config);
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2023-05-02 13:16:48 +02:00
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2023-06-17 22:37:34 +02:00
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Self {
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_ipcc: ipcc,
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2023-06-18 16:43:07 +02:00
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sys_subsystem: sys::Sys::new(),
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ble_subsystem: ble::Ble::new(),
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mm_subsystem: mm::MemoryManager::new(),
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2023-05-02 13:16:48 +02:00
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}
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}
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}
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