VasanthakumarV
3f33d307ff
[feature] Add rcc register support for F3
2021-12-13 14:50:13 +05:30
VasanthakumarV
e2c074d133
[feature] Add pwr register support for F3
2021-12-13 13:49:41 +05:30
VasanthakumarV
7733d11f90
[generate] Add stm32f3 chips to the Cargo manifest
2021-12-13 13:49:41 +05:30
VasanthakumarV
629fab7e21
[manual] Add stm32f3 family to stm32-gen-features
2021-12-13 13:49:41 +05:30
bors[bot]
4eb9f0f3ae
Merge #527
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527: stm32/tests: add uart, uart_dma tests. r=Dirbaio a=Dirbaio
H7 usart_dma fails with a super strange error, looks like defmt corruption. Will investigate.
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-08 05:07:42 +00:00
Dario Nieuwenhuis
ff5583fc73
stm32/tests: add uart, uart_dma tests.
2021-12-08 05:43:39 +01:00
bors[bot]
1c651e2b44
Merge #526
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526: stm32/usart: unify v1 and v2 r=Dirbaio a=Dirbaio
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-08 04:13:40 +00:00
Dario Nieuwenhuis
4ddd23d623
stm32/usart: unify v1 and v2
2021-12-08 05:12:48 +01:00
bors[bot]
b0da4dfa8c
Merge #500
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500: Low level DMA channel API. r=Dirbaio a=matoushybl
This should be an improved version of the PR by `@theunkn0wn1.`
Co-authored-by: Joshua Salzedo <joshuasalzedo@gmail.com>
Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-08 02:30:46 +00:00
Dario Nieuwenhuis
022c4cb739
stm32/dma: simplify impls a bit.
2021-12-08 03:30:07 +01:00
Dario Nieuwenhuis
b316d2620c
stm32/dma: improve trait docs, seal Word.
2021-12-08 03:18:15 +01:00
Dario Nieuwenhuis
6179da6b9c
stm32/dma: eagerly start transfers when calling the functions.
...
`async fn`s do nothing until polled, but we want the DMA transfer to
immediately start in this case. Drivers rely on it. Some require special
orders, such as "start DMA, start SPI, then wait for DMA" which is awkward
to do without eager start.
Also use a manually-impl'd future, this allows getting rid of the "double"
Unborrow channel clone.
2021-12-08 03:04:39 +01:00
bors[bot]
6081b36356
Merge #525
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525: Applies the Uarte patch r=huntc a=huntc
Applies the Nordic workaround found in the `Uarte` for the nRF9160 and nRF5340 to the `BufferedUarte`.
Co-authored-by: huntc <huntchr@gmail.com>
2021-12-08 01:43:25 +00:00
huntc
090a7adf78
Keep Clippy happy
2021-12-08 12:13:49 +11:00
huntc
4e7fa52288
Applies the Uarte patch
...
Applies the Nordic workaround found in the `Uarte` for the nRF9160 and nRF5340 to the `BufferedUarte`.
2021-12-08 12:02:30 +11:00
Dario Nieuwenhuis
4e349d0f5d
stm32/dma: use the right waker slot number for DMA2 (must add 8)
2021-12-08 01:54:31 +01:00
Dario Nieuwenhuis
fd2fe62b5f
stm32/dma: rename is_stopped to is_running.
...
Note that this does NOT invert the result of `en()` because it was
wrong before.
2021-12-08 01:51:39 +01:00
Matous Hybl
b2910558d3
Refactor DMA traits.
2021-12-07 21:43:47 +01:00
Joshua Salzedo
e2719aba10
Further extend the dma channel trait
2021-12-07 21:43:47 +01:00
Joshua Salzedo
93e047ede2
cargo fmt
2021-12-07 21:43:47 +01:00
Joshua Salzedo
3411039cb9
Implement extended Channel trait to bdma.rs
2021-12-07 21:43:47 +01:00
Joshua Salzedo
2d2c6d0e01
Implement extended Channel trait to dma.rs
2021-12-07 21:43:47 +01:00
Joshua Salzedo
3272987d92
Expand channel trait
2021-12-07 21:43:47 +01:00
Dario Nieuwenhuis
c574b0eb73
Merge pull request #524 from lulf/readd-write-flush
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Add back MISO flush
2021-12-07 19:23:48 +01:00
Ulf Lilleengen
f9ac0c8047
Add back MISO flush
2021-12-07 09:40:45 +01:00
bors[bot]
56bcc824e0
Merge #523
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523: Incrementally merge STM32 SPI versions, Part 2 r=Dirbaio a=GrantM11235
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2021-12-07 06:30:29 +00:00
Grant Miller
79baa04118
Implement blocking traits with a macro
2021-12-07 00:03:52 -06:00
Grant Miller
bf1f80afa1
Unify blocking trait impls
2021-12-07 00:03:52 -06:00
Grant Miller
3a17e3a2a5
Move async trait impls to mod
2021-12-07 00:03:52 -06:00
Grant Miller
20d2151b1d
check_error_flags function
2021-12-07 00:03:52 -06:00
Grant Miller
496579b48b
Move Word trait to mod
2021-12-07 00:03:52 -06:00
bors[bot]
2e6c3b22b8
Merge #518
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518: Incrementally merge STM32 SPI versions, Part 1 r=Dirbaio a=GrantM11235
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2021-12-07 04:45:14 +00:00
Grant Miller
7c78247be3
v2: set frxth and ds in new
2021-12-06 22:36:53 -06:00
bors[bot]
15a324a42a
Merge #522
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522: stm32/tests: add DMA SPI r=Dirbaio a=Dirbaio
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-07 04:16:30 +00:00
Dario Nieuwenhuis
e673ba8ea2
stm32/tests: add DMA SPI
2021-12-07 05:15:45 +01:00
bors[bot]
f0c2c5caa0
Merge #521
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521: Stm32 SPI HIL test r=Dirbaio a=Dirbaio
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-07 04:02:09 +00:00
Dario Nieuwenhuis
fa36fa2808
stm32/tests: add spi
2021-12-07 05:01:01 +01:00
Dario Nieuwenhuis
a14c4f49c4
stm32/tests: higher clocks for H7
2021-12-07 05:00:35 +01:00
bors[bot]
5dc5192d79
Merge #520
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520: stm32/tests: add stm32h755zi, stm32wb55rg r=Dirbaio a=Dirbaio
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-07 00:47:59 +00:00
Dario Nieuwenhuis
17c5dc496e
stm32/tests: add stm32h755zi, stm32wb55rg
2021-12-07 01:24:26 +01:00
bors[bot]
c1b4759935
Merge #519
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519: stm32: Add timer test, add g0, g4 tests. r=Dirbaio a=Dirbaio
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-06 23:39:34 +00:00
Dario Nieuwenhuis
dde6607aec
Add timer test, add g0, g4 tests.
2021-12-07 00:29:41 +01:00
Dario Nieuwenhuis
693690cb5a
Uncomment accidentally commented ci stuff.
2021-12-07 00:27:37 +01:00
Grant Miller
d76bc45e30
Move Spi drop impl to mod
2021-12-06 17:19:55 -06:00
Grant Miller
bd9e730024
Move set_word_size to mod
2021-12-06 16:47:08 -06:00
Grant Miller
a35b7d90bc
Add tx_ptr and rx_ptr methods
2021-12-06 16:33:06 -06:00
bors[bot]
7058f29cf0
Merge #451
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451: stm32f4 GPIO HIL test r=Dirbaio a=Dirbaio
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-06 21:42:47 +00:00
Grant Miller
a35f337bd6
Move Spi::new and Spi::compute_baud_rate to mod
2021-12-06 15:19:24 -06:00
Dario Nieuwenhuis
dd32358d6b
stm32: add gpio HIL test
2021-12-06 22:05:41 +01:00
Dario Nieuwenhuis
00a87b9a41
Fix build examples with defmt.
2021-12-06 21:58:57 +01:00