3fc54236ea
stm32/i2c: allow empty transfers with async api
2022-01-25 16:28:49 +01:00
3d27a0e7cb
stm32/dma: make lowlevel api take ptrs instead of slices.
2022-01-19 17:59:55 +01:00
022c4cb739
stm32/dma: simplify impls a bit.
2021-12-08 03:30:07 +01:00
b316d2620c
stm32/dma: improve trait docs, seal Word.
2021-12-08 03:18:15 +01:00
6179da6b9c
stm32/dma: eagerly start transfers when calling the functions.
...
`async fn`s do nothing until polled, but we want the DMA transfer to
immediately start in this case. Drivers rely on it. Some require special
orders, such as "start DMA, start SPI, then wait for DMA" which is awkward
to do without eager start.
Also use a manually-impl'd future, this allows getting rid of the "double"
Unborrow channel clone.
2021-12-08 03:04:39 +01:00
4e349d0f5d
stm32/dma: use the right waker slot number for DMA2 (must add 8)
2021-12-08 01:54:31 +01:00
fd2fe62b5f
stm32/dma: rename is_stopped to is_running.
...
Note that this does NOT invert the result of `en()` because it was
wrong before.
2021-12-08 01:51:39 +01:00
b2910558d3
Refactor DMA traits.
2021-12-07 21:43:47 +01:00
e2719aba10
Further extend the dma channel trait
2021-12-07 21:43:47 +01:00
93e047ede2
cargo fmt
2021-12-07 21:43:47 +01:00
3411039cb9
Implement extended Channel trait to bdma.rs
2021-12-07 21:43:47 +01:00
2d2c6d0e01
Implement extended Channel trait to dma.rs
2021-12-07 21:43:47 +01:00
3272987d92
Expand channel trait
2021-12-07 21:43:47 +01:00
b0fabfab5d
Update stm32-data: rcc regs info comes from yamls now.
2021-11-29 02:28:02 +01:00
bbff98ed0d
Move the use
inside the macro call, inside another set of braces in case it percolates up twice.
2021-10-26 14:34:03 -04:00
a72816492a
Only attempt to enable the dmamux peri clock if it has an enable bit.
2021-10-26 14:19:03 -04:00
959aecf6ac
Enable the DMAMUX clocks.
2021-10-26 14:01:39 -04:00
ead987245d
embassy: Refactor module structure to remove kitchen-sink util
.
2021-09-11 02:35:35 +02:00
c7ae2d2a3a
stm32: Add fences to DMA code
2021-08-10 20:45:41 -03:00
9bd34429f3
stm32: add missing + 'a
bounds on trait GATs
2021-08-04 19:39:54 +02:00
8759213fcc
Use new interrupt! table format to /enable/ the IRQs also.
2021-07-27 13:23:33 -04:00
b910551c9a
Generate more rows in the interrupts! table.
...
Adjust DMA/BDMA to use the new style.
2021-07-27 12:52:01 -04:00
3c7375c6cd
stm32/bdma: do not clear IF on IRQ handler
2021-07-24 10:01:11 +02:00
43c4f24207
STM32 BDMA: Use interrupt flags instead of atomics
2021-07-24 09:26:07 +02:00
5a4a5ce334
STM32 DMA: Use interrupt flags instead of atomics
2021-07-24 09:26:07 +02:00
b07325b476
Enable DMA for SPIv1 on F4's etc.
2021-07-23 13:22:39 -04:00
a1dac21bdf
Make SPIv3 work with DMA.
...
Add both DMA and non-DMA example to H7.
2021-07-23 13:22:39 -04:00
0d2051243e
SPIv2 + DMA.
2021-07-23 13:22:39 -04:00
4c5a234a3a
Add a non-minc write() to DMA which takes a count.
...
Use it from "read-only" SPI.
2021-07-23 13:22:39 -04:00
2d3137afc7
The async move
portion of @thalesfragoso's i2c PR.
2021-07-20 11:38:16 -04:00
aae0431d31
stm32: Clear possible set flags after disabling DMA
2021-07-17 16:59:35 -03:00
36be877ba3
stm32/dma: only set TRBUFF in DMAv1 (H7)
2021-07-17 08:01:20 +02:00
3655048e0f
stm32/dma: add MuxChannel trait to distinguish DMAMUX1 and DMAMUX2 channels.
2021-07-17 07:54:16 +02:00
54b5012c56
stm32/dma: update codegen+macrotables for new stm32-data
2021-07-17 07:35:59 +02:00
0119ea809d
Get DMA on H7 working, add usart_dma example for H7.
2021-07-16 14:41:20 -04:00
ae948415a7
stm32/dma: disable after finishing
2021-07-16 14:41:20 -04:00
63a0e188ea
stm32/dma: fix h7 impls
2021-07-16 14:41:20 -04:00
3d1391ef2d
stm32/dma: impl all variants
2021-07-16 14:41:20 -04:00
6552af8f0b
Fix warning for unused import.
2021-07-13 10:09:35 -04:00
811ed18922
Add a missing 'use' for dma_v2.
2021-07-13 10:09:35 -04:00
f01ddd5f5c
Mix dmamux into bdma_v1.
2021-07-13 10:09:35 -04:00
54ada5bae1
Stub in the DMA bits that aren't yet there.
2021-07-01 11:30:54 -04:00
e07dda8707
stm32: Adjust some fences around DMA
...
Also bump stm32-data
2021-06-30 18:58:21 -03:00
f3b9c97763
Change atomics and add a fence.
2021-06-30 10:17:25 -04:00
c53ab325c1
Wire up DMA with USART v1.
2021-06-29 11:01:57 -04:00
b88fc2847a
Checkpoint with lifetime issues.
2021-06-29 11:01:57 -04:00
e7dc5c0939
fmt: make all macros macro_rules
so scoping is consistent.
2021-06-07 00:16:39 +02:00
010b2b9497
Fix stm32 warnings
2021-06-06 00:46:20 +10:00
b4dca64e20
Move most of DMA out of gen.py.
2021-06-03 14:53:48 -04:00
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00