Bob McWhirter
f6c5f039c8
Emit a default memory.x alongside device.x from metapac.
2021-08-02 11:23:55 -04:00
Bob McWhirter
13873df30b
Auto-enable all GPIOs during init().
2021-07-23 11:32:19 -04:00
Bob McWhirter
d68f2617e6
Add a Dbgmcu struct capable of enabling all relevant DBGMCU.cr fields.
...
Includes the addition of a `dbgmcu!(...)` macro table which currently takes
the form of
(cr, $fn_name:ident)
where `$fn_name` is something like `set_dbgsleep_d1` etc.
The method is unsafe, since it's performing unsafe PAC operations.
Two examples modified to demonstrate its usage.
2021-07-22 14:18:48 -04:00
Dario Nieuwenhuis
3d1391ef2d
stm32/dma: impl all variants
2021-07-16 14:41:20 -04:00
Dario Nieuwenhuis
f916fe5476
all hals: reexport PAC if unstable-pac feature is set.
2021-07-14 22:19:04 +02:00
Bob McWhirter
f01ddd5f5c
Mix dmamux into bdma_v1.
2021-07-13 10:09:35 -04:00
Bob McWhirter
6ec7253095
Checkpoint my DMA for thales.
2021-07-13 10:08:43 -04:00
Bob McWhirter
043f0ea508
Checkpoint DMAMUX channel setup.
2021-07-13 10:08:43 -04:00
Thales Fragoso
f32caaeaaf
STM: Start working on bdma-v1
2021-07-13 10:08:43 -04:00
Bob McWhirter
54ada5bae1
Stub in the DMA bits that aren't yet there.
2021-07-01 11:30:54 -04:00
Thales Fragoso
013792b944
Separate exti into v1 and v2
2021-06-24 20:28:06 -03:00
Thales Fragoso
1c33a3b94c
#[cfg] exti
2021-06-24 19:41:04 -03:00
Thales Fragoso
598201bff3
eth-v2: Make embassy-net optional
2021-06-16 16:48:35 +02:00
Thales Fragoso
46e1bae9e3
eth-v2: Start Ethernet peripheral implementation
2021-06-16 16:48:35 +02:00
Bob McWhirter
d58fb11b2e
ADCv3 and example.
2021-06-14 13:20:42 -04:00
Bob McWhirter
240616aa72
General clean-up and removal of dead code.
2021-06-03 14:25:17 -04:00
Bob McWhirter
fe47f781be
Migrate exti_irq stuff to macro tables.
2021-06-03 13:35:27 -04:00
Bob McWhirter
0c54c1afd1
DAC v2 basics.
2021-06-01 12:08:30 -04:00
Dario Nieuwenhuis
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
Dario Nieuwenhuis
3f6f1d99bb
Merge pull request #207 from lulf/clock-init
...
Enable clock by default for stm32l0
2021-05-27 13:36:14 +02:00
Ulf Lilleengen
3669eba561
Use builder
2021-05-27 10:01:40 +02:00
Ulf Lilleengen
bfa999a2e0
Assume tim2 in macro and remove clock setup in chip specific rcc init
...
Add temporary start_tim2() fn to Clock to assist macro in starting
embassy clock
2021-05-26 21:42:07 +02:00
Ulf Lilleengen
c501b162fc
Enable clock by default for stm32l0
...
Modify init function to return a Clock instance defined by a per-chip
SystemClock type and use this in macro setup
A proof of concept implementation for STM32 L0 chips.
This allows using embassy::main macros for STM32 devices that have the
clock setup logic.
2021-05-26 12:33:07 +02:00
Bob McWhirter
aed8283cd5
Finalize i2c v2.
2021-05-25 10:02:40 -04:00
Ulf Lilleengen
1c10e746b6
Re-adds embassy macros for stm32
...
* Hook RCC config into chip config and use chip-specific RCC init
function
* RTC/clock setup is ignored for now
2021-05-25 13:30:42 +02:00
Thales Fragoso
66f232574a
Update stm32-data and rename RTC to Clock
2021-05-23 17:09:11 -03:00
Thales Fragoso
e49e3723a8
wip timers for embassy rtc
2021-05-22 23:58:40 -03:00
Thales Fragoso
a0fe9e4645
Add unstable feature to give access to the pac
2021-05-22 15:34:49 -03:00
Thales Fragoso
7f65f491e5
Finish initial H7 RCC support
2021-05-21 20:16:25 -03:00
Thales Fragoso
054f0d51dc
H7: Add initial PLL configuration
2021-05-21 20:13:37 -03:00
Dario Nieuwenhuis
35f1f65670
Generate mod regs just once, so rustfmt is way faster.
2021-05-21 19:34:41 +02:00
Ulf Lilleengen
32fbb32a84
Move exti setup into pac module
2021-05-21 18:38:33 +02:00
Ulf Lilleengen
0cd3236fa3
Generate exti interrupt handlers
...
Match interrupts starting with ^EXTI and generate init code and irq
handler for them
2021-05-21 18:38:33 +02:00
Lucas Kent
82f9242df2
Fix warnings for embassy-stm32 and embassy-stm32-examples
2021-05-20 22:25:12 +10:00
Dario Nieuwenhuis
2303364322
Standardize module structure, fix some build failures
2021-05-17 02:04:51 +02:00
Dario Nieuwenhuis
bdc3ada4b2
WIP: dma
2021-05-17 01:08:30 +02:00
Thales Fragoso
0f5ba6d4a9
SDMMC: Implement Default for Config and add docs
2021-05-15 21:21:06 -03:00
Thales Fragoso
0b607ca80a
Initial H7 sdmmc support
2021-05-14 23:40:28 -03:00
Bob McWhirter
2569d38ab4
Adjust pin-names to FooPin.
...
Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
2021-05-14 10:11:43 -04:00
Bob McWhirter
9e93a0999f
Add SPIv1, use cfg_attr to pick correct impl.
...
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
2021-05-13 14:28:53 -04:00
Bob McWhirter
07db3ed7c1
Further improvement to SPIv2.
2021-05-12 14:18:42 -04:00
Bob McWhirter
36c16dbef8
Continuing to update clocks (unused now) and SPI
2021-05-12 10:46:18 -04:00
Bob McWhirter
0470abb353
Checkpoint.
2021-05-10 15:33:37 -04:00
Dario Nieuwenhuis
ac616a6dcf
Add dma scaffolding
2021-05-10 01:20:04 +02:00
Bob McWhirter
e8537ca9c2
Implement async RNG, including rand_core sync traits.
2021-05-06 14:35:46 -04:00
Dario Nieuwenhuis
f5f98cdeab
Autogenerate features for family, peripherals and peripheral versions
2021-05-06 03:59:16 +02:00
Dario Nieuwenhuis
23ca2f9174
Autogenerate the tailored PAC for each chip
2021-05-06 03:43:46 +02:00
Bob McWhirter
4257512eb2
Limit to pub(crate).
2021-05-05 13:15:07 -04:00
Bob McWhirter
12c510f222
Rework pac re-exporting, canonicalize syscfg path, use it plus SYSCFG_BASE.
2021-05-05 13:12:53 -04:00
Dario Nieuwenhuis
7ef5806168
stm32: codegen interrupts
2021-05-01 03:08:52 +02:00
