Commit Graph

1297 Commits

Author SHA1 Message Date
5158014f3f PPLXTPRE is a bool.
This flag for example permits the following clock tree
configuration on stm32f103r8

    let mut config = Config::default();
    config.rcc.hse = Some(Hertz(16_000_000));
    config.rcc.sys_ck = Some(Hertz(72_000_000));
    config.rcc.pclk1 = Some(Hertz(36_000_000));
    config.rcc.pclk2 = Some(Hertz(72_000_000));
    config.rcc.pllxtpre = true;

Init fails if pllxtpre is false.
2023-05-04 22:59:52 +02:00
1cc61dc68a Support PLLXTPRE switch.
See figure 2. Clock tree page 12 DS5319 Rev 18
https://www.st.com/resource/en/datasheet/stm32f103cb.pdf
2023-05-04 21:32:37 +02:00
91612b7446 Simplify SUBGHZSPI configuration. 2023-05-04 09:45:18 -05:00
007f452927 removed hardcoded addresses in memory.x 2023-05-04 11:02:17 +01:00
91d1fff4ed Merge branch 'embassy-rs:master' into master 2023-05-03 21:07:28 -05:00
629e0ea595 Handle SUBGHZSPI as async. 2023-05-03 21:05:47 -05:00
02d6e0d14d stm32/i2s: add module and example for f4 2023-05-03 18:17:57 -05:00
0997021a05 fixed ble table cmd buffer being constant 2023-05-03 11:11:51 +01:00
a61701b756 stm32/usart: add OVER8 and PRESC support, update PAC 2023-05-02 19:36:00 +02:00
371a80e1a2 whoops, plugin formatted Cargo.toml, reverting 2023-05-02 14:16:59 +01:00
bab30a7e87 added TL Mailbox initialization for STM32WB 2023-05-02 12:16:48 +01:00
cd88e39f5f stm32/pwm: improve dead-time api 2023-05-01 16:42:03 -05:00
00cde67abe stm32/dma: solve overlapping impl on DmaCtrl on stm32h7 2023-05-01 23:20:51 +02:00
96e8a7ddb9 stm32/uart: feature-gate ringbuffer out when using gpdma, not supported yet. 2023-05-01 22:43:23 +02:00
25864ae4dc stm32/bdma: add ringbuffer support. 2023-05-01 22:42:36 +02:00
14e0090cb1 stm32/dma: remove separate process_tcif. 2023-05-01 22:42:36 +02:00
45843034ec Actually clear idle flag 2023-05-01 22:42:36 +02:00
7757405908 Remove unused import 2023-05-01 22:42:36 +02:00
fc268df6f5 Support overflow detection for more than one ring-period 2023-05-01 22:42:36 +02:00
4ea6662e55 Do not disable dma request when idle line is detected 2023-05-01 22:42:36 +02:00
49455792cb Ring-buffered uart rx with one-period overrun detection 2023-05-01 22:42:36 +02:00
855c0d1423 Merge #1376
1376: rtc: cleanup and consolidate r=Dirbaio a=xoviat

This removes an extra file that I left in, adds an example, and consolidates the files into one 'v2' file.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-01 19:32:06 +00:00
ff6748a0d8 Merge branch 'embassy-rs:master' into master 2023-04-30 11:09:43 -05:00
7646f18836 Merge #1405
1405: add IPCC peripheral for stm32wb r=xoviat a=OueslatiGhaith

Hello again,

This pull request is related to #1397 and #1401, inspired by #24, and was tested on an stm32wb55rg.

This pull request aims to add the IPCC peripheral for stm32wb microcontrollers.
I am debating whether this should be included in the public API, since the IPCC peripheral would be typically managed by the TL Mailbox, not by the app directly.

Co-authored-by: OueslatiGhaith <ghaith.oueslati@enis.tn>
2023-04-30 15:23:55 +00:00
41fe718ea8 Merge #1412
1412: stm32/uart: abort on error r=Dirbaio a=xoviat

This PR aborts the DMA transfer in the event of a UART error. Otherwise, the transfer will never complete, and an error will not be returned.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-30 14:58:36 +00:00
b77794c9a7 stm32/uart: abort on error 2023-04-28 21:43:03 -05:00
49bed094a3 Merge branch 'embassy-rs:master' into master 2023-04-28 13:35:22 -05:00
29cc661dca removed constrain method 2023-04-28 10:17:01 +01:00
91cddd50f6 reversed changes in Cargo.toml 2023-04-27 18:26:19 +01:00
9d610c6866 Remove legacy LoRa drivers. 2023-04-27 11:05:33 -05:00
d960bf344a fixed missing imports 2023-04-27 16:22:41 +01:00
3ba73b5ff4 fixed mistake with casting channel to a usize 2023-04-27 16:08:57 +01:00
8c733c29cc add IPCC peripheral for stm32wb 2023-04-27 16:03:22 +01:00
42a8f1671d Bump versions preparing for -macros and -executor release 2023-04-27 11:54:22 +02:00
0d82ebea29 stm32/rtc: fix datetime and add f4 test 2023-04-25 17:35:01 -05:00
f729d2d060 Deprecate original LoRa drivers. Update rust-lorawan releases. 2023-04-25 13:51:19 -05:00
02c86bca52 Add external LoRa physical layer functionality. 2023-04-21 01:20:46 -05:00
41e90e22e2 Merge #1370
1370: stm32/i2c: fix races when using dma. r=Dirbaio a=xoviat

This change addresses two races:

1. It removes the `chunks_transferred` state variable that is modified inside the interrupt. Analysis of the code reveals that the only time the waker can be woken is when `chunks_transferred` is incremented. Therefore, waking is enough to signal the `poll_fn` that the `chunks_transferred` has incremented. Moving to `remaining_len` clarifies the code, since there is no need to track how many chunks are remaining.
2. It moves the start of the transfer until after the waker is registered, which could theoretically occur if the clock speed is very low, but probably never would even if this wasn't fixed.

There is another race that I noticed: between writes the waker may not yet be registered. In that case, the code would simply be stuck and the `poll_fn` would never be woken. There is no way to resolve this without broadening the scope of the analysis, and this will likely never occur. 

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-19 21:36:04 +00:00
64b80c2e4d stm32/i2c: ignore wakes without interrupt 2023-04-19 16:16:44 -05:00
e24421a393 stm32/rtc: impl. functions on trait 2023-04-18 20:38:51 -05:00
4de4039417 stm32/rtc: build more chips 2023-04-18 20:38:28 -05:00
f589247c1f stm32/rtc: cleanup and consolidate 2023-04-18 20:38:18 -05:00
3260f6b2af stm32/spi: add new_txonly_nosck constructor, for neopixels, with an example in the stm32g0 directory. 2023-04-18 20:59:25 +02:00
2080d8bb6d stm32/spi: add support for all word sizes.
Co-Authored-By: anton smeenk <asmeenk@planet.nl>
2023-04-18 20:56:23 +02:00
fbd6eeb748 Merge pull request #1348 from embassy-rs/h5-spi
stm32/dma: refactor
2023-04-18 17:03:24 +02:00
efc70debb3 stm32/dma: add double buffered mode for DMA, update DCMI. 2023-04-18 16:41:24 +02:00
173c65b543 stm32/dma: refactor. 2023-04-18 16:37:35 +02:00
bba8b0ded5 Missing semi-colon 2023-04-18 16:03:55 +02:00
095f5ef279 Add MAX_ERASE_SIZE const in build script, and use it in flash-wide implementation of embedded-storage traits 2023-04-18 15:49:33 +02:00
1c68c62ebd Implement embedded-storage traits for full flash struct 2023-04-18 13:48:37 +02:00