Commit Graph

1184 Commits

Author SHA1 Message Date
ac61e0ee9f fmt 2022-10-24 22:39:13 +03:00
33f75419e5 Unify i2cv1 definition with i2cv2 2022-10-24 22:34:10 +03:00
6062978d58 Remove weird async timeouts 2022-10-24 22:22:20 +03:00
ca8afacfd0 Implement TimeoutI2c for i2cv2 2022-10-24 22:11:15 +03:00
9ad7e85288 Merge branch 'i2c_timeout2_v2' into i2c_timeout2 2022-10-24 21:50:29 +03:00
9b209ffe1c Add docs 2022-10-24 12:39:47 +03:00
5f02bee388 Gate TimeoutI2c behind i2cv1 2022-10-24 12:34:55 +03:00
1bed02296c i2cv2 timeouts 2022-10-24 12:33:17 +03:00
545cc9326b stm32/adc: Remove voltage and temperature conversions 2022-10-24 04:00:29 -05:00
d99841fea9 Implement time feature 2022-10-24 11:38:15 +03:00
e3cf4255c6 Help compiler with type inference 2022-10-24 11:31:54 +03:00
4ce4131f8b Implement i2cv1 timeout 2022-10-24 11:30:04 +03:00
f78c706b89 Address review feedback 2022-10-24 11:10:59 +03:00
4d5550070f Change time Driver contract to never fire the alarm synchronously 2022-10-24 09:17:43 +03:00
d9c773f475 Merge #1014
1014: Add memory barriers to H7 flash driver to mitigate PGSERR errors r=lulf a=matoushybl

The stm32h7xx-hal uses only the ordering barrier, while the CubeMX uses the DSB and ISB instructions, to be on the safe side, both are used here.

Without the barrier, the PG bit is not set, when the writes are being done, resulting in an error.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-10-19 07:29:12 +00:00
9d2641f2f5 Enable defmt in embassy-hal-common 2022-10-18 22:48:43 +02:00
6c5d81ada5 Add memory barriers to H7 flash driver to mitigate PGSERR errors
The stm32h7xx-hal uses only the ordering barrier, while the CubeMX uses the DSB and ISB instructions, to be on the safe side, both are used here.
2022-10-18 22:42:02 +02:00
86113e199f Remove unused feature gate 2022-10-11 10:35:43 +02:00
9223b67306 Fix RTC for v2l0 & v2l1 2022-10-11 10:28:28 +02:00
aff265a7f5 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/rtc 2022-10-11 09:19:55 +02:00
79cee74151 Fix stm32wl55jc-cm4 RTC 2022-10-11 09:19:47 +02:00
ef533e6df4 Merge #1004
1004: Fix internal channels for adc v2 r=lulf a=chemicstry

Internal channel reading was broken on adc_v2, because `Adc::read()` requires gpio pin trait, which was not implemented by `VrefInt`, `Temperature`, `Vbat`. The required configuration bits `tsvrefe`, `vbate` were not enabled either. This PR makes it a bit closer to how adc_v4 works.

While at it, I also changed adc_v2 to use `RccPeripheral` instead of permanently enabling all ADCs.

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-10-10 06:28:41 +00:00
322cfafed3 Fix adc_v4 compilation 2022-10-07 14:53:03 +03:00
df7174ecb0 Fix internal channel reading on adc_v2 2022-10-07 14:31:55 +03:00
6718ca3a94 all Cargo.toml: Add license to all crate Cargo.toml files
Closes: https://github.com/embassy-rs/embassy/issues/1002
2022-10-07 12:41:56 +02:00
9dca368c3d Use RccPeripheral for adc_v2 2022-10-07 13:29:56 +03:00
aabc02506b Merge #992
992: (embassy-stm32): remove flash lock/unlock public API from stm32 flash r=lulf a=MathiasKoch

Instead, perform the unlocking and locking automatically on erase and write operations.

This makes the `embedded-storage` abstraction actually useable in libraries, while still keeping the flash peripheral locked the majority of the time.

Co-authored-by: Mathias <mk@blackbird.online>
2022-09-30 11:32:27 +00:00
62c0b18f10 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/rtc 2022-09-30 06:15:12 +02:00
a283c47557 Implement embedded-hal-nb for uart 2022-09-30 06:04:19 +02:00
a7fdeac560 Remove flash lock/unlock public API from stm32 flash, and perform the unlocking and locking automatically on erase and write operations 2022-09-30 06:00:46 +02:00
38faae26e5 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/uart-flowcontrol 2022-09-29 12:58:38 +02:00
a77e2c3512 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/uart-eh1 2022-09-29 12:58:01 +02:00
72c2e985bb Update embedded-hal versions and explicitly pin 2022-09-29 11:27:46 +02:00
f9c62d4f1d Add flowcontrol to UART 2022-09-29 09:12:17 +02:00
dc90006982 Remove code duplication on nb_read 2022-09-29 07:58:11 +02:00
a83560c6b1 Implement RTC peripheral for all stm32 families with rtc 2022-09-29 07:49:32 +02:00
823bd714fb Add E-H1 uart blocking & nb implementation 2022-09-28 05:19:43 +02:00
17d8d11f73 usb: make HALs depend only on embassy-usb-driver. 2022-09-27 13:16:49 +02:00
daf2744716 Rework STM32 BufferedUart internals so we can split into Rx and Tx like embassy-nrf 2022-09-26 15:32:29 +02:00
7f7c14b7bc usb: split driver trait to separate crate. 2022-09-26 12:29:27 +02:00
a9efbf18c6 Merge #960
960: Add non blocking Bxcan constructor r=Dirbaio a=andyblarblar

This PR adds a non-blocking constructor to the Bxcan Can wrapper struct. This allows for the creation of the Can periferal without blocking for a sync with the Can bus.

Co-authored-by: Andrew Ealovega <Andrew@Ealovega.dev>
2022-09-26 09:39:55 +00:00
10d1ad2343 Replace futures::future::join -> embassy_futures::join::join. 2022-09-22 16:48:35 +02:00
a0487380da Replace futures::future::poll_fn -> core::future::poll_fn. 2022-09-22 16:42:49 +02:00
897b72c872 Update Rust nightly.
Removes feature(generic_associated_types)
2022-09-22 16:38:14 +02:00
5914d80968 Add non blocking Bxcan constructor.
Signed-off-by: Andrew Ealovega <Andrew@Ealovega.dev>
2022-09-21 22:29:57 -04:00
c4d5c047d7 make State::new() const, consistent with others 2022-09-15 12:34:17 +02:00
22c32b5d5c Merge #939
939: time: add more tick rates, use 1mhz as default. r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-09-04 22:13:34 +00:00
6264fe39a5 Merge #839
839: Misc LoRaWAN improvements r=lulf a=timokroeger

Trying too get `embassy-lora` running on a [LoRa-E5 Dev Board](https://wiki.seeedstudio.com/LoRa_E5_Dev_Board/).
I can see the join message arriving in the The Things Network console but the device does not receive the accept message yet.
Opening this PR anyway because I think there are some nice things to decouple the lora crate from the nucleo board.

`@lulf` Could you test if this PR breaks your LoRa setup? Marking as draft for the time being.

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-09-04 07:17:23 +00:00
5327b9c289 time: add more tick rates, use 1mhz as default. 2022-09-02 00:59:34 +02:00
8ba421f324 Do not use cfg_if for embedded-hal-async feature gates.
Old code used `cfg_if!` because rustc still parses code inside disabled cfg's, and Rust stable at that time couldn't parse the new GAT where-clause location. This is not the case anymore.
2022-08-31 03:11:21 +02:00