Dario Nieuwenhuis
78d109f5d5
stm32-metapac: add pac
feature to allow building only the macrotables.
2021-11-24 01:04:23 +01:00
Dario Nieuwenhuis
d06cb0a264
stm32-metapac-gen: use actually common common.rs
instead of emitting it at every single chip file.
2021-11-24 00:42:14 +01:00
Dario Nieuwenhuis
dfb6d407a1
stm32: rename core features from _cmX to -cmX, cleanup gen.
2021-11-23 23:49:06 +01:00
Dario Nieuwenhuis
039621c56d
stm32-metapac-gen: fix broken build.rs
2021-11-22 02:38:01 +01:00
Dario Nieuwenhuis
0db4da10f8
stm32-metapac-gen: separate data structs
2021-11-22 02:37:46 +01:00
Bob McWhirter
f12b70535b
Adjust for STM32U5.
2021-11-02 12:05:24 -04:00
Matous Hybl
4fbac40120
Workaround duplicity of DMA channel declaration when the target chip specifies more than one request, by processing only the first declared request for the channel.
2021-10-22 11:36:47 +02:00
Ulf Lilleengen
c79485c286
Support for STM32L1
...
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
Ulf Lilleengen
14aa4265db
Ensure linear stride
2021-09-15 13:58:01 +02:00
Ulf Lilleengen
701dd9fa36
Calculate port number based on address and stride
...
This allows out of order letter to port mapping
2021-09-15 13:58:01 +02:00
Ulf Lilleengen
840a83e196
Add support for chip definitions with a dash
2021-09-15 13:58:01 +02:00
Ben Gamari
e2f71ffbbd
Add support for STM32G0
2021-08-20 00:15:11 +02:00
Dario Nieuwenhuis
174c51f097
stm32/metapac: check GPIO RCC regs are always found.
2021-08-19 23:59:50 +02:00
Dario Nieuwenhuis
dd62790f36
stm32-metapac: assume RCC is always present
2021-08-19 22:16:27 +02:00
Ulf Lilleengen
4df63f5379
Add per-core EXTI support
...
* Generate a core index put into the PAC for the peripherals to use as
index into registers.
* Add EXTI v2 which uses CORE_INDEX to index exti registers
2021-08-17 16:22:47 +02:00
Timo Kröger
f240edc579
Remove broken panic message
2021-08-04 12:51:24 +02:00
Timo Kröger
e21faaeb47
cargo fmt
2021-08-04 12:43:51 +02:00
Timo Kröger
b36337b3d2
Refactor bit search logic when no clock specified
...
Always search for a enable bit, even when no clock is specified in the
yaml. Try to derive the clock name from the register name.
This change picked up USART2 for stm32wle which was missing the clock.
2021-08-04 12:42:35 +02:00
Timo Kröger
37536695e1
Refactor find_reg_for_field()
2021-08-04 11:22:54 +02:00
Timo Kröger
c985c031d4
Use a regex to match find enable and rst regs
2021-08-03 17:58:28 +02:00
Timo Kröger
4e47b15daf
Ignore the clock number for enable bit search
...
The number has different meanings depending on family:
stm32f0: RCC_APB2ENR - APB peripheral clock enable register 2 CLOCK: APB1
stm32f4: RCC_APB2ENR - RCC APB2 peripheral clock enable register CLOCK: APB2
Ignore the clock number and search all registers for a matching enable bit.
2021-08-03 17:58:27 +02:00
Timo Kröger
fba8b86005
BTreeMaps to preserve ordering of generated code
...
Makes diffing of changes easier
2021-08-03 17:58:26 +02:00
Bob McWhirter
63b32b39e1
Use an em bikeshed instead of an underscore bikeshed.
2021-08-02 13:29:06 -04:00
Bob McWhirter
5f9447abb4
Put the implicit memory.x behind a memory_x
feature on embassy-stm32.
2021-08-02 13:21:30 -04:00
Bob McWhirter
4da8ed471b
Fallback to total RAM or FLASH size if otherwise not present.
2021-08-02 11:23:55 -04:00
Bob McWhirter
f6c5f039c8
Emit a default memory.x alongside device.x from metapac.
2021-08-02 11:23:55 -04:00
Thales Fragoso
16d5294817
Get rid of some warnings
2021-07-29 18:48:43 -03:00
Dario Nieuwenhuis
8d76c582f5
Update chiptool
2021-07-29 13:39:19 +02:00
Bob McWhirter
b910551c9a
Generate more rows in the interrupts! table.
...
Adjust DMA/BDMA to use the new style.
2021-07-27 12:52:01 -04:00
Bob McWhirter
650f867b1c
Add a single-column variant to gpio_rcc! macro table
...
which includes just the set of registers that need to be
considered.
Then match against those registers with a single `modify(...)`
2021-07-23 11:32:20 -04:00
Bob McWhirter
13873df30b
Auto-enable all GPIOs during init().
2021-07-23 11:32:19 -04:00
Bob McWhirter
d68f2617e6
Add a Dbgmcu
struct capable of enabling all relevant DBGMCU.cr fields.
...
Includes the addition of a `dbgmcu!(...)` macro table which currently takes
the form of
(cr, $fn_name:ident)
where `$fn_name` is something like `set_dbgsleep_d1` etc.
The method is unsafe, since it's performing unsafe PAC operations.
Two examples modified to demonstrate its usage.
2021-07-22 14:18:48 -04:00
Dario Nieuwenhuis
54b5012c56
stm32/dma: update codegen+macrotables for new stm32-data
2021-07-17 07:35:59 +02:00
Dario Nieuwenhuis
dff4b42a33
stm32/dma: Fix macrotable column count not matching in DMAMUX-less BDMAv1.
2021-07-17 04:54:34 +02:00
Bob McWhirter
01cc733c61
Prep for new stm32-data with dmamux differentiation, but not yet using.
2021-07-16 15:44:22 -04:00
Bob McWhirter
1254e99be1
Be able to scrub out BDMA-centric IRQs.
...
Further refine distinction between DMA and BDMA interrupts in the table.
2021-07-16 14:41:20 -04:00
Thales Fragoso
2f08c7ced5
stm32: Allow for RccPeripheral without reset field
...
This fix build on F0, since it doesn't have DMARST. This change makes
RccPeripheral::reset a no-op on peripherals where a reset field couldn't
be found
2021-07-15 13:25:51 -03:00
Bob McWhirter
92247369e7
Remove some unused traits.
...
Move some fns to associated consts.
2021-07-13 10:09:35 -04:00
Bob McWhirter
2e10ab2e5c
Let's count channels per DMA peripheral, shall we now?
2021-07-13 10:09:35 -04:00
Bob McWhirter
06e899b14c
Adjust to DMA1EN in the rcc for l0.
2021-07-13 10:09:35 -04:00
Bob McWhirter
d31e30f382
Undo special-casing FOO1 -> FOO in RCC searching.
2021-07-13 10:09:35 -04:00
Bob McWhirter
c28bc5a8da
Adapt for DMAEN for DMA1 if DMA1EN is not found (for all peripherals FOO1) for EN/RST rcc table.
2021-07-13 10:09:35 -04:00
Bob McWhirter
97ad434d38
Twizzle our DMA vs BDMA channels.
2021-07-13 10:09:35 -04:00
Bob McWhirter
f01ddd5f5c
Mix dmamux into bdma_v1.
2021-07-13 10:09:35 -04:00
Dario Nieuwenhuis
1d64421fb4
Fix "can't find crate for std" for stm32-metapac-gen deps.
2021-07-13 05:47:10 +02:00