Commit Graph

1380 Commits

Author SHA1 Message Date
6929350552 [can] Update macrotable comment
The chip description are corrected in:
https://github.com/embassy-rs/stm32-data/pull/123
2022-03-05 09:46:06 +01:00
4c30543938 [can] Do not use wildcard reexport for bxcan 2022-03-05 09:46:06 +01:00
9ebf7eee6d Merge #652 #653
652: Use new stm32-data registers and fix AHB clock calculation r=Dirbaio a=msamsonoff

This is the follow-on to my PR against stm32-data that added new register enums for the G0. I have updated the G0 RCC module to use those new enums.

I have also fixed an issue with the calculation of the AHB clock rate. 32 is not available as an AHB prescaler. The sequence jumps from 16 to 64. The original bit shifting math did not account for this gap. I have replaced it with a `match` instead.

653: Fixes for rustdoc building. r=Dirbaio a=Dirbaio



Co-authored-by: Matthew W. Samsonoff <matt.samsonoff@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-03-04 17:07:04 +00:00
609975f821 rustfmt 2022-03-04 18:04:12 +01:00
047ff9a2f2 Use new stm32-data registers and fix AHB clock calculation
The original code for calculating the AHB clock did not account for the gap in
prescaler values (32 is not an available value.) The bit shifting and math has
been replaced by a `match`.
2022-03-04 18:03:55 +01:00
265cd1115b stm32: allow unused macrotables. 2022-03-04 18:03:41 +01:00
44096358a2 docs: add metadata.embassy_docs to cargo tomls. 2022-03-04 18:03:41 +01:00
53d9a0b516 stm32: exclude spammy files from docs by prefixing with _.
These files end up containing chip-specific info, so they deduplicate
really badly when building docs for all 1200 chips.

The doc generator removes files starting with `_`.
2022-03-04 18:03:41 +01:00
94b232cf88 docs: prevent inline doc spam for reexports. 2022-03-04 18:03:41 +01:00
0172ca5b81 stm32: Add support for using TIM12 and TIM15 as time driver 2022-02-28 19:20:22 +01:00
a88c5e716e stm32: Register access for timers now doesn't require self 2022-02-28 16:20:42 +01:00
dd828a7a92 stm32: move macrotables to embassy-stm32 build.rs 2022-02-26 03:23:09 +01:00
e6299549a0 stm32/i2c: use one static per instance instead of an array. 2022-02-26 01:23:17 +01:00
8d46d31824 stm32/dbgmcu: do not use macrotable. 2022-02-26 01:20:42 +01:00
48f700b35c stm32 usart: Fix RX interrupt flag handling
* On v1 interrupts cannot be cleared individually.
  Instead they are cleared implicitly by reading or writing DR (which we do now).
* Multiple error flags can be set at the same time:
  Handle them all in one go intstead of re-entering the ISR for each one so that
  we do not lose any error flags on v1 hardware.
* Wake when the RX buffer becomes full: This allows fast running chips to pull data
  from the buffer before receiving the next byte.
2022-02-25 14:32:39 +01:00
0ad7a3aa6f stm32: fix chips without dbgmcu (wl55 cm0 core) 2022-02-25 01:16:23 +01:00
ea5cd19c30 stm32: fix build for h7ab 2022-02-24 06:28:29 +01:00
1ff80f8438 stm32/mco: fix on h7ab 2022-02-24 06:28:29 +01:00
2a246be06e stm32/time_driver: use trait impls from the main timer mod. 2022-02-24 06:28:29 +01:00
e8ca5f9b04 stm32/rcc: fix build on l0 chips without CRS 2022-02-24 06:28:29 +01:00
bf80504ac7 stm32: centralize gpio reg access in the gpio module. 2022-02-24 02:49:20 +01:00
1b3c34b923 stm32/gpio: fix wrong conf for AF input. 2022-02-24 00:37:15 +01:00
17e77ede3f stm32f1: fix wrong AF type in uart, can. 2022-02-24 00:37:15 +01:00
052f370de9 stm32: move ADC, DAC pin impls to build.rs 2022-02-23 20:21:28 +01:00
30ce71127a stm32: move MCO pin impls to build.rs 2022-02-23 19:54:46 +01:00
1e69a8c484 stm32: move pin trait impls from macrotables to build.rs 2022-02-23 19:54:46 +01:00
b4abb1f5c2 stm32: move dma trait impls from macrotables to build.rs 2022-02-23 19:16:37 +01:00
2abb04d4d1 stm32/rcc: fix f3 build failure. 2022-02-23 03:42:46 +01:00
39d06b59cd Update stm32-data 2022-02-14 02:12:06 +01:00
eb922c4655 Merge #608
608: stm32f4: add adc + example r=Dirbaio a=ain101

Example tested on stm32f407vg Discovery Board.
minimal adc: no vref, dma, complex sequence

Co-authored-by: Frederik <frederik@frederik.at>
2022-02-13 11:44:59 +00:00
7a3d34c1ed fix build for stm32f410tb 2022-02-12 23:56:50 +01:00
6f0488cbe7 remove unnecessary mod 2022-02-12 23:55:58 +01:00
340eb4eead stm32: add rust stable support 2022-02-12 02:45:52 +01:00
f2eb438905 Merge #615
615: rp: remove OptionalPin r=Dirbaio a=Dirbaio

Mirror of https://github.com/embassy-rs/embassy/pull/605 for rp2040

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-12 00:46:40 +00:00
4a75475cfc stm32: remove unused sealed::OptionalPin 2022-02-12 01:34:09 +01:00
20e14b8edb embassy, embassy-nrf: add nightly Cargo feature to gate nightly-only features. 2022-02-12 01:16:31 +01:00
6c925b2342 blocking_mutex: refactor to work on stable. No GATs, and can be constructed in const. 2022-02-12 01:16:31 +01:00
e4f240823d adc cleanup retval 2022-02-11 17:48:32 +01:00
7a3d28ad00 stm32f4: add adc + example
Example tested on stm32f407vg Discovery Board.
minimal adc: no vref, dma, complex sequence
2022-02-10 23:28:41 +01:00
b99ab3d5d9 stm32: Add standard crate-wide macros for pin/dma traits, switch all drivers to use them. 2022-02-10 21:38:03 +01:00
a8bd3ab952 Add missing + 'd on unborrows. 2022-02-10 16:06:42 +01:00
550da471be stm32: Remove OptionalPin
The idea behind OptionalPin has a few problems:

- you need to impl the signal traits for NoPin which is a bit weird https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/dcmi.rs#L413-L416
- you can pass any combination of set/unset pins, which needs checking at runtime  https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/dcmi.rs#L130

The replacement is to do multiple `new` constructors for each combination of pins you want to take.
2022-02-10 02:38:10 +01:00
1d265b73b2 Merge #601
601: [part 1/n] Change macrotables to build.rs codegen r=lulf a=Dirbaio

This PR replaces the "macrotables" (the macros like `stm32_data::peripherals!`) with a `const METADATA`.

Macrotables had some problems:

- Hard to debug
- Somewhat footgunny (typo the "pattern" and then nothing matches and the macro now expands to nothing, silently!)
- Limited power
  - Can't count, so we had to add a [special macrotable for that](f50f3f0a73/embassy-stm32/src/dma/bdma.rs (L26)).
  - Can't remove duplicates, so we had to fallback to [Rust code in build.rs](f50f3f0a73/embassy-stm32/build.rs (L105-L145))
  - Can't include the results as a listto another macro, so again [build.rs](https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/build.rs#L100-L101).

They work fine for the 95% of cases, but for the remaining 5% we need Rust code in build.rs. So we might as well do everything with Rust code, so everything is consistent.

The new approach generates a `const METADATA: Metadata = Metadata { ... }` with [these structs](https://github.com/embassy-rs/embassy/blob/unmacrotablize/stm32-metapac-gen/src/assets/metadata.rs) in `stm32-metapac`. `build.rs` can then read that and generate whatever code.


Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-09 15:27:35 +00:00
d91bd0b9a6 Merge #602
602: Add stm32 USB OTG peripherals r=Dirbaio a=chemicstry

Fixes #557. This is similar to #580, but for synopsys IP.

I could add examples to other chips, but I have no way of testing them. The F4 example is tested and working.

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-02-09 00:29:00 +00:00
10981ee809 Cleanup 2022-02-09 02:10:54 +02:00
1f81a69347 Merge USB FS and HS peripherals. Add ULPI. 2022-02-09 02:02:23 +02:00
8160af6af9 stm32: replace peripheral_rcc! macrotable with build.rs 2022-02-09 00:58:17 +01:00
d1a9680422 stm32: change interrupt declarations from macrotables to build.rs. 2022-02-09 00:45:52 +01:00
940412c034 stm32/build.rs: switch to using stm32-metapac metadata and quote. 2022-02-09 00:31:21 +01:00
d37d714314 stm32: Add support for FMC 2022-02-08 17:30:20 +01:00