Commit Graph

865 Commits

Author SHA1 Message Date
ivmarkov
e3cf4255c6 Help compiler with type inference 2022-10-24 11:31:54 +03:00
ivmarkov
f78c706b89 Address review feedback 2022-10-24 11:10:59 +03:00
ivmarkov
4d5550070f Change time Driver contract to never fire the alarm synchronously 2022-10-24 09:17:43 +03:00
bors[bot]
d9c773f475
Merge #1014
1014: Add memory barriers to H7 flash driver to mitigate PGSERR errors r=lulf a=matoushybl

The stm32h7xx-hal uses only the ordering barrier, while the CubeMX uses the DSB and ISB instructions, to be on the safe side, both are used here.

Without the barrier, the PG bit is not set, when the writes are being done, resulting in an error.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-10-19 07:29:12 +00:00
Matous Hybl
9d2641f2f5 Enable defmt in embassy-hal-common 2022-10-18 22:48:43 +02:00
Matous Hybl
6c5d81ada5 Add memory barriers to H7 flash driver to mitigate PGSERR errors
The stm32h7xx-hal uses only the ordering barrier, while the CubeMX uses the DSB and ISB instructions, to be on the safe side, both are used here.
2022-10-18 22:42:02 +02:00
bors[bot]
ef533e6df4
Merge #1004
1004: Fix internal channels for adc v2 r=lulf a=chemicstry

Internal channel reading was broken on adc_v2, because `Adc::read()` requires gpio pin trait, which was not implemented by `VrefInt`, `Temperature`, `Vbat`. The required configuration bits `tsvrefe`, `vbate` were not enabled either. This PR makes it a bit closer to how adc_v4 works.

While at it, I also changed adc_v2 to use `RccPeripheral` instead of permanently enabling all ADCs.

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-10-10 06:28:41 +00:00
chemicstry
322cfafed3 Fix adc_v4 compilation 2022-10-07 14:53:03 +03:00
chemicstry
df7174ecb0 Fix internal channel reading on adc_v2 2022-10-07 14:31:55 +03:00
chrysn
6718ca3a94 all Cargo.toml: Add license to all crate Cargo.toml files
Closes: https://github.com/embassy-rs/embassy/issues/1002
2022-10-07 12:41:56 +02:00
chemicstry
9dca368c3d Use RccPeripheral for adc_v2 2022-10-07 13:29:56 +03:00
bors[bot]
aabc02506b
Merge #992
992: (embassy-stm32): remove flash lock/unlock public API from stm32 flash r=lulf a=MathiasKoch

Instead, perform the unlocking and locking automatically on erase and write operations.

This makes the `embedded-storage` abstraction actually useable in libraries, while still keeping the flash peripheral locked the majority of the time.

Co-authored-by: Mathias <mk@blackbird.online>
2022-09-30 11:32:27 +00:00
Mathias
a283c47557 Implement embedded-hal-nb for uart 2022-09-30 06:04:19 +02:00
Mathias
a7fdeac560 Remove flash lock/unlock public API from stm32 flash, and perform the unlocking and locking automatically on erase and write operations 2022-09-30 06:00:46 +02:00
Mathias
a77e2c3512 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/uart-eh1 2022-09-29 12:58:01 +02:00
Ulf Lilleengen
72c2e985bb Update embedded-hal versions and explicitly pin 2022-09-29 11:27:46 +02:00
Mathias
dc90006982 Remove code duplication on nb_read 2022-09-29 07:58:11 +02:00
Mathias
823bd714fb Add E-H1 uart blocking & nb implementation 2022-09-28 05:19:43 +02:00
Dario Nieuwenhuis
17d8d11f73 usb: make HALs depend only on embassy-usb-driver. 2022-09-27 13:16:49 +02:00
Guillaume MICHEL
daf2744716 Rework STM32 BufferedUart internals so we can split into Rx and Tx like embassy-nrf 2022-09-26 15:32:29 +02:00
Dario Nieuwenhuis
7f7c14b7bc usb: split driver trait to separate crate. 2022-09-26 12:29:27 +02:00
bors[bot]
a9efbf18c6
Merge #960
960: Add non blocking Bxcan constructor r=Dirbaio a=andyblarblar

This PR adds a non-blocking constructor to the Bxcan Can wrapper struct. This allows for the creation of the Can periferal without blocking for a sync with the Can bus.

Co-authored-by: Andrew Ealovega <Andrew@Ealovega.dev>
2022-09-26 09:39:55 +00:00
Dario Nieuwenhuis
10d1ad2343 Replace futures::future::join -> embassy_futures::join::join. 2022-09-22 16:48:35 +02:00
Dario Nieuwenhuis
a0487380da Replace futures::future::poll_fn -> core::future::poll_fn. 2022-09-22 16:42:49 +02:00
Dario Nieuwenhuis
897b72c872 Update Rust nightly.
Removes feature(generic_associated_types)
2022-09-22 16:38:14 +02:00
Andrew Ealovega
5914d80968 Add non blocking Bxcan constructor.
Signed-off-by: Andrew Ealovega <Andrew@Ealovega.dev>
2022-09-21 22:29:57 -04:00
Vincent Stakenburg
c4d5c047d7 make State::new() const, consistent with others 2022-09-15 12:34:17 +02:00
bors[bot]
22c32b5d5c
Merge #939
939: time: add more tick rates, use 1mhz as default. r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-09-04 22:13:34 +00:00
bors[bot]
6264fe39a5
Merge #839
839: Misc LoRaWAN improvements r=lulf a=timokroeger

Trying too get `embassy-lora` running on a [LoRa-E5 Dev Board](https://wiki.seeedstudio.com/LoRa_E5_Dev_Board/).
I can see the join message arriving in the The Things Network console but the device does not receive the accept message yet.
Opening this PR anyway because I think there are some nice things to decouple the lora crate from the nucleo board.

`@lulf` Could you test if this PR breaks your LoRa setup? Marking as draft for the time being.

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-09-04 07:17:23 +00:00
Dario Nieuwenhuis
5327b9c289 time: add more tick rates, use 1mhz as default. 2022-09-02 00:59:34 +02:00
Dario Nieuwenhuis
8ba421f324 Do not use cfg_if for embedded-hal-async feature gates.
Old code used `cfg_if!` because rustc still parses code inside disabled cfg's, and Rust stable at that time couldn't parse the new GAT where-clause location. This is not the case anymore.
2022-08-31 03:11:21 +02:00
Timo Kröger
308ca4b8e3 Use pub(crate) visibility for internal SPI
SubGhz provides a public interface for the radio connected to internal SPI
`#[allow(dead_code)]` is required for CI to succeed
2022-08-26 15:44:58 +02:00
Timo Kröger
84240d49ea stm32wl: Fix RCC
* `MSIRGSEL = 1` was required for MSI accept the updated MSI range
* Reorder enable and clock switching to properly handle the jump from
the default 4MHz MSI to a higher MSI freuquency
2022-08-26 15:44:58 +02:00
Timo Kröger
61c666212f stm32wl: Do not require external SPI pins for SUBGHZ
For the Seeed Studio Lora-E5 those pins conflict with the radio frontend control GPIOS (PA4 and PA5).
2022-08-26 15:42:25 +02:00
Dario Nieuwenhuis
21072bee48 split embassy-util into embassy-futures, embassy-sync. 2022-08-22 22:18:13 +02:00
Vincent Stakenburg
51359e7d24 fix lpuart implementation when there isn't one present 2022-08-19 15:27:11 +02:00
Vincent Stakenburg
a833e02363 implement support for LPUART 2022-08-19 12:05:19 +02:00
Dario Nieuwenhuis
5daa173ce4 Split embassy-time from embassy-executor. 2022-08-18 01:22:30 +02:00
Dario Nieuwenhuis
fc6e1e06b3 Remove HAL initialization from #[embassy::main] macro. 2022-08-17 22:16:46 +02:00
Dario Nieuwenhuis
67edea4168 Update to critical-section 1.0, atomic-polyfill 1.0 2022-08-17 19:01:56 +02:00
Dario Nieuwenhuis
2649f13dc7 stm32/rcc: fix unnecessary parentheses 2022-08-17 15:03:23 +02:00
Dario Nieuwenhuis
72cd015c1a stm32/sdmmc: remove cast no longer allowed on latest nightly due to nonexhaustive enum. 2022-08-17 14:44:18 +02:00
chemicstry
936473b68a Make sda/scl pullups separate as in nRF HAL 2022-08-10 12:36:15 +03:00
chemicstry
6498324b58 Implement I2C pullup configuration 2022-08-09 22:13:35 +03:00
chemicstry
206b7fd8ed Use RccPeripheral for DAC and add a hackfix for H7 2022-08-04 03:31:47 +03:00
chemicstry
5f01e56728 Merge v1, v2 DAC and update register definitions 2022-08-04 03:02:57 +03:00
Dario Nieuwenhuis
a0f1b0ee01 Split embassy crate into embassy-executor, embassy-util. 2022-07-29 23:40:36 +02:00
chemicstry
42434c75bc Make vref units explicit 2022-07-27 14:13:59 +03:00
chemicstry
b1f0d6320e Improve set_vref docs 2022-07-27 01:30:32 +03:00
chemicstry
046778fc53 Improve ADC configuration options 2022-07-27 01:17:26 +03:00