fix clocks in stm32wl rng example.

stm32: update metapac

README.md

@@ -62,9 +62,9 @@ async fn blink(pin: AnyPin) {
     loop {
         // Timekeeping is globally available, no need to mess with hardware timers.
         led.set_high();
-        Timer::after(Duration::from_millis(150)).await;
+        Timer::after_millis(150).await;
         led.set_low();
-        Timer::after(Duration::from_millis(150)).await;
+        Timer::after_millis(150).await;
     }
 }
 

ci.sh

@@ -1,9 +1,12 @@
 #!/bin/bash
 
-set -euo pipefail
+set -eo pipefail
 
 export RUSTFLAGS=-Dwarnings
 export DEFMT_LOG=trace,embassy_hal_internal=debug,embassy_net_esp_hosted=debug,cyw43=info,cyw43_pio=info,smoltcp=info
+if [[ -z "${CARGO_TARGET_DIR}" ]]; then
+    export CARGO_TARGET_DIR=target_ci
+fi
 
 TARGET=$(rustc -vV | sed -n 's|host: ||p')
 
@@ -36,7 +39,7 @@ cargo batch  \
     --- build --release --manifest-path embassy-time/Cargo.toml --target thumbv6m-none-eabi --features nightly,defmt,defmt-timestamp-uptime,tick-hz-32_768,generic-queue-8 \
     --- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv4,medium-ethernet \
     --- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet \
-    --- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,nightly \
+    --- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,nightly,dhcpv4-hostname \
     --- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ethernet \
     --- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ieee802154 \
     --- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ethernet,medium-ieee802154 \
@@ -66,62 +69,68 @@ cargo batch  \
     --- build --release --manifest-path embassy-rp/Cargo.toml --target thumbv6m-none-eabi --features nightly \
     --- build --release --manifest-path embassy-rp/Cargo.toml --target thumbv6m-none-eabi --features nightly,intrinsics \
     --- build --release --manifest-path embassy-rp/Cargo.toml --target thumbv6m-none-eabi --features nightly,qspi-as-gpio \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,time-driver-any,unstable-traits \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,time \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,unstable-traits \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f401ve,defmt,exti,time-driver-any,unstable-traits \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f405zg,defmt,exti,time-driver-any,unstable-traits \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f407zg,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f410tb,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f411ce,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f412zg,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f413vh,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f415zg,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f417zg,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f423zh,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f427zi,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f429zi,log,exti,time-driver-any,unstable-traits,embedded-sdmmc \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f437zi,log,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f439zi,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f446ze,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f469zi,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f479zi,defmt,exti,time-driver-any,unstable-traits,embedded-sdmmc \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f730i8,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h753zi,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h735zg,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h7b3ai,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l476vg,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l422cb,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wb15cc,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l072cz,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l041f6,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l073cz,defmt,exti,time-driver-any,unstable-traits,low-power \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32l151cb-a,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f398ve,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f378cc,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32g0c1ve,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f217zg,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features nightly,stm32l552ze,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32wl54jc-cm0p,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wle5jb,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32g474pe,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f107vc,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f103re,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f100c4,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32h503rb,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32h562ag,defmt,exti,time-driver-any,unstable-traits \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f401ve,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f405zg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f407zg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f410tb,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f411ce,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f412zg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f413vh,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f415zg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f417zg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f423zh,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f427zi,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f429zi,log,exti,time-driver-any,unstable-traits,embedded-sdmmc,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f437zi,log,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f439zi,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f446ze,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f469zi,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f479zi,defmt,exti,time-driver-any,unstable-traits,embedded-sdmmc,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f730i8,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h753zi,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h735zg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h7b3ai,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l476vg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l422cb,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wb15cc,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l072cz,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l041f6,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l073cz,defmt,exti,time-driver-any,unstable-traits,low-power,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32l151cb-a,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f398ve,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f378cc,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32g0c1ve,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f217zg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features nightly,stm32l552ze,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32wl54jc-cm0p,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wle5jb,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32g474pe,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f107vc,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f103re,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f100c4,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32h503rb,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32h562ag,defmt,exti,time-driver-any,unstable-traits,time \
     --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features ''\
     --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'log' \
     --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'defmt' \
@@ -195,6 +204,7 @@ cargo batch  \
     --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f207zg --out-dir out/tests/stm32f207zg \
     --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f303ze --out-dir out/tests/stm32f303ze \
     --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l496zg --out-dir out/tests/stm32l496zg \
+    --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wl55jc --out-dir out/tests/stm32wl55jc \
     --- build --release --manifest-path tests/rp/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/rpi-pico \
     --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv7em-none-eabi --out-dir out/tests/nrf52840-dk \
     --- build --release --manifest-path tests/riscv32/Cargo.toml --target riscv32imac-unknown-none-elf \
@@ -203,7 +213,7 @@ cargo batch  \
 
 rm out/tests/stm32wb55rg/wpan_mac
 rm out/tests/stm32wb55rg/wpan_ble
-
+rm out/tests/stm32f207zg/eth
 
 if [[ -z "${TELEPROBE_TOKEN-}" ]]; then
     echo No teleprobe token found, skipping running HIL tests

ci_stable.sh

@@ -40,33 +40,38 @@ cargo batch  \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585zi,defmt,exti,time-driver-any,unstable-traits \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55vy,defmt,exti,time-driver-any,unstable-traits \
     --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wl55cc-cm4,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l4r9zi,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f303vc,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f411ce,defmt,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f411ce,defmt,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi,log,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi,log,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi-cm7,defmt,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi-cm7,defmt,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f410tb,defmt,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f410tb,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi,log,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi,log,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi-cm7,defmt,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,exti,time-driver-any,unstable-traits \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f217zg,defmt,exti,time-driver-any \
-    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f217zg,defmt,exti,time-driver-any,unstable-traits \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g473cc,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585zi,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55vy,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wl55cc-cm4,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l4r9zi,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f303vc,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f411ce,defmt,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f411ce,defmt,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi,log,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi,log,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi-cm7,defmt,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi-cm7,defmt,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f410tb,defmt,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f410tb,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi,log,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi,log,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi-cm7,defmt,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,exti,time-driver-any,unstable-traits,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f217zg,defmt,exti,time-driver-any,time \
+    --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f217zg,defmt,exti,time-driver-any,unstable-traits,time \
     --- build --release --manifest-path examples/nrf52840/Cargo.toml --target thumbv7em-none-eabi --no-default-features --out-dir out/examples/nrf52840 --bin raw_spawn \
     --- build --release --manifest-path examples/stm32l0/Cargo.toml --target thumbv6m-none-eabi --no-default-features --out-dir out/examples/stm32l0 --bin raw_spawn \

cyw43/Cargo.toml

@@ -11,11 +11,10 @@ log = ["dep:log"]
 firmware-logs = []
 
 [dependencies]
-embassy-time = { version = "0.1.3", path = "../embassy-time"}
+embassy-time = { version = "0.1.5", path = "../embassy-time"}
 embassy-sync = { version = "0.3.0", path = "../embassy-sync"}
 embassy-futures = { version = "0.1.0", path = "../embassy-futures"}
-embassy-net-driver-channel = { version = "0.1.0", path = "../embassy-net-driver-channel"}
-atomic-polyfill = "0.1.5"
+embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel"}
 
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.17", optional = true }

cyw43/src/bus.rs

@@ -1,5 +1,5 @@
 use embassy_futures::yield_now;
-use embassy_time::{Duration, Timer};
+use embassy_time::Timer;
 use embedded_hal_1::digital::OutputPin;
 use futures::FutureExt;
 
@@ -51,9 +51,9 @@ where
     pub async fn init(&mut self) {
         // Reset
         self.pwr.set_low().unwrap();
-        Timer::after(Duration::from_millis(20)).await;
+        Timer::after_millis(20).await;
         self.pwr.set_high().unwrap();
-        Timer::after(Duration::from_millis(250)).await;
+        Timer::after_millis(250).await;
 
         while self
             .read32_swapped(REG_BUS_TEST_RO)

cyw43/src/control.rs

@@ -2,7 +2,7 @@ use core::cmp::{max, min};
 
 use ch::driver::LinkState;
 use embassy_net_driver_channel as ch;
-use embassy_time::{Duration, Timer};
+use embassy_time::Timer;
 
 pub use crate::bus::SpiBusCyw43;
 use crate::consts::*;
@@ -87,22 +87,22 @@ impl<'a> Control<'a> {
         self.set_iovar("country", &country_info.to_bytes()).await;
 
         // set country takes some time, next ioctls fail if we don't wait.
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
 
         // Set antenna to chip antenna
         self.ioctl_set_u32(IOCTL_CMD_ANTDIV, 0, 0).await;
 
         self.set_iovar_u32("bus:txglom", 0).await;
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
         //self.set_iovar_u32("apsta", 1).await; // this crashes, also we already did it before...??
-        //Timer::after(Duration::from_millis(100)).await;
+        //Timer::after_millis(100).await;
         self.set_iovar_u32("ampdu_ba_wsize", 8).await;
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
         self.set_iovar_u32("ampdu_mpdu", 4).await;
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
         //self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes
 
-        //Timer::after(Duration::from_millis(100)).await;
+        //Timer::after_millis(100).await;
 
         // evts
         let mut evts = EventMask {
@@ -121,17 +121,17 @@ impl<'a> Control<'a> {
 
         self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await;
 
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
 
         // set wifi up
         self.up().await;
 
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
 
         self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto
         self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any
 
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
 
         self.state_ch.set_ethernet_address(mac_addr);
 
@@ -185,7 +185,7 @@ impl<'a> Control<'a> {
         self.set_iovar_u32x2("bsscfg:sup_wpa2_eapver", 0, 0xFFFF_FFFF).await;
         self.set_iovar_u32x2("bsscfg:sup_wpa_tmo", 0, 2500).await;
 
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
 
         let mut pfi = PassphraseInfo {
             len: passphrase.len() as _,
@@ -297,7 +297,7 @@ impl<'a> Control<'a> {
         if security != Security::OPEN {
             self.set_iovar_u32x2("bsscfg:wpa_auth", 0, 0x0084).await; // wpa_auth = WPA2_AUTH_PSK | WPA_AUTH_PSK
 
-            Timer::after(Duration::from_millis(100)).await;
+            Timer::after_millis(100).await;
 
             // Set passphrase
             let mut pfi = PassphraseInfo {

cyw43/src/runner.rs

@@ -555,14 +555,14 @@ where
 
         self.bus.bp_write8(base + AI_RESETCTRL_OFFSET, 0).await;
 
-        Timer::after(Duration::from_millis(1)).await;
+        Timer::after_millis(1).await;
 
         self.bus
             .bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN)
             .await;
         let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await;
 
-        Timer::after(Duration::from_millis(1)).await;
+        Timer::after_millis(1).await;
     }
 
     async fn core_is_up(&mut self, core: Core) -> bool {

docs/modules/ROOT/examples/basic/Cargo.toml

@@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
 
 [dependencies]
 embassy-executor = { version = "0.3.0", path = "../../../../../embassy-executor", features = ["defmt", "nightly", "integrated-timers", "arch-cortex-m", "executor-thread"] }
-embassy-time = { version = "0.1.0", path = "../../../../../embassy-time", features = ["defmt", "nightly"] }
+embassy-time = { version = "0.1.4", path = "../../../../../embassy-time", features = ["defmt", "nightly"] }
 embassy-nrf = { version = "0.1.0", path = "../../../../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "nightly"] }
 
 defmt = "0.3"

docs/modules/ROOT/pages/runtime.adoc

@@ -6,7 +6,7 @@ The Embassy executor is an async/await executor designed for embedded usage alon
 
 * No `alloc`, no heap needed. Task are statically allocated.
 * No "fixed capacity" data structures, executor works with 1 or 1000 tasks without needing config/tuning.
-* Integrated timer queue: sleeping is easy, just do `Timer::after(Duration::from_secs(1)).await;`.
+* Integrated timer queue: sleeping is easy, just do `Timer::after_secs(1).await;`.
 * No busy-loop polling: CPU sleeps when there's no work to do, using interrupts or `WFE/SEV`.
 * Efficient polling: a wake will only poll the woken task, not all of them.
 * Fair: a task can't monopolize CPU time even if it's constantly being woken. All other tasks get a chance to run before a given task gets polled for the second time.

embassy-embedded-hal/Cargo.toml

@@ -21,7 +21,7 @@ default = ["time"]
 [dependencies]
 embassy-futures = { version = "0.1.0", path = "../embassy-futures", optional = true }
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
-embassy-time = { version = "0.1.3", path = "../embassy-time", optional = true }
+embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = [
     "unproven",
 ] }

embassy-embedded-hal/src/flash/partition/mod.rs

@@ -11,7 +11,7 @@ pub use asynch::Partition;
 pub use blocking::BlockingPartition;
 
 /// Partition error
-#[derive(Debug)]
+#[derive(Debug, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Error<T> {
     /// The requested flash area is outside the partition

embassy-embedded-hal/src/shared_bus/asynch/spi.rs

@@ -76,9 +76,7 @@ where
                     #[cfg(not(feature = "time"))]
                     Operation::DelayUs(_) => return Err(SpiDeviceError::DelayUsNotSupported),
                     #[cfg(feature = "time")]
-                    Operation::DelayUs(us) => {
-                        embassy_time::Timer::after(embassy_time::Duration::from_micros(*us as _)).await
-                    }
+                    Operation::DelayUs(us) => embassy_time::Timer::after_micros(*us as _).await,
                 }
             }
         };
@@ -143,9 +141,7 @@ where
                     #[cfg(not(feature = "time"))]
                     Operation::DelayUs(_) => return Err(SpiDeviceError::DelayUsNotSupported),
                     #[cfg(feature = "time")]
-                    Operation::DelayUs(us) => {
-                        embassy_time::Timer::after(embassy_time::Duration::from_micros(*us as _)).await
-                    }
+                    Operation::DelayUs(us) => embassy_time::Timer::after_micros(*us as _).await,
                 }
             }
         };

embassy-executor/Cargo.toml

@@ -59,7 +59,7 @@ rtos-trace = { version = "0.1.2", optional = true }
 
 futures-util = { version = "0.3.17", default-features = false }
 embassy-macros = { version = "0.2.1", path = "../embassy-macros" }
-embassy-time = { version = "0.1.3", path = "../embassy-time", optional = true}
+embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true}
 atomic-polyfill = "1.0.1"
 critical-section = "1.1"
 static_cell = "1.1"

embassy-executor/README.md

@@ -4,7 +4,7 @@ An async/await executor designed for embedded usage.
 
 - No `alloc`, no heap needed. Task futures are statically allocated.
 - No "fixed capacity" data structures, executor works with 1 or 1000 tasks without needing config/tuning.
-- Integrated timer queue: sleeping is easy, just do `Timer::after(Duration::from_secs(1)).await;`.
+- Integrated timer queue: sleeping is easy, just do `Timer::after_secs(1).await;`.
 - No busy-loop polling: CPU sleeps when there's no work to do, using interrupts or `WFE/SEV`.
 - Efficient polling: a wake will only poll the woken task, not all of them.
 - Fair: a task can't monopolize CPU time even if it's constantly being woken. All other tasks get a chance to run before a given task gets polled for the second time.

embassy-hal-internal/README.md

@@ -1,4 +1,4 @@
-# embassy-macros
+# embassy-hal-internal
 
 An [Embassy](https://embassy.dev) project.
 

embassy-hal-internal/src/interrupt.rs

@@ -4,6 +4,7 @@ use core::sync::atomic::{compiler_fence, Ordering};
 
 use cortex_m::interrupt::InterruptNumber;
 use cortex_m::peripheral::NVIC;
+use critical_section::CriticalSection;
 
 /// Generate a standard `mod interrupt` for a HAL.
 #[macro_export]
@@ -91,6 +92,12 @@ macro_rules! interrupt_mod {
                     fn set_priority(prio: crate::interrupt::Priority) {
                         Self::IRQ.set_priority(prio)
                     }
+
+                    /// Set the interrupt priority with an already-acquired critical section
+                    #[inline]
+                    fn set_priority_with_cs(cs: critical_section::CriticalSection, prio: crate::interrupt::Priority) {
+                        Self::IRQ.set_priority_with_cs(cs, prio)
+                    }
                 }
 
                 $(
@@ -195,10 +202,29 @@ pub unsafe trait InterruptExt: InterruptNumber + Copy {
     /// Set the interrupt priority.
     #[inline]
     fn set_priority(self, prio: Priority) {
-        critical_section::with(|_| unsafe {
+        unsafe {
             let mut nvic: cortex_m::peripheral::NVIC = mem::transmute(());
-            nvic.set_priority(self, prio.into())
-        })
+
+            // On thumbv6, set_priority must do a RMW to change 8bit in a 32bit reg.
+            #[cfg(armv6m)]
+            critical_section::with(|_| nvic.set_priority(self, prio.into()));
+            // On thumbv7+, set_priority does an atomic 8bit write, so no CS needed.
+            #[cfg(not(armv6m))]
+            nvic.set_priority(self, prio.into());
+        }
+    }
+
+    /// Set the interrupt priority with an already-acquired critical section
+    ///
+    /// Equivalent to `set_priority`, except you pass a `CriticalSection` to prove
+    /// you've already acquired a critical section. This prevents acquiring another
+    /// one, which saves code size.
+    #[inline]
+    fn set_priority_with_cs(self, _cs: CriticalSection, prio: Priority) {
+        unsafe {
+            let mut nvic: cortex_m::peripheral::NVIC = mem::transmute(());
+            nvic.set_priority(self, prio.into());
+        }
     }
 }
 

embassy-hal-internal/src/lib.rs

@@ -10,7 +10,6 @@ pub mod drop;
 mod macros;
 mod peripheral;
 pub mod ratio;
-pub mod ring_buffer;
 pub use peripheral::{Peripheral, PeripheralRef};
 
 #[cfg(feature = "cortex-m")]

embassy-hal-internal/src/macros.rs

@@ -48,17 +48,23 @@ macro_rules! peripherals_struct {
             ///Returns all the peripherals *once*
             #[inline]
             pub(crate) fn take() -> Self {
+                critical_section::with(Self::take_with_cs)
+            }
 
+            ///Returns all the peripherals *once*
+            #[inline]
+            pub(crate) fn take_with_cs(_cs: critical_section::CriticalSection) -> Self {
                 #[no_mangle]
                 static mut _EMBASSY_DEVICE_PERIPHERALS: bool = false;
 
-                critical_section::with(|_| unsafe {
+                // safety: OK because we're inside a CS.
+                unsafe {
                     if _EMBASSY_DEVICE_PERIPHERALS {
                         panic!("init called more than once!")
                     }
                     _EMBASSY_DEVICE_PERIPHERALS = true;
                     Self::steal()
-                })
+                }
             }
         }
 

embassy-hal-internal/src/ring_buffer.rs

@@ -1,136 +0,0 @@
-pub struct RingBuffer<'a> {
-    buf: &'a mut [u8],
-    start: usize,
-    end: usize,
-    empty: bool,
-}
-
-impl<'a> RingBuffer<'a> {
-    pub fn new(buf: &'a mut [u8]) -> Self {
-        Self {
-            buf,
-            start: 0,
-            end: 0,
-            empty: true,
-        }
-    }
-
-    pub fn push_buf(&mut self) -> &mut [u8] {
-        if self.start == self.end && !self.empty {
-            trace!("  ringbuf: push_buf empty");
-            return &mut self.buf[..0];
-        }
-
-        let n = if self.start <= self.end {
-            self.buf.len() - self.end
-        } else {
-            self.start - self.end
-        };
-
-        trace!("  ringbuf: push_buf {:?}..{:?}", self.end, self.end + n);
-        &mut self.buf[self.end..self.end + n]
-    }
-
-    pub fn push(&mut self, n: usize) {
-        trace!("  ringbuf: push {:?}", n);
-        if n == 0 {
-            return;
-        }
-
-        self.end = self.wrap(self.end + n);
-        self.empty = false;
-    }
-
-    pub fn pop_buf(&mut self) -> &mut [u8] {
-        if self.empty {
-            trace!("  ringbuf: pop_buf empty");
-            return &mut self.buf[..0];
-        }
-
-        let n = if self.end <= self.start {
-            self.buf.len() - self.start
-        } else {
-            self.end - self.start
-        };
-
-        trace!("  ringbuf: pop_buf {:?}..{:?}", self.start, self.start + n);
-        &mut self.buf[self.start..self.start + n]
-    }
-
-    pub fn pop(&mut self, n: usize) {
-        trace!("  ringbuf: pop {:?}", n);
-        if n == 0 {
-            return;
-        }
-
-        self.start = self.wrap(self.start + n);
-        self.empty = self.start == self.end;
-    }
-
-    pub fn is_full(&self) -> bool {
-        self.start == self.end && !self.empty
-    }
-
-    pub fn is_empty(&self) -> bool {
-        self.empty
-    }
-
-    pub fn clear(&mut self) {
-        self.start = 0;
-        self.end = 0;
-        self.empty = true;
-    }
-
-    fn wrap(&self, n: usize) -> usize {
-        assert!(n <= self.buf.len());
-        if n == self.buf.len() {
-            0
-        } else {
-            n
-        }
-    }
-}
-
-#[cfg(test)]
-mod tests {
-    use super::*;
-
-    #[test]
-    fn push_pop() {
-        let mut b = [0; 4];
-        let mut rb = RingBuffer::new(&mut b);
-        let buf = rb.push_buf();
-        assert_eq!(4, buf.len());
-        buf[0] = 1;
-        buf[1] = 2;
-        buf[2] = 3;
-        buf[3] = 4;
-        rb.push(4);
-
-        let buf = rb.pop_buf();
-        assert_eq!(4, buf.len());
-        assert_eq!(1, buf[0]);
-        rb.pop(1);
-
-        let buf = rb.pop_buf();
-        assert_eq!(3, buf.len());
-        assert_eq!(2, buf[0]);
-        rb.pop(1);
-
-        let buf = rb.pop_buf();
-        assert_eq!(2, buf.len());
-        assert_eq!(3, buf[0]);
-        rb.pop(1);
-
-        let buf = rb.pop_buf();
-        assert_eq!(1, buf.len());
-        assert_eq!(4, buf[0]);
-        rb.pop(1);
-
-        let buf = rb.pop_buf();
-        assert_eq!(0, buf.len());
-
-        let buf = rb.push_buf();
-        assert_eq!(4, buf.len());
-    }
-}

embassy-lora/Cargo.toml

@@ -20,7 +20,7 @@ defmt = ["dep:defmt", "lorawan-device/defmt"]
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
 
-embassy-time = { version = "0.1.3", path = "../embassy-time", optional = true }
+embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32", default-features = false, optional = true }
 embedded-hal-async = { version = "=1.0.0-rc.1" }

embassy-lora/src/lib.rs

@@ -34,6 +34,6 @@ impl lorawan_device::async_device::radio::Timer for LoraTimer {
     }
 
     async fn delay_ms(&mut self, millis: u64) {
-        Timer::after(Duration::from_millis(millis)).await
+        Timer::after_millis(millis).await
     }
 }

embassy-net-adin1110/Cargo.toml

@@ -16,8 +16,8 @@ log = { version = "0.4", default-features = false, optional = true }
 embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-rc.1" }
 embedded-hal-async = { version = "=1.0.0-rc.1" }
 embedded-hal-bus = { version = "=0.1.0-rc.1", features = ["async"] }
-embassy-net-driver-channel = { version = "0.1.0", path = "../embassy-net-driver-channel" }
-embassy-time = { version = "0.1.3" }
+embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" }
+embassy-time = { version = "0.1.5", path = "../embassy-time" }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 bitfield = "0.14.0"
 

embassy-net-adin1110/src/lib.rs

@@ -20,7 +20,7 @@ pub use crc32::ETH_FCS;
 use crc8::crc8;
 use embassy_futures::select::{select, Either};
 use embassy_net_driver_channel as ch;
-use embassy_time::{Duration, Timer};
+use embassy_time::Timer;
 use embedded_hal_1::digital::OutputPin;
 use embedded_hal_async::digital::Wait;
 use embedded_hal_async::spi::{Error, Operation, SpiDevice};
@@ -609,12 +609,12 @@ pub async fn new<const N_RX: usize, const N_TX: usize, SPI: SpiDevice, INT: Wait
     reset.set_low().unwrap();
 
     // Wait t1: 20-43mS
-    Timer::after(Duration::from_millis(30)).await;
+    Timer::after_millis(30).await;
 
     reset.set_high().unwrap();
 
     // Wait t3: 50mS
-    Timer::after(Duration::from_millis(50)).await;
+    Timer::after_millis(50).await;
 
     // Create device
     let mut mac = ADIN1110::new(spi_dev, spi_crc, append_fcs_on_tx);

embassy-net-driver-channel/CHANGELOG.md

@@ -0,0 +1,18 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## 0.2.0 - 2023-10-15
+
+- Update embassy-net-driver
+- `Runner::new` now takes an `embassy_net_driver::HardwareAddress` parameter
+- Added `Runner::set_ieee802154_address`, `Runner::ieee802154_address`
+
+## 0.1.0 - 2023-06-29
+
+- First release
+
+

embassy-net-driver-channel/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "embassy-net-driver-channel"
-version = "0.1.0"
+version = "0.2.0"
 edition = "2021"
 license = "MIT OR Apache-2.0"
 description = "High-level channel-based driver for the `embassy-net` async TCP/IP network stack."
@@ -26,4 +26,4 @@ log = { version = "0.4.14", optional = true }
 
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
-embassy-net-driver = { version = "0.1.0", path = "../embassy-net-driver" }
+embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }

embassy-net-driver/CHANGELOG.md

@@ -0,0 +1,17 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## 0.2.0 - 2023-10-15
+
+- Added `Driver::ieee802154_address`
+- Added `Medium::Ieee802154`
+
+## 0.1.0 - 2023-06-29
+
+- First release
+
+

embassy-net-driver/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "embassy-net-driver"
-version = "0.1.0"
+version = "0.2.0"
 edition = "2021"
 license = "MIT OR Apache-2.0"
 description = "Driver trait for the `embassy-net` async TCP/IP network stack."

embassy-net-enc28j60/Cargo.toml

@@ -10,8 +10,8 @@ edition = "2021"
 [dependencies]
 embedded-hal = { version = "1.0.0-rc.1" }
 embedded-hal-async = { version = "=1.0.0-rc.1" }
-embassy-net-driver = { version = "0.1.0", path = "../embassy-net-driver" }
-embassy-time = { version = "0.1.3", path = "../embassy-time" }
+embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
+embassy-time = { version = "0.1.5", path = "../embassy-time" }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 
 defmt = { version = "0.3", optional = true }

embassy-net-esp-hosted/Cargo.toml

@@ -7,10 +7,10 @@ edition = "2021"
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
 
-embassy-time = { version = "0.1.3", path = "../embassy-time" }
+embassy-time = { version = "0.1.5", path = "../embassy-time" }
 embassy-sync = { version = "0.3.0", path = "../embassy-sync"}
 embassy-futures = { version = "0.1.0", path = "../embassy-futures"}
-embassy-net-driver-channel = { version = "0.1.0", path = "../embassy-net-driver-channel"}
+embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel"}
 
 embedded-hal = { version = "1.0.0-rc.1" }
 embedded-hal-async = { version = "=1.0.0-rc.1" }

embassy-net-esp-hosted/src/lib.rs

@@ -169,9 +169,9 @@ where
     pub async fn run(mut self) -> ! {
         debug!("resetting...");
         self.reset.set_low().unwrap();
-        Timer::after(Duration::from_millis(100)).await;
+        Timer::after_millis(100).await;
         self.reset.set_high().unwrap();
-        Timer::after(Duration::from_millis(1000)).await;
+        Timer::after_millis(1000).await;
 
         let mut tx_buf = [0u8; MAX_SPI_BUFFER_SIZE];
         let mut rx_buf = [0u8; MAX_SPI_BUFFER_SIZE];

embassy-net-ppp/Cargo.toml

@@ -15,8 +15,8 @@ log = ["dep:log", "ppproto/log"]
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
 
-embedded-io-async = { version = "0.5.0" }
-embassy-net-driver-channel = { version = "0.1.0", path = "../embassy-net-driver-channel" }
+embedded-io-async = { version = "0.6.0" }
+embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 ppproto = { version = "0.1.2"}
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }

embassy-net-ppp/src/lib.rs

@@ -11,7 +11,7 @@ use core::mem::MaybeUninit;
 use embassy_futures::select::{select, Either};
 use embassy_net_driver_channel as ch;
 use embassy_net_driver_channel::driver::LinkState;
-use embedded_io_async::{BufRead, Write, WriteAllError};
+use embedded_io_async::{BufRead, Write};
 use ppproto::pppos::{BufferFullError, PPPoS, PPPoSAction};
 pub use ppproto::{Config, Ipv4Status};
 
@@ -49,23 +49,12 @@ pub enum RunError<E> {
     Read(E),
     /// Writing to the serial port failed.
     Write(E),
-    /// Writing to the serial port wrote zero bytes, indicating it can't accept more data.
-    WriteZero,
     /// Writing to the serial got EOF.
     Eof,
     /// PPP protocol was terminated by the peer
     Terminated,
 }
 
-impl<E> From<WriteAllError<E>> for RunError<E> {
-    fn from(value: WriteAllError<E>) -> Self {
-        match value {
-            WriteAllError::Other(e) => Self::Write(e),
-            WriteAllError::WriteZero => Self::WriteZero,
-        }
-    }
-}
-
 impl<'d> Runner<'d> {
     /// You must call this in a background task for the driver to operate.
     ///
@@ -125,7 +114,7 @@ impl<'d> Runner<'d> {
                             buf[..pkt.len()].copy_from_slice(pkt);
                             rx_chan.rx_done(pkt.len());
                         }
-                        PPPoSAction::Transmit(n) => rw.write_all(&tx_buf[..n]).await?,
+                        PPPoSAction::Transmit(n) => rw.write_all(&tx_buf[..n]).await.map_err(RunError::Write)?,
                     }
 
                     let status = ppp.status();
@@ -148,7 +137,7 @@ impl<'d> Runner<'d> {
                 }
                 Either::Second(pkt) => {
                     match ppp.send(pkt, &mut tx_buf) {
-                        Ok(n) => rw.write_all(&tx_buf[..n]).await?,
+                        Ok(n) => rw.write_all(&tx_buf[..n]).await.map_err(RunError::Write)?,
                         Err(BufferFullError) => unreachable!(),
                     }
                     tx_chan.tx_done();

embassy-net-tuntap/Cargo.toml

@@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0"
 edition = "2021"
 
 [dependencies]
-embassy-net-driver = { version = "0.1.0", path = "../embassy-net-driver" }
+embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
 async-io = "1.6.0"
 log = "0.4.14"
 libc = "0.2.101"

embassy-net-wiznet/Cargo.toml

@@ -10,8 +10,8 @@ edition = "2021"
 [dependencies]
 embedded-hal = { version = "1.0.0-rc.1" }
 embedded-hal-async = { version = "=1.0.0-rc.1" }
-embassy-net-driver-channel = { version = "0.1.0", path = "../embassy-net-driver-channel" }
-embassy-time = { version = "0.1.3", path = "../embassy-time" }
+embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" }
+embassy-time = { version = "0.1.5", path = "../embassy-time" }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 defmt = { version = "0.3", optional = true }
 

embassy-net-wiznet/src/lib.rs

@@ -8,7 +8,7 @@ mod device;
 use embassy_futures::select::{select, Either};
 use embassy_net_driver_channel as ch;
 use embassy_net_driver_channel::driver::LinkState;
-use embassy_time::{Duration, Timer};
+use embassy_time::Timer;
 use embedded_hal::digital::OutputPin;
 use embedded_hal_async::digital::Wait;
 use embedded_hal_async::spi::SpiDevice;
@@ -95,12 +95,12 @@ pub async fn new<'a, const N_RX: usize, const N_TX: usize, C: Chip, SPI: SpiDevi
     // Reset the chip.
     reset.set_low().ok();
     // Ensure the reset is registered.
-    Timer::after(Duration::from_millis(1)).await;
+    Timer::after_millis(1).await;
     reset.set_high().ok();
 
     // Wait for PLL lock. Some chips are slower than others.
     // Slowest is w5100s which is 100ms, so let's just wait that.
-    Timer::after(Duration::from_millis(100)).await;
+    Timer::after_millis(100).await;
 
     let mac = WiznetDevice::new(spi_dev, mac_addr).await.unwrap();
 

embassy-net/CHANGELOG.md

@@ -0,0 +1,31 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## 0.2.0 - 2023-10-15
+
+- Re-export `smoltcp::wire::IpEndpoint`
+- Add poll functions on UdpSocket
+- Make dual-stack work in embassy-net
+- Fix multicast support
+- Allow ethernet and 802.15.4 to coexist
+- Add IEEE802.15.4 address to embassy net Stack
+- Use HardwareAddress in Driver
+- Add async versions of smoltcp's `send` and `recv` closure based API
+- add error translation to tcp errors
+- Forward TCP/UDP socket capacity impls
+- allow changing IP config at runtime
+- allow non-'static drivers
+- Remove impl_trait_projections
+- update embedded-io, embedded-nal-async
+- add support for dhcp hostname option
+- Wake stack's task after queueing a DNS query
+
+## 0.1.0 - 2023-06-29
+
+- First release
+
+

embassy-net/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "embassy-net"
-version = "0.1.0"
+version = "0.2.0"
 edition = "2021"
 license = "MIT OR Apache-2.0"
 description = "Async TCP/IP network stack for embedded systems"
@@ -33,6 +33,7 @@ udp = ["smoltcp/socket-udp"]
 tcp = ["smoltcp/socket-tcp"]
 dns = ["smoltcp/socket-dns", "smoltcp/proto-dns"]
 dhcpv4 = ["proto-ipv4", "medium-ethernet", "smoltcp/socket-dhcpv4"]
+dhcpv4-hostname = ["dhcpv4"]
 proto-ipv4 = ["smoltcp/proto-ipv4"]
 proto-ipv6 = ["smoltcp/proto-ipv6"]
 medium-ethernet = ["smoltcp/medium-ethernet"]
@@ -50,10 +51,10 @@ smoltcp = { version = "0.10.0", default-features = false, features = [
   "async",
 ] }
 
-embassy-net-driver = { version = "0.1.0", path = "../embassy-net-driver" }
-embassy-time = { version = "0.1.3", path = "../embassy-time" }
+embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
+embassy-time = { version = "0.1.5", path = "../embassy-time" }
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
-embedded-io-async = { version = "0.5.0", optional = true }
+embedded-io-async = { version = "0.6.0", optional = true }
 
 managed = { version = "0.8.0", default-features = false, features = [ "map" ] }
 heapless = { version = "0.7.5", default-features = false }
@@ -62,5 +63,4 @@ generic-array = { version = "0.14.4", default-features = false }
 stable_deref_trait = { version = "1.2.0", default-features = false }
 futures = { version = "0.3.17", default-features = false, features = [ "async-await" ] }
 atomic-pool = "1.0"
-embedded-nal-async = { version = "0.5.0", optional = true }
-atomic-polyfill = { version = "1.0" }
+embedded-nal-async = { version = "0.6.0", optional = true }

embassy-net/src/lib.rs

@@ -39,7 +39,7 @@ use smoltcp::socket::dhcpv4::{self, RetryConfig};
 pub use smoltcp::wire::EthernetAddress;
 #[cfg(any(feature = "medium-ethernet", feature = "medium-ieee802154", feature = "medium-ip"))]
 pub use smoltcp::wire::HardwareAddress;
-#[cfg(feature = "udp")]
+#[cfg(any(feature = "udp", feature = "tcp"))]
 pub use smoltcp::wire::IpListenEndpoint;
 #[cfg(feature = "medium-ieee802154")]
 pub use smoltcp::wire::{Ieee802154Address, Ieee802154Frame};
@@ -56,12 +56,22 @@ const LOCAL_PORT_MIN: u16 = 1025;
 const LOCAL_PORT_MAX: u16 = 65535;
 #[cfg(feature = "dns")]
 const MAX_QUERIES: usize = 4;
+#[cfg(feature = "dhcpv4-hostname")]
+const MAX_HOSTNAME_LEN: usize = 32;
 
 /// Memory resources needed for a network stack.
 pub struct StackResources<const SOCK: usize> {
     sockets: [SocketStorage<'static>; SOCK],
     #[cfg(feature = "dns")]
     queries: [Option<dns::DnsQuery>; MAX_QUERIES],
+    #[cfg(feature = "dhcpv4-hostname")]
+    hostname: core::cell::UnsafeCell<HostnameResources>,
+}
+
+#[cfg(feature = "dhcpv4-hostname")]
+struct HostnameResources {
+    option: smoltcp::wire::DhcpOption<'static>,
+    data: [u8; MAX_HOSTNAME_LEN],
 }
 
 impl<const SOCK: usize> StackResources<SOCK> {
@@ -73,6 +83,11 @@ impl<const SOCK: usize> StackResources<SOCK> {
             sockets: [SocketStorage::EMPTY; SOCK],
             #[cfg(feature = "dns")]
             queries: [INIT; MAX_QUERIES],
+            #[cfg(feature = "dhcpv4-hostname")]
+            hostname: core::cell::UnsafeCell::new(HostnameResources {
+                option: smoltcp::wire::DhcpOption { kind: 0, data: &[] },
+                data: [0; MAX_HOSTNAME_LEN],
+            }),
         }
     }
 }
@@ -104,6 +119,7 @@ pub struct StaticConfigV6 {
 /// DHCP configuration.
 #[cfg(feature = "dhcpv4")]
 #[derive(Debug, Clone, PartialEq, Eq)]
+#[non_exhaustive]
 pub struct DhcpConfig {
     /// Maximum lease duration.
     ///
@@ -120,6 +136,9 @@ pub struct DhcpConfig {
     pub server_port: u16,
     /// Client port. This is almost always 68. Do not change unless you know what you're doing.
     pub client_port: u16,
+    /// Our hostname. This will be sent to the DHCP server as Option 12.
+    #[cfg(feature = "dhcpv4-hostname")]
+    pub hostname: Option<heapless::String<MAX_HOSTNAME_LEN>>,
 }
 
 #[cfg(feature = "dhcpv4")]
@@ -131,6 +150,8 @@ impl Default for DhcpConfig {
             ignore_naks: Default::default(),
             server_port: smoltcp::wire::DHCP_SERVER_PORT,
             client_port: smoltcp::wire::DHCP_CLIENT_PORT,
+            #[cfg(feature = "dhcpv4-hostname")]
+            hostname: None,
         }
     }
 }
@@ -232,6 +253,8 @@ struct Inner<D: Driver> {
     dns_socket: SocketHandle,
     #[cfg(feature = "dns")]
     dns_waker: WakerRegistration,
+    #[cfg(feature = "dhcpv4-hostname")]
+    hostname: &'static mut core::cell::UnsafeCell<HostnameResources>,
 }
 
 pub(crate) struct SocketStack {
@@ -307,6 +330,8 @@ impl<D: Driver> Stack<D> {
             )),
             #[cfg(feature = "dns")]
             dns_waker: WakerRegistration::new(),
+            #[cfg(feature = "dhcpv4-hostname")]
+            hostname: &mut resources.hostname,
         };
 
         #[cfg(feature = "proto-ipv4")]
@@ -484,7 +509,10 @@ impl<D: Driver> Stack<D> {
             self.with_mut(|s, i| {
                 let socket = s.sockets.get_mut::<dns::Socket>(i.dns_socket);
                 match socket.start_query(s.iface.context(), name, qtype) {
-                    Ok(handle) => Poll::Ready(Ok(handle)),
+                    Ok(handle) => {
+                        s.waker.wake();
+                        Poll::Ready(Ok(handle))
+                    }
                     Err(dns::StartQueryError::NoFreeSlot) => {
                         i.dns_waker.register(cx.waker());
                         Poll::Pending
@@ -673,6 +701,25 @@ impl<D: Driver> Inner<D> {
                 socket.set_max_lease_duration(c.max_lease_duration.map(crate::time::duration_to_smoltcp));
                 socket.set_ports(c.server_port, c.client_port);
                 socket.set_retry_config(c.retry_config);
+
+                socket.set_outgoing_options(&[]);
+                #[cfg(feature = "dhcpv4-hostname")]
+                if let Some(h) = c.hostname {
+                    // safety: we just did set_outgoing_options([]) so we know the socket is no longer holding a reference.
+                    let hostname = unsafe { &mut *self.hostname.get() };
+
+                    // create data
+                    // safety: we know the buffer lives forever, new borrows the StackResources for 'static.
+                    // also we won't modify it until next call to this function.
+                    hostname.data[..h.len()].copy_from_slice(h.as_bytes());
+                    let data: &[u8] = &hostname.data[..h.len()];
+                    let data: &'static [u8] = unsafe { core::mem::transmute(data) };
+
+                    // set the option.
+                    hostname.option = smoltcp::wire::DhcpOption { data, kind: 12 };
+                    socket.set_outgoing_options(core::slice::from_ref(&hostname.option));
+                }
+
                 socket.reset();
             }
             _ => {

embassy-net/src/tcp.rs

@@ -579,11 +579,10 @@ mod embedded_io_impls {
 /// TCP client compatible with `embedded-nal-async` traits.
 #[cfg(feature = "nightly")]
 pub mod client {
-    use core::cell::UnsafeCell;
+    use core::cell::{Cell, UnsafeCell};
     use core::mem::MaybeUninit;
     use core::ptr::NonNull;
 
-    use atomic_polyfill::{AtomicBool, Ordering};
     use embedded_nal_async::IpAddr;
 
     use super::*;
@@ -702,15 +701,13 @@ pub mod client {
         }
     }
 
-    unsafe impl<const N: usize, const TX_SZ: usize, const RX_SZ: usize> Sync for TcpClientState<N, TX_SZ, RX_SZ> {}
-
     struct Pool<T, const N: usize> {
-        used: [AtomicBool; N],
+        used: [Cell<bool>; N],
         data: [UnsafeCell<MaybeUninit<T>>; N],
     }
 
     impl<T, const N: usize> Pool<T, N> {
-        const VALUE: AtomicBool = AtomicBool::new(false);
+        const VALUE: Cell<bool> = Cell::new(false);
         const UNINIT: UnsafeCell<MaybeUninit<T>> = UnsafeCell::new(MaybeUninit::uninit());
 
         const fn new() -> Self {
@@ -724,7 +721,9 @@ pub mod client {
     impl<T, const N: usize> Pool<T, N> {
         fn alloc(&self) -> Option<NonNull<T>> {
             for n in 0..N {
-                if self.used[n].swap(true, Ordering::SeqCst) == false {
+                // this can't race because Pool is not Sync.
+                if !self.used[n].get() {
+                    self.used[n].set(true);
                     let p = self.data[n].get() as *mut T;
                     return Some(unsafe { NonNull::new_unchecked(p) });
                 }
@@ -738,7 +737,7 @@ pub mod client {
             let n = p.as_ptr().offset_from(origin);
             assert!(n >= 0);
             assert!((n as usize) < N);
-            self.used[n as usize].store(false, Ordering::SeqCst);
+            self.used[n as usize].set(false);
         }
     }
 }

embassy-nrf/Cargo.toml

@@ -94,7 +94,7 @@ _gpio-p1 = []
 _nrf52832_anomaly_109 = []
 
 [dependencies]
-embassy-time = { version = "0.1.3", path = "../embassy-time", optional = true }
+embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-3"] }
 embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" }
@@ -103,8 +103,8 @@ embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver", optiona
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
 embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-rc.1", optional = true}
 embedded-hal-async = { version = "=1.0.0-rc.1", optional = true}
-embedded-io = { version = "0.5.0" }
-embedded-io-async = { version = "0.5.0", optional = true }
+embedded-io = { version = "0.6.0" }
+embedded-io-async = { version = "0.6.0", optional = true }
 
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }

embassy-nrf/src/chips/nrf5340_app.rs

@@ -6,10 +6,13 @@ pub mod pac {
     // To avoid cfg spam, we remove _ns or _s suffixes here.
 
     pub use nrf5340_app_pac::NVIC_PRIO_BITS;
-    
+
+    #[cfg(feature="rt")]
+    #[doc(no_inline)]
+    pub use nrf5340_app_pac::interrupt;
+
     #[doc(no_inline)]
     pub use nrf5340_app_pac::{
-        interrupt,
         Interrupt,
         Peripherals,
 
@@ -60,156 +63,167 @@ pub mod pac {
         wdt0_ns as wdt0,
     };
     
-    #[cfg(feature = "nrf5340-app-ns")]
-    #[doc(no_inline)]
-    pub use nrf5340_app_pac::{
-        CLOCK_NS as CLOCK,
-        COMP_NS as COMP,
-        CTRLAP_NS as CTRLAP,
-        DCNF_NS as DCNF,
-        DPPIC_NS as DPPIC,
-        EGU0_NS as EGU0,
-        EGU1_NS as EGU1,
-        EGU2_NS as EGU2,
-        EGU3_NS as EGU3,
-        EGU4_NS as EGU4,
-        EGU5_NS as EGU5,
-        FPU_NS as FPU,
-        GPIOTE1_NS as GPIOTE1,
-        I2S0_NS as I2S0,
-        IPC_NS as IPC,
-        KMU_NS as KMU,
-        LPCOMP_NS as LPCOMP,
-        MUTEX_NS as MUTEX,
-        NFCT_NS as NFCT,
-        NVMC_NS as NVMC,
-        OSCILLATORS_NS as OSCILLATORS,
-        P0_NS as P0,
-        P1_NS as P1,
-        PDM0_NS as PDM0,
-        POWER_NS as POWER,
-        PWM0_NS as PWM0,
-        PWM1_NS as PWM1,
-        PWM2_NS as PWM2,
-        PWM3_NS as PWM3,
-        QDEC0_NS as QDEC0,
-        QDEC1_NS as QDEC1,
-        QSPI_NS as QSPI,
-        REGULATORS_NS as REGULATORS,
-        RESET_NS as RESET,
-        RTC0_NS as RTC0,
-        RTC1_NS as RTC1,
-        SAADC_NS as SAADC,
-        SPIM0_NS as SPIM0,
-        SPIM1_NS as SPIM1,
-        SPIM2_NS as SPIM2,
-        SPIM3_NS as SPIM3,
-        SPIM4_NS as SPIM4,
-        SPIS0_NS as SPIS0,
-        SPIS1_NS as SPIS1,
-        SPIS2_NS as SPIS2,
-        SPIS3_NS as SPIS3,
-        TIMER0_NS as TIMER0,
-        TIMER1_NS as TIMER1,
-        TIMER2_NS as TIMER2,
-        TWIM0_NS as TWIM0,
-        TWIM1_NS as TWIM1,
-        TWIM2_NS as TWIM2,
-        TWIM3_NS as TWIM3,
-        TWIS0_NS as TWIS0,
-        TWIS1_NS as TWIS1,
-        TWIS2_NS as TWIS2,
-        TWIS3_NS as TWIS3,
-        UARTE0_NS as UARTE0,
-        UARTE1_NS as UARTE1,
-        UARTE2_NS as UARTE2,
-        UARTE3_NS as UARTE3,
-        USBD_NS as USBD,
-        USBREGULATOR_NS as USBREGULATOR,
-        VMC_NS as VMC,
-        WDT0_NS as WDT0,
-        WDT1_NS as WDT1,
-    };
+    /// Non-Secure mode (NS) peripherals
+    pub mod ns {
+        #[cfg(feature = "nrf5340-app-ns")]
+        #[doc(no_inline)]
+        pub use nrf5340_app_pac::{
+            CLOCK_NS as CLOCK,
+            COMP_NS as COMP,
+            CTRLAP_NS as CTRLAP,
+            DCNF_NS as DCNF,
+            DPPIC_NS as DPPIC,
+            EGU0_NS as EGU0,
+            EGU1_NS as EGU1,
+            EGU2_NS as EGU2,
+            EGU3_NS as EGU3,
+            EGU4_NS as EGU4,
+            EGU5_NS as EGU5,
+            FPU_NS as FPU,
+            GPIOTE1_NS as GPIOTE1,
+            I2S0_NS as I2S0,
+            IPC_NS as IPC,
+            KMU_NS as KMU,
+            LPCOMP_NS as LPCOMP,
+            MUTEX_NS as MUTEX,
+            NFCT_NS as NFCT,
+            NVMC_NS as NVMC,
+            OSCILLATORS_NS as OSCILLATORS,
+            P0_NS as P0,
+            P1_NS as P1,
+            PDM0_NS as PDM0,
+            POWER_NS as POWER,
+            PWM0_NS as PWM0,
+            PWM1_NS as PWM1,
+            PWM2_NS as PWM2,
+            PWM3_NS as PWM3,
+            QDEC0_NS as QDEC0,
+            QDEC1_NS as QDEC1,
+            QSPI_NS as QSPI,
+            REGULATORS_NS as REGULATORS,
+            RESET_NS as RESET,
+            RTC0_NS as RTC0,
+            RTC1_NS as RTC1,
+            SAADC_NS as SAADC,
+            SPIM0_NS as SPIM0,
+            SPIM1_NS as SPIM1,
+            SPIM2_NS as SPIM2,
+            SPIM3_NS as SPIM3,
+            SPIM4_NS as SPIM4,
+            SPIS0_NS as SPIS0,
+            SPIS1_NS as SPIS1,
+            SPIS2_NS as SPIS2,
+            SPIS3_NS as SPIS3,
+            TIMER0_NS as TIMER0,
+            TIMER1_NS as TIMER1,
+            TIMER2_NS as TIMER2,
+            TWIM0_NS as TWIM0,
+            TWIM1_NS as TWIM1,
+            TWIM2_NS as TWIM2,
+            TWIM3_NS as TWIM3,
+            TWIS0_NS as TWIS0,
+            TWIS1_NS as TWIS1,
+            TWIS2_NS as TWIS2,
+            TWIS3_NS as TWIS3,
+            UARTE0_NS as UARTE0,
+            UARTE1_NS as UARTE1,
+            UARTE2_NS as UARTE2,
+            UARTE3_NS as UARTE3,
+            USBD_NS as USBD,
+            USBREGULATOR_NS as USBREGULATOR,
+            VMC_NS as VMC,
+            WDT0_NS as WDT0,
+            WDT1_NS as WDT1,
+        };
+    }
 
-    #[cfg(feature = "nrf5340-app-s")]
-    #[doc(no_inline)]
-    pub use nrf5340_app_pac::{
-        CACHEDATA_S as CACHEDATA,
-        CACHEINFO_S as CACHEINFO,
-        CACHE_S as CACHE,
-        CLOCK_S as CLOCK,
-        COMP_S as COMP,
-        CRYPTOCELL_S as CRYPTOCELL,
-        CTI_S as CTI,
-        CTRLAP_S as CTRLAP,
-        DCNF_S as DCNF,
-        DPPIC_S as DPPIC,
-        EGU0_S as EGU0,
-        EGU1_S as EGU1,
-        EGU2_S as EGU2,
-        EGU3_S as EGU3,
-        EGU4_S as EGU4,
-        EGU5_S as EGU5,
-        FICR_S as FICR,
-        FPU_S as FPU,
-        GPIOTE0_S as GPIOTE0,
-        I2S0_S as I2S0,
-        IPC_S as IPC,
-        KMU_S as KMU,
-        LPCOMP_S as LPCOMP,
-        MUTEX_S as MUTEX,
-        NFCT_S as NFCT,
-        NVMC_S as NVMC,
-        OSCILLATORS_S as OSCILLATORS,
-        P0_S as P0,
-        P1_S as P1,
-        PDM0_S as PDM0,
-        POWER_S as POWER,
-        PWM0_S as PWM0,
-        PWM1_S as PWM1,
-        PWM2_S as PWM2,
-        PWM3_S as PWM3,
-        QDEC0_S as QDEC0,
-        QDEC1_S as QDEC1,
-        QSPI_S as QSPI,
-        REGULATORS_S as REGULATORS,
-        RESET_S as RESET,
-        RTC0_S as RTC0,
-        RTC1_S as RTC1,
-        SAADC_S as SAADC,
-        SPIM0_S as SPIM0,
-        SPIM1_S as SPIM1,
-        SPIM2_S as SPIM2,
-        SPIM3_S as SPIM3,
-        SPIM4_S as SPIM4,
-        SPIS0_S as SPIS0,
-        SPIS1_S as SPIS1,
-        SPIS2_S as SPIS2,
-        SPIS3_S as SPIS3,
-        SPU_S as SPU,
-        TAD_S as TAD,
-        TIMER0_S as TIMER0,
-        TIMER1_S as TIMER1,
-        TIMER2_S as TIMER2,
-        TWIM0_S as TWIM0,
-        TWIM1_S as TWIM1,
-        TWIM2_S as TWIM2,
-        TWIM3_S as TWIM3,
-        TWIS0_S as TWIS0,
-        TWIS1_S as TWIS1,
-        TWIS2_S as TWIS2,
-        TWIS3_S as TWIS3,
-        UARTE0_S as UARTE0,
-        UARTE1_S as UARTE1,
-        UARTE2_S as UARTE2,
-        UARTE3_S as UARTE3,
-        UICR_S as UICR,
-        USBD_S as USBD,
-        USBREGULATOR_S as USBREGULATOR,
-        VMC_S as VMC,
-        WDT0_S as WDT0,
-        WDT1_S as WDT1,
-    };
+    /// Secure mode (S) peripherals
+    pub mod s {
+        #[cfg(feature = "nrf5340-app-s")]
+        #[doc(no_inline)]
+        pub use nrf5340_app_pac::{
+            CACHEDATA_S as CACHEDATA,
+            CACHEINFO_S as CACHEINFO,
+            CACHE_S as CACHE,
+            CLOCK_S as CLOCK,
+            COMP_S as COMP,
+            CRYPTOCELL_S as CRYPTOCELL,
+            CTI_S as CTI,
+            CTRLAP_S as CTRLAP,
+            DCNF_S as DCNF,
+            DPPIC_S as DPPIC,
+            EGU0_S as EGU0,
+            EGU1_S as EGU1,
+            EGU2_S as EGU2,
+            EGU3_S as EGU3,
+            EGU4_S as EGU4,
+            EGU5_S as EGU5,
+            FICR_S as FICR,
+            FPU_S as FPU,
+            GPIOTE0_S as GPIOTE0,
+            I2S0_S as I2S0,
+            IPC_S as IPC,
+            KMU_S as KMU,
+            LPCOMP_S as LPCOMP,
+            MUTEX_S as MUTEX,
+            NFCT_S as NFCT,
+            NVMC_S as NVMC,
+            OSCILLATORS_S as OSCILLATORS,
+            P0_S as P0,
+            P1_S as P1,
+            PDM0_S as PDM0,
+            POWER_S as POWER,
+            PWM0_S as PWM0,
+            PWM1_S as PWM1,
+            PWM2_S as PWM2,
+            PWM3_S as PWM3,
+            QDEC0_S as QDEC0,
+            QDEC1_S as QDEC1,
+            QSPI_S as QSPI,
+            REGULATORS_S as REGULATORS,
+            RESET_S as RESET,
+            RTC0_S as RTC0,
+            RTC1_S as RTC1,
+            SAADC_S as SAADC,
+            SPIM0_S as SPIM0,
+            SPIM1_S as SPIM1,
+            SPIM2_S as SPIM2,
+            SPIM3_S as SPIM3,
+            SPIM4_S as SPIM4,
+            SPIS0_S as SPIS0,
+            SPIS1_S as SPIS1,
+            SPIS2_S as SPIS2,
+            SPIS3_S as SPIS3,
+            SPU_S as SPU,
+            TAD_S as TAD,
+            TIMER0_S as TIMER0,
+            TIMER1_S as TIMER1,
+            TIMER2_S as TIMER2,
+            TWIM0_S as TWIM0,
+            TWIM1_S as TWIM1,
+            TWIM2_S as TWIM2,
+            TWIM3_S as TWIM3,
+            TWIS0_S as TWIS0,
+            TWIS1_S as TWIS1,
+            TWIS2_S as TWIS2,
+            TWIS3_S as TWIS3,
+            UARTE0_S as UARTE0,
+            UARTE1_S as UARTE1,
+            UARTE2_S as UARTE2,
+            UARTE3_S as UARTE3,
+            UICR_S as UICR,
+            USBD_S as USBD,
+            USBREGULATOR_S as USBREGULATOR,
+            VMC_S as VMC,
+            WDT0_S as WDT0,
+            WDT1_S as WDT1,
+        };
+    }
+
+    #[cfg(feature = "_ns")]
+    pub use ns::*;
+    #[cfg(feature = "_s")]
+    pub use s::*;
 }
 
 /// The maximum buffer size that the EasyDMA can send/recv in one operation.

embassy-nrf/src/chips/nrf5340_net.rs

@@ -7,9 +7,12 @@ pub mod pac {
 
     pub use nrf5340_net_pac::NVIC_PRIO_BITS;
 
+    #[cfg(feature="rt")]
+    #[doc(no_inline)]
+    pub use nrf5340_net_pac::interrupt;
+
     #[doc(no_inline)]
     pub use nrf5340_net_pac::{
-        interrupt,
         Interrupt,
         Peripherals,
 

embassy-nrf/src/chips/nrf9160.rs

@@ -7,9 +7,12 @@ pub mod pac {
 
     pub use nrf9160_pac::NVIC_PRIO_BITS;
 
+    #[cfg(feature="rt")]
+    #[doc(no_inline)]
+    pub use nrf9160_pac::interrupt;
+
     #[doc(no_inline)]
     pub use nrf9160_pac::{
-        interrupt,
         Interrupt,
 
         cc_host_rgf_s as cc_host_rgf,
@@ -45,122 +48,131 @@ pub mod pac {
         wdt_ns as wdt,
     };
     
-    #[cfg(feature = "nrf9160-ns")]
-    #[doc(no_inline)]
-    pub use nrf9160_pac::{
-        CLOCK_NS as CLOCK,
-        DPPIC_NS as DPPIC,
-        EGU0_NS as EGU0,
-        EGU1_NS as EGU1,
-        EGU2_NS as EGU2,
-        EGU3_NS as EGU3,
-        EGU4_NS as EGU4,
-        EGU5_NS as EGU5,
-        FPU_NS as FPU,
-        GPIOTE1_NS as GPIOTE1,
-        I2S_NS as I2S,
-        IPC_NS as IPC,
-        KMU_NS as KMU,
-        NVMC_NS as NVMC,
-        P0_NS as P0,
-        PDM_NS as PDM,
-        POWER_NS as POWER,
-        PWM0_NS as PWM0,
-        PWM1_NS as PWM1,
-        PWM2_NS as PWM2,
-        PWM3_NS as PWM3,
-        REGULATORS_NS as REGULATORS,
-        RTC0_NS as RTC0,
-        RTC1_NS as RTC1,
-        SAADC_NS as SAADC,
-        SPIM0_NS as SPIM0,
-        SPIM1_NS as SPIM1,
-        SPIM2_NS as SPIM2,
-        SPIM3_NS as SPIM3,
-        SPIS0_NS as SPIS0,
-        SPIS1_NS as SPIS1,
-        SPIS2_NS as SPIS2,
-        SPIS3_NS as SPIS3,
-        TIMER0_NS as TIMER0,
-        TIMER1_NS as TIMER1,
-        TIMER2_NS as TIMER2,
-        TWIM0_NS as TWIM0,
-        TWIM1_NS as TWIM1,
-        TWIM2_NS as TWIM2,
-        TWIM3_NS as TWIM3,
-        TWIS0_NS as TWIS0,
-        TWIS1_NS as TWIS1,
-        TWIS2_NS as TWIS2,
-        TWIS3_NS as TWIS3,
-        UARTE0_NS as UARTE0,
-        UARTE1_NS as UARTE1,
-        UARTE2_NS as UARTE2,
-        UARTE3_NS as UARTE3,
-        VMC_NS as VMC,
-        WDT_NS as WDT,
-    };
+    /// Non-Secure mode (NS) peripherals
+    pub mod ns {
+        #[doc(no_inline)]
+        pub use nrf9160_pac::{
+            CLOCK_NS as CLOCK,
+            DPPIC_NS as DPPIC,
+            EGU0_NS as EGU0,
+            EGU1_NS as EGU1,
+            EGU2_NS as EGU2,
+            EGU3_NS as EGU3,
+            EGU4_NS as EGU4,
+            EGU5_NS as EGU5,
+            FPU_NS as FPU,
+            GPIOTE1_NS as GPIOTE1,
+            I2S_NS as I2S,
+            IPC_NS as IPC,
+            KMU_NS as KMU,
+            NVMC_NS as NVMC,
+            P0_NS as P0,
+            PDM_NS as PDM,
+            POWER_NS as POWER,
+            PWM0_NS as PWM0,
+            PWM1_NS as PWM1,
+            PWM2_NS as PWM2,
+            PWM3_NS as PWM3,
+            REGULATORS_NS as REGULATORS,
+            RTC0_NS as RTC0,
+            RTC1_NS as RTC1,
+            SAADC_NS as SAADC,
+            SPIM0_NS as SPIM0,
+            SPIM1_NS as SPIM1,
+            SPIM2_NS as SPIM2,
+            SPIM3_NS as SPIM3,
+            SPIS0_NS as SPIS0,
+            SPIS1_NS as SPIS1,
+            SPIS2_NS as SPIS2,
+            SPIS3_NS as SPIS3,
+            TIMER0_NS as TIMER0,
+            TIMER1_NS as TIMER1,
+            TIMER2_NS as TIMER2,
+            TWIM0_NS as TWIM0,
+            TWIM1_NS as TWIM1,
+            TWIM2_NS as TWIM2,
+            TWIM3_NS as TWIM3,
+            TWIS0_NS as TWIS0,
+            TWIS1_NS as TWIS1,
+            TWIS2_NS as TWIS2,
+            TWIS3_NS as TWIS3,
+            UARTE0_NS as UARTE0,
+            UARTE1_NS as UARTE1,
+            UARTE2_NS as UARTE2,
+            UARTE3_NS as UARTE3,
+            VMC_NS as VMC,
+            WDT_NS as WDT,
+        };
+    }
 
-    #[cfg(feature = "nrf9160-s")]
-    #[doc(no_inline)]
-    pub use nrf9160_pac::{
-        CC_HOST_RGF_S as CC_HOST_RGF,
-        CLOCK_S as CLOCK,
-        CRYPTOCELL_S as CRYPTOCELL,
-        CTRL_AP_PERI_S as CTRL_AP_PERI,
-        DPPIC_S as DPPIC,
-        EGU0_S as EGU0,
-        EGU1_S as EGU1,
-        EGU2_S as EGU2,
-        EGU3_S as EGU3,
-        EGU4_S as EGU4,
-        EGU5_S as EGU5,
-        FICR_S as FICR,
-        FPU_S as FPU,
-        GPIOTE0_S as GPIOTE0,
-        I2S_S as I2S,
-        IPC_S as IPC,
-        KMU_S as KMU,
-        NVMC_S as NVMC,
-        P0_S as P0,
-        PDM_S as PDM,
-        POWER_S as POWER,
-        PWM0_S as PWM0,
-        PWM1_S as PWM1,
-        PWM2_S as PWM2,
-        PWM3_S as PWM3,
-        REGULATORS_S as REGULATORS,
-        RTC0_S as RTC0,
-        RTC1_S as RTC1,
-        SAADC_S as SAADC,
-        SPIM0_S as SPIM0,
-        SPIM1_S as SPIM1,
-        SPIM2_S as SPIM2,
-        SPIM3_S as SPIM3,
-        SPIS0_S as SPIS0,
-        SPIS1_S as SPIS1,
-        SPIS2_S as SPIS2,
-        SPIS3_S as SPIS3,
-        SPU_S as SPU,
-        TAD_S as TAD,
-        TIMER0_S as TIMER0,
-        TIMER1_S as TIMER1,
-        TIMER2_S as TIMER2,
-        TWIM0_S as TWIM0,
-        TWIM1_S as TWIM1,
-        TWIM2_S as TWIM2,
-        TWIM3_S as TWIM3,
-        TWIS0_S as TWIS0,
-        TWIS1_S as TWIS1,
-        TWIS2_S as TWIS2,
-        TWIS3_S as TWIS3,
-        UARTE0_S as UARTE0,
-        UARTE1_S as UARTE1,
-        UARTE2_S as UARTE2,
-        UARTE3_S as UARTE3,
-        UICR_S as UICR,
-        VMC_S as VMC,
-        WDT_S as WDT,
-    };
+    /// Secure mode (S) peripherals
+    pub mod s {
+        #[doc(no_inline)]
+        pub use nrf9160_pac::{
+            CC_HOST_RGF_S as CC_HOST_RGF,
+            CLOCK_S as CLOCK,
+            CRYPTOCELL_S as CRYPTOCELL,
+            CTRL_AP_PERI_S as CTRL_AP_PERI,
+            DPPIC_S as DPPIC,
+            EGU0_S as EGU0,
+            EGU1_S as EGU1,
+            EGU2_S as EGU2,
+            EGU3_S as EGU3,
+            EGU4_S as EGU4,
+            EGU5_S as EGU5,
+            FICR_S as FICR,
+            FPU_S as FPU,
+            GPIOTE0_S as GPIOTE0,
+            I2S_S as I2S,
+            IPC_S as IPC,
+            KMU_S as KMU,
+            NVMC_S as NVMC,
+            P0_S as P0,
+            PDM_S as PDM,
+            POWER_S as POWER,
+            PWM0_S as PWM0,
+            PWM1_S as PWM1,
+            PWM2_S as PWM2,
+            PWM3_S as PWM3,
+            REGULATORS_S as REGULATORS,
+            RTC0_S as RTC0,
+            RTC1_S as RTC1,
+            SAADC_S as SAADC,
+            SPIM0_S as SPIM0,
+            SPIM1_S as SPIM1,
+            SPIM2_S as SPIM2,
+            SPIM3_S as SPIM3,
+            SPIS0_S as SPIS0,
+            SPIS1_S as SPIS1,
+            SPIS2_S as SPIS2,
+            SPIS3_S as SPIS3,
+            SPU_S as SPU,
+            TAD_S as TAD,
+            TIMER0_S as TIMER0,
+            TIMER1_S as TIMER1,
+            TIMER2_S as TIMER2,
+            TWIM0_S as TWIM0,
+            TWIM1_S as TWIM1,
+            TWIM2_S as TWIM2,
+            TWIM3_S as TWIM3,
+            TWIS0_S as TWIS0,
+            TWIS1_S as TWIS1,
+            TWIS2_S as TWIS2,
+            TWIS3_S as TWIS3,
+            UARTE0_S as UARTE0,
+            UARTE1_S as UARTE1,
+            UARTE2_S as UARTE2,
+            UARTE3_S as UARTE3,
+            UICR_S as UICR,
+            VMC_S as VMC,
+            WDT_S as WDT,
+        };
+    }
+
+    #[cfg(feature = "_ns")]
+    pub use ns::*;
+    #[cfg(feature = "_s")]
+    pub use s::*;
 }
 
 /// The maximum buffer size that the EasyDMA can send/recv in one operation.

embassy-rp/Cargo.toml

@@ -60,7 +60,7 @@ unstable-traits = ["embedded-hal-1", "embedded-hal-nb"]
 
 [dependencies]
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
-embassy-time = { version = "0.1.3", path = "../embassy-time", features = [ "tick-hz-1_000_000" ] }
+embassy-time = { version = "0.1.5", path = "../embassy-time", features = [ "tick-hz-1_000_000" ] }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-2"] }
 embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" }
@@ -75,8 +75,8 @@ cortex-m = "0.7.6"
 critical-section = "1.1"
 futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
 chrono = { version = "0.4", default-features = false, optional = true }
-embedded-io = { version = "0.5.0" }
-embedded-io-async = { version = "0.5.0", optional = true }
+embedded-io = { version = "0.6.0" }
+embedded-io-async = { version = "0.6.0", optional = true }
 embedded-storage = { version = "0.3" }
 embedded-storage-async = { version = "0.4.0", optional = true }
 rand_core = "0.6.4"

embassy-rp/src/bootsel.rs

@@ -0,0 +1,83 @@
+//! Boot Select button
+//!
+//! The RP2040 rom supports a BOOTSEL button that is used to enter the USB bootloader
+//! if held during reset. To avoid wasting GPIO pins, the button is multiplexed onto
+//! the CS pin of the QSPI flash, but that makes it somewhat expensive and complicated
+//! to utilize outside of the rom's bootloader.
+//!
+//! This module provides functionality to poll BOOTSEL from an embassy application.
+
+use crate::flash::in_ram;
+
+impl crate::peripherals::BOOTSEL {
+    /// Polls the BOOTSEL button. Returns true if the button is pressed.
+    ///
+    /// Polling isn't cheap, as this function waits for core 1 to finish it's current
+    /// task and for any DMAs from flash to complete
+    pub fn is_pressed(&mut self) -> bool {
+        let mut cs_status = Default::default();
+
+        unsafe { in_ram(|| cs_status = ram_helpers::read_cs_status()) }.expect("Must be called from Core 0");
+
+        // bootsel is active low, so invert
+        !cs_status.infrompad()
+    }
+}
+
+mod ram_helpers {
+    use rp_pac::io::regs::GpioStatus;
+
+    /// Temporally reconfigures the CS gpio and returns the GpioStatus.
+
+    /// This function runs from RAM so it can disable flash XIP.
+    ///
+    /// # Safety
+    ///
+    /// The caller must ensure flash is idle and will remain idle.
+    /// This function must live in ram. It uses inline asm to avoid any
+    /// potential calls to ABI functions that might be in flash.
+    #[inline(never)]
+    #[link_section = ".data.ram_func"]
+    #[cfg(target_arch = "arm")]
+    pub unsafe fn read_cs_status() -> GpioStatus {
+        let result: u32;
+
+        // Magic value, used as both OEOVER::DISABLE and delay loop counter
+        let magic = 0x2000;
+
+        core::arch::asm!(
+            ".equiv GPIO_STATUS, 0x0",
+            ".equiv GPIO_CTRL,   0x4",
+
+            "ldr {orig_ctrl}, [{cs_gpio}, $GPIO_CTRL]",
+
+            // The BOOTSEL pulls the flash's CS line low though a 1K resistor.
+            // this is weak enough to avoid disrupting normal operation.
+            // But, if we disable CS's output drive and allow it to float...
+            "str {val}, [{cs_gpio}, $GPIO_CTRL]",
+
+            // ...then wait for the state to settle...
+            "1:", // ~4000 cycle delay loop
+            "subs {val}, #8",
+            "bne 1b",
+
+            // ...we can read the current state of bootsel
+            "ldr {val}, [{cs_gpio}, $GPIO_STATUS]",
+
+            // Finally, restore CS to normal operation so XIP can continue
+            "str {orig_ctrl}, [{cs_gpio}, $GPIO_CTRL]",
+
+            cs_gpio = in(reg) rp_pac::IO_QSPI.gpio(1).as_ptr(),
+            orig_ctrl = out(reg) _,
+            val = inout(reg) magic => result,
+            options(nostack),
+        );
+
+        core::mem::transmute(result)
+    }
+
+    #[cfg(not(target_arch = "arm"))]
+    pub unsafe fn read_cs_status() -> GpioStatus {
+        unimplemented!()
+    }
+}

embassy-rp/src/flash.rs

@@ -131,7 +131,7 @@ impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> Flash<'d, T, M, FLASH_SI
 
         let len = to - from;
 
-        unsafe { self.in_ram(|| ram_helpers::flash_range_erase(from, len))? };
+        unsafe { in_ram(|| ram_helpers::flash_range_erase(from, len))? };
 
         Ok(())
     }
@@ -156,7 +156,7 @@ impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> Flash<'d, T, M, FLASH_SI
 
             let unaligned_offset = offset as usize - start;
 
-            unsafe { self.in_ram(|| ram_helpers::flash_range_program(unaligned_offset as u32, &pad_buf))? }
+            unsafe { in_ram(|| ram_helpers::flash_range_program(unaligned_offset as u32, &pad_buf))? }
         }
 
         let remaining_len = bytes.len() - start_padding;
@@ -174,12 +174,12 @@ impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> Flash<'d, T, M, FLASH_SI
             if bytes.as_ptr() as usize >= 0x2000_0000 {
                 let aligned_data = &bytes[start_padding..end_padding];
 
-                unsafe { self.in_ram(|| ram_helpers::flash_range_program(aligned_offset as u32, aligned_data))? }
+                unsafe { in_ram(|| ram_helpers::flash_range_program(aligned_offset as u32, aligned_data))? }
             } else {
                 for chunk in bytes[start_padding..end_padding].chunks_exact(PAGE_SIZE) {
                     let mut ram_buf = [0xFF_u8; PAGE_SIZE];
                     ram_buf.copy_from_slice(chunk);
-                    unsafe { self.in_ram(|| ram_helpers::flash_range_program(aligned_offset as u32, &ram_buf))? }
+                    unsafe { in_ram(|| ram_helpers::flash_range_program(aligned_offset as u32, &ram_buf))? }
                     aligned_offset += PAGE_SIZE;
                 }
             }
@@ -194,47 +194,15 @@ impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> Flash<'d, T, M, FLASH_SI
 
             let unaligned_offset = end_offset - (PAGE_SIZE - rem_offset);
 
-            unsafe { self.in_ram(|| ram_helpers::flash_range_program(unaligned_offset as u32, &pad_buf))? }
+            unsafe { in_ram(|| ram_helpers::flash_range_program(unaligned_offset as u32, &pad_buf))? }
         }
 
         Ok(())
     }
 
-    /// Make sure to uphold the contract points with rp2040-flash.
-    /// - interrupts must be disabled
-    /// - DMA must not access flash memory
-    unsafe fn in_ram(&mut self, operation: impl FnOnce()) -> Result<(), Error> {
-        // Make sure we're running on CORE0
-        let core_id: u32 = pac::SIO.cpuid().read();
-        if core_id != 0 {
-            return Err(Error::InvalidCore);
-        }
-
-        // Make sure CORE1 is paused during the entire duration of the RAM function
-        crate::multicore::pause_core1();
-
-        critical_section::with(|_| {
-            // Wait for all DMA channels in flash to finish before ram operation
-            const SRAM_LOWER: u32 = 0x2000_0000;
-            for n in 0..crate::dma::CHANNEL_COUNT {
-                let ch = crate::pac::DMA.ch(n);
-                while ch.read_addr().read() < SRAM_LOWER && ch.ctrl_trig().read().busy() {}
-            }
-            // Wait for completion of any background reads
-            while pac::XIP_CTRL.stream_ctr().read().0 > 0 {}
-
-            // Run our flash operation in RAM
-            operation();
-        });
-
-        // Resume CORE1 execution
-        crate::multicore::resume_core1();
-        Ok(())
-    }
-
     /// Read SPI flash unique ID
     pub fn blocking_unique_id(&mut self, uid: &mut [u8]) -> Result<(), Error> {
-        unsafe { self.in_ram(|| ram_helpers::flash_unique_id(uid))? };
+        unsafe { in_ram(|| ram_helpers::flash_unique_id(uid))? };
         Ok(())
     }
 
@@ -242,7 +210,7 @@ impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> Flash<'d, T, M, FLASH_SI
     pub fn blocking_jedec_id(&mut self) -> Result<u32, Error> {
         let mut jedec = None;
         unsafe {
-            self.in_ram(|| {
+            in_ram(|| {
                 jedec.replace(ram_helpers::flash_jedec_id());
             })?;
         };
@@ -871,6 +839,38 @@ mod ram_helpers {
     }
 }
 
+/// Make sure to uphold the contract points with rp2040-flash.
+/// - interrupts must be disabled
+/// - DMA must not access flash memory
+pub(crate) unsafe fn in_ram(operation: impl FnOnce()) -> Result<(), Error> {
+    // Make sure we're running on CORE0
+    let core_id: u32 = pac::SIO.cpuid().read();
+    if core_id != 0 {
+        return Err(Error::InvalidCore);
+    }
+
+    // Make sure CORE1 is paused during the entire duration of the RAM function
+    crate::multicore::pause_core1();
+
+    critical_section::with(|_| {
+        // Wait for all DMA channels in flash to finish before ram operation
+        const SRAM_LOWER: u32 = 0x2000_0000;
+        for n in 0..crate::dma::CHANNEL_COUNT {
+            let ch = crate::pac::DMA.ch(n);
+            while ch.read_addr().read() < SRAM_LOWER && ch.ctrl_trig().read().busy() {}
+        }
+        // Wait for completion of any background reads
+        while pac::XIP_CTRL.stream_ctr().read().0 > 0 {}
+
+        // Run our flash operation in RAM
+        operation();
+    });
+
+    // Resume CORE1 execution
+    crate::multicore::resume_core1();
+    Ok(())
+}
+
 mod sealed {
     pub trait Instance {}
     pub trait Mode {}

embassy-rp/src/i2c.rs

@@ -6,13 +6,12 @@ use embassy_hal_internal::{into_ref, PeripheralRef};
 use embassy_sync::waitqueue::AtomicWaker;
 use pac::i2c;
 
-use crate::gpio::sealed::Pin;
 use crate::gpio::AnyPin;
 use crate::interrupt::typelevel::{Binding, Interrupt};
 use crate::{interrupt, pac, peripherals, Peripheral};
 
 /// I2C error abort reason
-#[derive(Debug)]
+#[derive(Debug, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum AbortReason {
     /// A bus operation was not acknowledged, e.g. due to the addressed device
@@ -27,7 +26,7 @@ pub enum AbortReason {
 }
 
 /// I2C error
-#[derive(Debug)]
+#[derive(Debug, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Error {
     /// I2C abort with error
@@ -295,13 +294,24 @@ impl<'d, T: Instance> I2c<'d, T, Async> {
 
     pub async fn read_async(&mut self, addr: u16, buffer: &mut [u8]) -> Result<(), Error> {
         Self::setup(addr)?;
-        self.read_async_internal(buffer, false, true).await
+        self.read_async_internal(buffer, true, true).await
     }
 
     pub async fn write_async(&mut self, addr: u16, bytes: impl IntoIterator<Item = u8>) -> Result<(), Error> {
         Self::setup(addr)?;
         self.write_async_internal(bytes, true).await
     }
+
+    pub async fn write_read_async(
+        &mut self,
+        addr: u16,
+        bytes: impl IntoIterator<Item = u8>,
+        buffer: &mut [u8],
+    ) -> Result<(), Error> {
+        Self::setup(addr)?;
+        self.write_async_internal(bytes, false).await?;
+        self.read_async_internal(buffer, true, true).await
+    }
 }
 
 pub struct InterruptHandler<T: Instance> {
@@ -318,6 +328,22 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
     }
 }
 
+pub(crate) fn set_up_i2c_pin<'d, P, T>(pin: &P)
+where
+    P: core::ops::Deref<Target = T>,
+    T: crate::gpio::Pin,
+{
+    pin.gpio().ctrl().write(|w| w.set_funcsel(3));
+    pin.pad_ctrl().write(|w| {
+        w.set_schmitt(true);
+        w.set_slewfast(false);
+        w.set_ie(true);
+        w.set_od(false);
+        w.set_pue(true);
+        w.set_pde(false);
+    });
+}
+
 impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
     fn new_inner(
         _peri: impl Peripheral<P = T> + 'd,
@@ -355,23 +381,8 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
         p.ic_rx_tl().write(|w| w.set_rx_tl(0));
 
         // Configure SCL & SDA pins
-        scl.gpio().ctrl().write(|w| w.set_funcsel(3));
-        sda.gpio().ctrl().write(|w| w.set_funcsel(3));
-
-        scl.pad_ctrl().write(|w| {
-            w.set_schmitt(true);
-            w.set_ie(true);
-            w.set_od(false);
-            w.set_pue(true);
-            w.set_pde(false);
-        });
-        sda.pad_ctrl().write(|w| {
-            w.set_schmitt(true);
-            w.set_ie(true);
-            w.set_od(false);
-            w.set_pue(true);
-            w.set_pde(false);
-        });
+        set_up_i2c_pin(&scl);
+        set_up_i2c_pin(&sda);
 
         // Configure baudrate
 
@@ -713,7 +724,7 @@ mod nightly {
 
             Self::setup(addr)?;
             self.write_async_internal(write.iter().cloned(), false).await?;
-            self.read_async_internal(read, false, true).await
+            self.read_async_internal(read, true, true).await
         }
 
         async fn transaction(&mut self, address: A, operations: &mut [Operation<'_>]) -> Result<(), Self::Error> {

embassy-rp/src/i2c_slave.rs

@@ -5,12 +5,14 @@ use core::task::Poll;
 use embassy_hal_internal::into_ref;
 use pac::i2c;
 
-use crate::i2c::{i2c_reserved_addr, AbortReason, Instance, InterruptHandler, SclPin, SdaPin, FIFO_SIZE};
+use crate::i2c::{
+    i2c_reserved_addr, set_up_i2c_pin, AbortReason, Instance, InterruptHandler, SclPin, SdaPin, FIFO_SIZE,
+};
 use crate::interrupt::typelevel::{Binding, Interrupt};
 use crate::{pac, Peripheral};
 
 /// I2C error
-#[derive(Debug)]
+#[derive(Debug, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 #[non_exhaustive]
 pub enum Error {
@@ -100,23 +102,8 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
         p.ic_rx_tl().write(|w| w.set_rx_tl(0));
 
         // Configure SCL & SDA pins
-        scl.gpio().ctrl().write(|w| w.set_funcsel(3));
-        sda.gpio().ctrl().write(|w| w.set_funcsel(3));
-
-        scl.pad_ctrl().write(|w| {
-            w.set_schmitt(true);
-            w.set_ie(true);
-            w.set_od(false);
-            w.set_pue(true);
-            w.set_pde(false);
-        });
-        sda.pad_ctrl().write(|w| {
-            w.set_schmitt(true);
-            w.set_ie(true);
-            w.set_od(false);
-            w.set_pue(true);
-            w.set_pde(false);
-        });
+        set_up_i2c_pin(&scl);
+        set_up_i2c_pin(&sda);
 
         // Clear interrupts
         p.ic_clr_intr().read();

embassy-rp/src/lib.rs

@@ -10,6 +10,7 @@ mod critical_section_impl;
 mod intrinsics;
 
 pub mod adc;
+pub mod bootsel;
 pub mod clocks;
 pub mod dma;
 pub mod flash;
@@ -193,6 +194,7 @@ embassy_hal_internal::peripherals! {
     PIO1,
 
     WATCHDOG,
+    BOOTSEL,
 }
 
 macro_rules! select_bootloader {

embassy-rp/src/uart/buffered.rs

@@ -5,7 +5,7 @@ use core::task::Poll;
 use atomic_polyfill::{AtomicU8, Ordering};
 use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
 use embassy_sync::waitqueue::AtomicWaker;
-use embassy_time::{Duration, Timer};
+use embassy_time::Timer;
 
 use super::*;
 use crate::clocks::clk_peri_freq;
@@ -435,7 +435,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
         Self::flush().await.unwrap();
         while self.busy() {}
         regs.uartlcr_h().write_set(|w| w.set_brk(true));
-        Timer::after(Duration::from_micros(wait_usecs)).await;
+        Timer::after_micros(wait_usecs).await;
         regs.uartlcr_h().write_clear(|w| w.set_brk(true));
     }
 }

embassy-rp/src/uart/mod.rs

@@ -6,7 +6,7 @@ use atomic_polyfill::{AtomicU16, Ordering};
 use embassy_futures::select::{select, Either};
 use embassy_hal_internal::{into_ref, PeripheralRef};
 use embassy_sync::waitqueue::AtomicWaker;
-use embassy_time::{Duration, Timer};
+use embassy_time::Timer;
 use pac::uart::regs::Uartris;
 
 use crate::clocks::clk_peri_freq;
@@ -187,7 +187,7 @@ impl<'d, T: Instance, M: Mode> UartTx<'d, T, M> {
         self.blocking_flush().unwrap();
         while self.busy() {}
         regs.uartlcr_h().write_set(|w| w.set_brk(true));
-        Timer::after(Duration::from_micros(wait_usecs)).await;
+        Timer::after_micros(wait_usecs).await;
         regs.uartlcr_h().write_clear(|w| w.set_brk(true));
     }
 }

embassy-stm32-wpan/Cargo.toml

@@ -13,11 +13,11 @@ features = ["stm32wb55rg"]
 [dependencies]
 embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32" }
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
-embassy-time = { version = "0.1.3", path = "../embassy-time", optional = true }
+embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 embassy-hal-internal = { version = "0.1.0", path = "../embassy-hal-internal" }
 embassy-embedded-hal = { version = "0.1.0", path = "../embassy-embedded-hal" }
-embassy-net-driver = { version = "0.1.0", path = "../embassy-net-driver", optional=true }
+embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver", optional=true }
 
 defmt = { version = "0.3", optional = true }
 cortex-m = "0.7.6"

embassy-stm32/Cargo.toml

@@ -33,11 +33,11 @@ flavors = [
 
 [dependencies]
 embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
-embassy-time = { version = "0.1.3", path = "../embassy-time", optional = true }
+embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-4"] }
 embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" }
-embassy-net-driver = { version = "0.1.0", path = "../embassy-net-driver" }
+embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
 embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver", optional = true }
 embassy-executor = { version = "0.3.0", path = "../embassy-executor", optional = true }
 
@@ -58,16 +58,14 @@ rand_core = "0.6.3"
 sdio-host = "0.5.0"
 embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
 critical-section = "1.1"
-atomic-polyfill = "1.0.1"
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-06d13dfd245cc9bf86fd88c35b401bdb84c079c4" }
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-c20cbde88fdfaef4645361d09df0cb63a4dc6462" }
 vcell = "0.1.3"
 bxcan = "0.7.0"
 nb = "1.0.0"
 stm32-fmc = "0.3.0"
-seq-macro = "0.3.0"
 cfg-if = "1.0.0"
-embedded-io = { version = "0.5.0" }
-embedded-io-async = { version = "0.5.0", optional = true }
+embedded-io = { version = "0.6.0" }
+embedded-io-async = { version = "0.6.0", optional = true }
 chrono = { version = "^0.4", default-features = false, optional = true}
 bit_field = "0.10.2"
 document-features = "0.2.7"
@@ -78,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] }
 [build-dependencies]
 proc-macro2 = "1.0.36"
 quote = "1.0.15"
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-06d13dfd245cc9bf86fd88c35b401bdb84c079c4", default-features = false, features = ["metadata"]}
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-c20cbde88fdfaef4645361d09df0cb63a4dc6462", default-features = false, features = ["metadata"]}
 
 
 [features]

embassy-stm32/build.rs

@@ -5,9 +5,36 @@ use std::{env, fs};
 
 use proc_macro2::{Ident, TokenStream};
 use quote::{format_ident, quote};
-use stm32_metapac::metadata::{MemoryRegionKind, METADATA};
+use stm32_metapac::metadata::ir::{BlockItemInner, Enum, FieldSet};
+use stm32_metapac::metadata::{MemoryRegionKind, PeripheralRccRegister, METADATA};
 
 fn main() {
+    let target = env::var("TARGET").unwrap();
+
+    if target.starts_with("thumbv6m-") {
+        println!("cargo:rustc-cfg=cortex_m");
+        println!("cargo:rustc-cfg=armv6m");
+    } else if target.starts_with("thumbv7m-") {
+        println!("cargo:rustc-cfg=cortex_m");
+        println!("cargo:rustc-cfg=armv7m");
+    } else if target.starts_with("thumbv7em-") {
+        println!("cargo:rustc-cfg=cortex_m");
+        println!("cargo:rustc-cfg=armv7m");
+        println!("cargo:rustc-cfg=armv7em"); // (not currently used)
+    } else if target.starts_with("thumbv8m.base") {
+        println!("cargo:rustc-cfg=cortex_m");
+        println!("cargo:rustc-cfg=armv8m");
+        println!("cargo:rustc-cfg=armv8m_base");
+    } else if target.starts_with("thumbv8m.main") {
+        println!("cargo:rustc-cfg=cortex_m");
+        println!("cargo:rustc-cfg=armv8m");
+        println!("cargo:rustc-cfg=armv8m_main");
+    }
+
+    if target.ends_with("-eabihf") {
+        println!("cargo:rustc-cfg=has_fpu");
+    }
+
     let chip_name = match env::vars()
         .map(|(a, _)| a)
         .filter(|x| x.starts_with("CARGO_FEATURE_STM32"))
@@ -50,12 +77,14 @@ fn main() {
                 // We *shouldn't* have singletons for these, but the HAL currently requires
                 // singletons, for using with RccPeripheral to enable/disable clocks to them.
                 "rcc" => {
-                    if r.version.starts_with("h5") || r.version.starts_with("h7") || r.version.starts_with("f4") {
-                        singletons.push("MCO1".to_string());
-                        singletons.push("MCO2".to_string());
-                    }
-                    if r.version.starts_with("l4") {
-                        singletons.push("MCO".to_string());
+                    for pin in p.pins {
+                        if pin.signal.starts_with("MCO") {
+                            let name = pin.signal.replace('_', "").to_string();
+                            if !singletons.contains(&name) {
+                                println!("cargo:rustc-cfg={}", name.to_ascii_lowercase());
+                                singletons.push(name);
+                            }
+                        }
                     }
                     singletons.push(p.name.to_string());
                 }
@@ -359,6 +388,47 @@ fn main() {
         });
     }
 
+    // ========
+    // Extract the rcc registers
+    let rcc_registers = METADATA
+        .peripherals
+        .iter()
+        .filter_map(|p| p.registers.as_ref())
+        .find(|r| r.kind == "rcc")
+        .unwrap();
+
+    // ========
+    // Generate rcc fieldset and enum maps
+    let rcc_enum_map: HashMap<&str, HashMap<&str, &Enum>> = {
+        let rcc_blocks = rcc_registers.ir.blocks.iter().find(|b| b.name == "Rcc").unwrap().items;
+        let rcc_fieldsets: HashMap<&str, &FieldSet> = rcc_registers.ir.fieldsets.iter().map(|f| (f.name, f)).collect();
+        let rcc_enums: HashMap<&str, &Enum> = rcc_registers.ir.enums.iter().map(|e| (e.name, e)).collect();
+
+        rcc_blocks
+            .iter()
+            .filter_map(|b| match &b.inner {
+                BlockItemInner::Register(register) => register.fieldset.map(|f| (b.name, f)),
+                _ => None,
+            })
+            .filter_map(|(b, f)| {
+                rcc_fieldsets.get(f).map(|f| {
+                    (
+                        b,
+                        f.fields
+                            .iter()
+                            .filter_map(|f| {
+                                let enumm = f.enumm?;
+                                let enumm = rcc_enums.get(enumm)?;
+
+                                Some((f.name, *enumm))
+                            })
+                            .collect(),
+                    )
+                })
+            })
+            .collect()
+    };
+
     // ========
     // Generate RccPeripheral impls
 
@@ -378,10 +448,8 @@ fn main() {
                     let rst_reg = format_ident!("{}", rst.register.to_ascii_lowercase());
                     let set_rst_field = format_ident!("set_{}", rst.field.to_ascii_lowercase());
                     quote! {
-                        critical_section::with(|_| {
-                            crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(true));
-                            crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(false));
-                        });
+                        crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(true));
+                        crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(false));
                     }
                 }
                 None => TokenStream::new(),
@@ -398,9 +466,9 @@ fn main() {
 
             let ptype = if let Some(reg) = &p.registers { reg.kind } else { "" };
             let pname = format_ident!("{}", p.name);
-            let clk = format_ident!("{}", rcc.clock.to_ascii_lowercase());
-            let en_reg = format_ident!("{}", en.register.to_ascii_lowercase());
-            let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase());
+            let clk = format_ident!("{}", rcc.clock);
+            let en_reg = format_ident!("{}", en.register);
+            let set_en_field = format_ident!("set_{}", en.field);
 
             let (before_enable, before_disable) = if refcounted_peripherals.contains(ptype) {
                 let refcount_static =
@@ -426,31 +494,82 @@ fn main() {
                 (TokenStream::new(), TokenStream::new())
             };
 
+            let mux_supported = HashSet::from(["c0", "h5", "h50", "h7", "h7ab", "h7rm0433", "g4", "l4"])
+                .contains(rcc_registers.version);
+            let mux_for = |mux: Option<&'static PeripheralRccRegister>| {
+                // restrict mux implementation to supported versions
+                if !mux_supported {
+                    return None;
+                }
+
+                let mux = mux?;
+                let fieldset = rcc_enum_map.get(mux.register)?;
+                let enumm = fieldset.get(mux.field)?;
+
+                Some((mux, *enumm))
+            };
+
+            let clock_frequency = match mux_for(rcc.mux.as_ref()) {
+                Some((mux, rcc_enumm)) => {
+                    let fieldset_name = format_ident!("{}", mux.register);
+                    let field_name = format_ident!("{}", mux.field);
+                    let enum_name = format_ident!("{}", rcc_enumm.name);
+
+                    let match_arms: TokenStream = rcc_enumm
+                        .variants
+                        .iter()
+                        .filter(|v| v.name != "DISABLE")
+                        .map(|v| {
+                            let variant_name = format_ident!("{}", v.name);
+                            let clock_name = format_ident!("{}", v.name.to_ascii_lowercase());
+
+                            if v.name.starts_with("HCLK") || v.name.starts_with("PCLK") || v.name == "SYS" { 
+                                quote! {
+                                    #enum_name::#variant_name => unsafe { crate::rcc::get_freqs().#clock_name },
+                                }
+                            } else {
+                                quote! {
+                                    #enum_name::#variant_name => unsafe { crate::rcc::get_freqs().#clock_name.unwrap() },
+                                }
+                            }
+                        })
+                        .collect();
+
+                    quote! {
+                        use crate::pac::rcc::vals::#enum_name;
+
+                        #[allow(unreachable_patterns)]
+                        match crate::pac::RCC.#fieldset_name().read().#field_name() {
+                            #match_arms
+
+                            _ => unreachable!(),
+                        }
+                    }
+                }
+                None => quote! {
+                    unsafe { crate::rcc::get_freqs().#clk }
+                },
+            };
+
             g.extend(quote! {
                 impl crate::rcc::sealed::RccPeripheral for peripherals::#pname {
                     fn frequency() -> crate::time::Hertz {
-                        unsafe { crate::rcc::get_freqs().#clk }
+                        #clock_frequency
                     }
-                    fn enable() {
-                        critical_section::with(|_| {
-                            #before_enable
-                            #[cfg(feature = "low-power")]
-                            crate::rcc::clock_refcount_add();
-                            crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
-                            #after_enable
-                        })
-                    }
-                    fn disable() {
-                        critical_section::with(|_| {
-                            #before_disable
-                            crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(false));
-                            #[cfg(feature = "low-power")]
-                            crate::rcc::clock_refcount_sub();
-                        })
-                    }
-                    fn reset() {
+                    fn enable_and_reset_with_cs(_cs: critical_section::CriticalSection) {
+                        #before_enable
+                        #[cfg(feature = "low-power")]
+                        crate::rcc::clock_refcount_add(_cs);
+                        crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
+                        #after_enable
                         #rst
                     }
+                    fn disable_with_cs(_cs: critical_section::CriticalSection) {
+                        #before_disable
+                        crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(false));
+                        #[cfg(feature = "low-power")]
+                        crate::rcc::clock_refcount_sub(_cs);
+                    }
                 }
 
                 impl crate::rcc::RccPeripheral for peripherals::#pname {}
@@ -458,12 +577,14 @@ fn main() {
         }
     }
 
-    let mut refcount_mod = TokenStream::new();
-    for refcount_static in refcount_statics {
-        refcount_mod.extend(quote! {
-            pub(crate) static mut #refcount_static: u8 = 0;
-        });
-    }
+    let refcount_mod: TokenStream = refcount_statics
+        .iter()
+        .map(|refcount_static| {
+            quote! {
+                pub(crate) static mut #refcount_static: u8 = 0;
+            }
+        })
+        .collect();
 
     g.extend(quote! {
         mod refcount_statics {
@@ -751,25 +872,8 @@ fn main() {
                     let af = pin.af.unwrap_or(0);
 
                     // MCO is special
-                    if pin.signal.starts_with("MCO_") {
-                        // Supported in H7 only for now
-                        if regs.version.starts_with("h5")
-                            || regs.version.starts_with("h7")
-                            || regs.version.starts_with("f4")
-                        {
-                            peri = format_ident!("{}", pin.signal.replace('_', ""));
-                        } else {
-                            continue;
-                        }
-                    }
-
-                    if pin.signal == "MCO" {
-                        // Supported in H7 only for now
-                        if regs.version.starts_with("l4") {
-                            peri = format_ident!("MCO");
-                        } else {
-                            continue;
-                        }
+                    if pin.signal.starts_with("MCO") {
+                        peri = format_ident!("{}", pin.signal.replace('_', ""));
                     }
 
                     g.extend(quote! {
@@ -908,6 +1012,97 @@ fn main() {
         }
     }
 
+    // ========
+    // Generate Div/Mul impls for RCC prescalers/dividers/multipliers.
+    for e in rcc_registers.ir.enums {
+        fn is_rcc_name(e: &str) -> bool {
+            match e {
+                "Pllp" | "Pllq" | "Pllr" | "Pllm" | "Plln" => true,
+                "Timpre" | "Pllrclkpre" => false,
+                e if e.ends_with("pre") || e.ends_with("pres") || e.ends_with("div") || e.ends_with("mul") => true,
+                _ => false,
+            }
+        }
+
+        #[derive(Copy, Clone, Debug)]
+        struct Frac {
+            num: u32,
+            denom: u32,
+        }
+
+        impl Frac {
+            fn simplify(self) -> Self {
+                let d = gcd(self.num, self.denom);
+                Self {
+                    num: self.num / d,
+                    denom: self.denom / d,
+                }
+            }
+        }
+
+        fn gcd(a: u32, b: u32) -> u32 {
+            if b == 0 {
+                return a;
+            }
+            gcd(b, a % b)
+        }
+
+        fn parse_num(n: &str) -> Result<Frac, ()> {
+            for prefix in ["DIV", "MUL"] {
+                if let Some(n) = n.strip_prefix(prefix) {
+                    let exponent = n.find('_').map(|e| n.len() - 1 - e).unwrap_or(0) as u32;
+                    let mantissa = n.replace('_', "").parse().map_err(|_| ())?;
+                    let f = Frac {
+                        num: mantissa,
+                        denom: 10u32.pow(exponent),
+                    };
+                    return Ok(f.simplify());
+                }
+            }
+            Err(())
+        }
+
+        if is_rcc_name(e.name) {
+            let enum_name = format_ident!("{}", e.name);
+            let mut muls = Vec::new();
+            let mut divs = Vec::new();
+            for v in e.variants {
+                let Ok(val) = parse_num(v.name) else {
+                    panic!("could not parse mul/div. enum={} variant={}", e.name, v.name)
+                };
+                let variant_name = format_ident!("{}", v.name);
+                let variant = quote!(crate::pac::rcc::vals::#enum_name::#variant_name);
+                let num = val.num;
+                let denom = val.denom;
+                muls.push(quote!(#variant => self * #num / #denom,));
+                divs.push(quote!(#variant => self * #denom / #num,));
+            }
+
+            g.extend(quote! {
+                impl core::ops::Div<crate::pac::rcc::vals::#enum_name> for crate::time::Hertz {
+                    type Output = crate::time::Hertz;
+                    fn div(self, rhs: crate::pac::rcc::vals::#enum_name) -> Self::Output {
+                        match rhs {
+                            #(#divs)*
+                            #[allow(unreachable_patterns)]
+                            _ => unreachable!(),
+                        }
+                    }
+                }
+                impl core::ops::Mul<crate::pac::rcc::vals::#enum_name> for crate::time::Hertz {
+                    type Output = crate::time::Hertz;
+                    fn mul(self, rhs: crate::pac::rcc::vals::#enum_name) -> Self::Output {
+                        match rhs {
+                            #(#muls)*
+                            #[allow(unreachable_patterns)]
+                            _ => unreachable!(),
+                        }
+                    }
+                }
+            });
+        }
+    }
+
     // ========
     // Write foreach_foo! macrotables
 

embassy-stm32/src/adc/f1.rs

@@ -51,8 +51,7 @@ impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
 impl<'d, T: Instance> Adc<'d, T> {
     pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self {
         into_ref!(adc);
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
         T::regs().cr2().modify(|reg| reg.set_adon(true));
 
         // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’)

embassy-stm32/src/adc/f3.rs

@@ -64,8 +64,7 @@ impl<'d, T: Instance> Adc<'d, T> {
 
         into_ref!(adc);
 
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         // Enable the adc regulator
         T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::INTERMEDIATE));

embassy-stm32/src/adc/mod.rs

@@ -74,9 +74,9 @@ pub(crate) mod sealed {
     }
 }
 
-#[cfg(not(any(adc_f1, adc_v1, adc_v2, adc_v4, adc_f3)))]
+#[cfg(not(any(adc_f1, adc_v1, adc_v2, adc_v3, adc_v4, adc_f3, adc_g0)))]
 pub trait Instance: sealed::Instance + crate::Peripheral<P = Self> {}
-#[cfg(any(adc_f1, adc_v1, adc_v2, adc_v4, adc_f3))]
+#[cfg(any(adc_f1, adc_v1, adc_v2, adc_v3, adc_v4, adc_f3, adc_g0))]
 pub trait Instance: sealed::Instance + crate::Peripheral<P = Self> + crate::rcc::RccPeripheral {}
 
 pub trait AdcPin<T: Instance>: sealed::AdcPin<T> {}

embassy-stm32/src/adc/v1.rs

@@ -61,8 +61,7 @@ impl<'d, T: Instance> Adc<'d, T> {
         delay: &mut impl DelayUs<u32>,
     ) -> Self {
         into_ref!(adc);
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         // Delay 1μs when using HSI14 as the ADC clock.
         //

embassy-stm32/src/adc/v2.rs

@@ -95,8 +95,7 @@ where
 {
     pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self {
         into_ref!(adc);
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         let presc = Prescaler::from_pclk2(T::frequency());
         T::common_regs().ccr().modify(|w| w.set_adcpre(presc.adcpre()));

embassy-stm32/src/adc/v3.rs

@@ -9,19 +9,6 @@ pub const VREF_DEFAULT_MV: u32 = 3300;
 /// VREF voltage used for factory calibration of VREFINTCAL register.
 pub const VREF_CALIB_MV: u32 = 3000;
 
-/// Sadly we cannot use `RccPeripheral::enable` since devices are quite inconsistent ADC clock
-/// configuration.
-fn enable() {
-    critical_section::with(|_| {
-        #[cfg(any(stm32h7, stm32wl))]
-        crate::pac::RCC.apb2enr().modify(|w| w.set_adcen(true));
-        #[cfg(stm32g0)]
-        crate::pac::RCC.apbenr2().modify(|w| w.set_adcen(true));
-        #[cfg(any(stm32l4, stm32l5, stm32wb))]
-        crate::pac::RCC.ahb2enr().modify(|w| w.set_adcen(true));
-    });
-}
-
 pub struct VrefInt;
 impl<T: Instance> AdcPin<T> for VrefInt {}
 impl<T: Instance> super::sealed::AdcPin<T> for VrefInt {
@@ -61,7 +48,7 @@ impl<T: Instance> super::sealed::AdcPin<T> for Vbat {
 impl<'d, T: Instance> Adc<'d, T> {
     pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self {
         into_ref!(adc);
-        enable();
+        T::enable_and_reset();
         T::regs().cr().modify(|reg| {
             #[cfg(not(adc_g0))]
             reg.set_deeppwd(false);

embassy-stm32/src/adc/v4.rs

@@ -127,8 +127,7 @@ impl Prescaler {
 impl<'d, T: Instance> Adc<'d, T> {
     pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u16>) -> Self {
         embassy_hal_internal::into_ref!(adc);
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         let prescaler = Prescaler::from_ker_ck(T::frequency());
 

embassy-stm32/src/can/bxcan.rs

@@ -136,8 +136,7 @@ impl<'d, T: Instance> Can<'d, T> {
         rx.set_as_af(rx.af_num(), AFType::Input);
         tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
 
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         {
             use crate::pac::can::vals::{Errie, Fmpie, Tmeie};

embassy-stm32/src/crc/v1.rs

@@ -16,9 +16,7 @@ impl<'d> Crc<'d> {
 
         // Note: enable and reset come from RccPeripheral.
         // enable CRC clock in RCC.
-        CRC::enable();
-        // Reset CRC to default values.
-        CRC::reset();
+        CRC::enable_and_reset();
         // Peripheral the peripheral
         let mut instance = Self { _peri: peripheral };
         instance.reset();

embassy-stm32/src/crc/v2v3.rs

@@ -69,16 +69,13 @@ impl<'d> Crc<'d> {
     /// Instantiates the CRC32 peripheral and initializes it to default values.
     pub fn new(peripheral: impl Peripheral<P = CRC> + 'd, config: Config) -> Self {
         // Note: enable and reset come from RccPeripheral.
-        // enable CRC clock in RCC.
-        CRC::enable();
-        // Reset CRC to default values.
-        CRC::reset();
+        // reset to default values and enable CRC clock in RCC.
+        CRC::enable_and_reset();
         into_ref!(peripheral);
         let mut instance = Self {
             _peripheral: peripheral,
             _config: config,
         };
-        CRC::reset();
         instance.reconfigure();
         instance.reset();
         instance

embassy-stm32/src/dac/mod.rs

@@ -11,7 +11,7 @@ use crate::{peripherals, Peripheral};
 
 #[derive(Debug, Copy, Clone, Eq, PartialEq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
-/// Curstom Errors
+/// Custom Errors
 pub enum Error {
     UnconfiguredChannel,
     InvalidValue,
@@ -255,8 +255,7 @@ impl<'d, T: Instance, Tx> DacCh1<'d, T, Tx> {
     ) -> Self {
         pin.set_as_analog();
         into_ref!(peri, dma);
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         let mut dac = Self { _peri: peri, dma };
 
@@ -366,8 +365,7 @@ impl<'d, T: Instance, Tx> DacCh2<'d, T, Tx> {
     ) -> Self {
         pin.set_as_analog();
         into_ref!(_peri, dma);
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         let mut dac = Self {
             phantom: PhantomData,
@@ -483,8 +481,7 @@ impl<'d, T: Instance, TxCh1, TxCh2> Dac<'d, T, TxCh1, TxCh2> {
         pin_ch1.set_as_analog();
         pin_ch2.set_as_analog();
         into_ref!(peri, dma_ch1, dma_ch2);
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         let mut dac_ch1 = DacCh1 {
             _peri: peri,
@@ -563,35 +560,26 @@ pub trait DacPin<T: Instance, const C: u8>: crate::gpio::Pin + 'static {}
 
 foreach_peripheral!(
     (dac, $inst:ident) => {
-        // H7 uses single bit for both DAC1 and DAC2, this is a hack until a proper fix is implemented
-        #[cfg(rcc_h7)]
-        impl crate::rcc::sealed::RccPeripheral for peripherals::$inst {
-            fn frequency() -> crate::time::Hertz {
-                critical_section::with(|_| unsafe { crate::rcc::get_freqs().apb1 })
-            }
+                // H7 uses single bit for both DAC1 and DAC2, this is a hack until a proper fix is implemented
+                #[cfg(any(rcc_h7, rcc_h7rm0433))]
+                impl crate::rcc::sealed::RccPeripheral for peripherals::$inst {
+                    fn frequency() -> crate::time::Hertz {
+                        critical_section::with(|_| unsafe { crate::rcc::get_freqs().pclk1 })
+                    }
 
-            fn reset() {
-                critical_section::with(|_| {
-                    crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(true));
-                    crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(false));
-                })
-            }
+                    fn enable_and_reset_with_cs(_cs: critical_section::CriticalSection) {
+                        crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(true));
+                        crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(false));
+                        crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(true));
+                    }
 
-            fn enable() {
-                critical_section::with(|_| {
-                    crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(true));
-                })
-            }
+                    fn disable_with_cs(_cs: critical_section::CriticalSection) {
+                        crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(false))
+                    }
+                }
 
-            fn disable() {
-                critical_section::with(|_| {
-                    crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(false))
-                })
-            }
-        }
-
-        #[cfg(rcc_h7)]
-        impl crate::rcc::RccPeripheral for peripherals::$inst {}
+                #[cfg(any(rcc_h7, rcc_h7rm0433))]
+                impl crate::rcc::RccPeripheral for peripherals::$inst {}
 
         impl crate::dac::sealed::Instance for peripherals::$inst {
             fn regs() -> &'static crate::pac::dac::Dac {

embassy-stm32/src/dcmi.rs

@@ -330,8 +330,7 @@ where
         use_embedded_synchronization: bool,
         edm: u8,
     ) -> Self {
-        T::reset();
-        T::enable();
+        T::enable_and_reset();
 
         peri.regs().cr().modify(|r| {
             r.set_cm(true); // disable continuous mode (snapshot mode)

embassy-stm32/src/dma/bdma.rs

@@ -2,10 +2,9 @@
 
 use core::future::Future;
 use core::pin::Pin;
-use core::sync::atomic::{fence, Ordering};
+use core::sync::atomic::{fence, AtomicUsize, Ordering};
 use core::task::{Context, Poll, Waker};
 
-use atomic_polyfill::AtomicUsize;
 use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
 use embassy_sync::waitqueue::AtomicWaker;
 
@@ -78,10 +77,10 @@ impl State {
 static STATE: State = State::new();
 
 /// safety: must be called only once
-pub(crate) unsafe fn init(irq_priority: Priority) {
+pub(crate) unsafe fn init(cs: critical_section::CriticalSection, irq_priority: Priority) {
     foreach_interrupt! {
         ($peri:ident, bdma, $block:ident, $signal_name:ident, $irq:ident) => {
-            crate::interrupt::typelevel::$irq::set_priority(irq_priority);
+            crate::interrupt::typelevel::$irq::set_priority_with_cs(cs, irq_priority);
             crate::interrupt::typelevel::$irq::enable();
         };
     }
@@ -127,7 +126,13 @@ pub(crate) unsafe fn on_irq_inner(dma: pac::bdma::Dma, channel_num: usize, index
     } else if isr.tcif(channel_num) && cr.read().tcie() {
         // Acknowledge transfer complete interrupt
         dma.ifcr().write(|w| w.set_tcif(channel_num, true));
+        #[cfg(not(armv6m))]
         STATE.complete_count[index].fetch_add(1, Ordering::Release);
+        #[cfg(armv6m)]
+        critical_section::with(|_| {
+            let x = STATE.complete_count[index].load(Ordering::Relaxed);
+            STATE.complete_count[index].store(x + 1, Ordering::Release);
+        })
     } else {
         return;
     }
@@ -391,7 +396,14 @@ impl<'a, C: Channel> DmaCtrl for DmaCtrlImpl<'a, C> {
     }
 
     fn reset_complete_count(&mut self) -> usize {
-        STATE.complete_count[self.0.index()].swap(0, Ordering::AcqRel)
+        #[cfg(not(armv6m))]
+        return STATE.complete_count[self.0.index()].swap(0, Ordering::AcqRel);
+        #[cfg(armv6m)]
+        return critical_section::with(|_| {
+            let x = STATE.complete_count[self.0.index()].load(Ordering::Acquire);
+            STATE.complete_count[self.0.index()].store(0, Ordering::Release);
+            x
+        });
     }
 
     fn set_waker(&mut self, waker: &Waker) {

embassy-stm32/src/dma/dma.rs

@@ -154,10 +154,10 @@ impl State {
 static STATE: State = State::new();
 
 /// safety: must be called only once
-pub(crate) unsafe fn init(irq_priority: Priority) {
+pub(crate) unsafe fn init(cs: critical_section::CriticalSection, irq_priority: Priority) {
     foreach_interrupt! {
         ($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => {
-            interrupt::typelevel::$irq::set_priority(irq_priority);
+            interrupt::typelevel::$irq::set_priority_with_cs(cs, irq_priority);
             interrupt::typelevel::$irq::enable();
         };
     }

embassy-stm32/src/dma/dmamux.rs

@@ -47,6 +47,6 @@ foreach_dma_channel! {
 }
 
 /// safety: must be called only once
-pub(crate) unsafe fn init() {
+pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
     crate::_generated::init_dmamux();
 }

embassy-stm32/src/dma/gpdma.rs

@@ -53,10 +53,10 @@ impl State {
 static STATE: State = State::new();
 
 /// safety: must be called only once
-pub(crate) unsafe fn init(irq_priority: Priority) {
+pub(crate) unsafe fn init(cs: critical_section::CriticalSection, irq_priority: Priority) {
     foreach_interrupt! {
         ($peri:ident, gpdma, $block:ident, $signal_name:ident, $irq:ident) => {
-            crate::interrupt::typelevel::$irq::set_priority(irq_priority);
+            crate::interrupt::typelevel::$irq::set_priority_with_cs(cs, irq_priority);
             crate::interrupt::typelevel::$irq::enable();
         };
     }

embassy-stm32/src/dma/mod.rs

@@ -56,16 +56,17 @@ pub(crate) fn slice_ptr_parts_mut<T>(slice: *mut [T]) -> (usize, usize) {
 
 // safety: must be called only once at startup
 pub(crate) unsafe fn init(
+    cs: critical_section::CriticalSection,
     #[cfg(bdma)] bdma_priority: Priority,
     #[cfg(dma)] dma_priority: Priority,
     #[cfg(gpdma)] gpdma_priority: Priority,
 ) {
     #[cfg(bdma)]
-    bdma::init(bdma_priority);
+    bdma::init(cs, bdma_priority);
     #[cfg(dma)]
-    dma::init(dma_priority);
+    dma::init(cs, dma_priority);
     #[cfg(gpdma)]
-    gpdma::init(gpdma_priority);
+    gpdma::init(cs, gpdma_priority);
     #[cfg(dmamux)]
-    dmamux::init();
+    dmamux::init(cs);
 }

embassy-stm32/src/eth/generic_smi.rs

@@ -41,39 +41,40 @@ mod phy_consts {
 }
 use self::phy_consts::*;
 
-/// Generic SMI Ethernet PHY
+/// Generic SMI Ethernet PHY implementation
 pub struct GenericSMI {
+    phy_addr: u8,
     #[cfg(feature = "time")]
     poll_interval: Duration,
-    #[cfg(not(feature = "time"))]
-    _private: (),
 }
 
 impl GenericSMI {
-    pub fn new() -> Self {
+    /// Construct the PHY. It assumes the address `phy_addr` in the SMI communication
+    pub fn new(phy_addr: u8) -> Self {
         Self {
+            phy_addr,
             #[cfg(feature = "time")]
             poll_interval: Duration::from_millis(500),
-            #[cfg(not(feature = "time"))]
-            _private: (),
         }
     }
 }
 
 unsafe impl PHY for GenericSMI {
-    /// Reset PHY and wait for it to come out of reset.
     fn phy_reset<S: StationManagement>(&mut self, sm: &mut S) {
-        sm.smi_write(PHY_REG_BCR, PHY_REG_BCR_RESET);
-        while sm.smi_read(PHY_REG_BCR) & PHY_REG_BCR_RESET == PHY_REG_BCR_RESET {}
+        sm.smi_write(self.phy_addr, PHY_REG_BCR, PHY_REG_BCR_RESET);
+        while sm.smi_read(self.phy_addr, PHY_REG_BCR) & PHY_REG_BCR_RESET == PHY_REG_BCR_RESET {}
     }
 
-    /// PHY initialisation.
     fn phy_init<S: StationManagement>(&mut self, sm: &mut S) {
         // Clear WU CSR
         self.smi_write_ext(sm, PHY_REG_WUCSR, 0);
 
         // Enable auto-negotiation
-        sm.smi_write(PHY_REG_BCR, PHY_REG_BCR_AN | PHY_REG_BCR_ANRST | PHY_REG_BCR_100M);
+        sm.smi_write(
+            self.phy_addr,
+            PHY_REG_BCR,
+            PHY_REG_BCR_AN | PHY_REG_BCR_ANRST | PHY_REG_BCR_100M,
+        );
     }
 
     fn poll_link<S: StationManagement>(&mut self, sm: &mut S, cx: &mut Context) -> bool {
@@ -83,7 +84,7 @@ unsafe impl PHY for GenericSMI {
         #[cfg(feature = "time")]
         let _ = Timer::after(self.poll_interval).poll_unpin(cx);
 
-        let bsr = sm.smi_read(PHY_REG_BSR);
+        let bsr = sm.smi_read(self.phy_addr, PHY_REG_BSR);
 
         // No link without autonegotiate
         if bsr & PHY_REG_BSR_ANDONE == 0 {
@@ -108,9 +109,9 @@ impl GenericSMI {
 
     // Writes a value to an extended PHY register in MMD address space
     fn smi_write_ext<S: StationManagement>(&mut self, sm: &mut S, reg_addr: u16, reg_data: u16) {
-        sm.smi_write(PHY_REG_CTL, 0x0003); // set address
-        sm.smi_write(PHY_REG_ADDAR, reg_addr);
-        sm.smi_write(PHY_REG_CTL, 0x4003); // set data
-        sm.smi_write(PHY_REG_ADDAR, reg_data);
+        sm.smi_write(self.phy_addr, PHY_REG_CTL, 0x0003); // set address
+        sm.smi_write(self.phy_addr, PHY_REG_ADDAR, reg_addr);
+        sm.smi_write(self.phy_addr, PHY_REG_CTL, 0x4003); // set data
+        sm.smi_write(self.phy_addr, PHY_REG_ADDAR, reg_data);
     }
 }

embassy-stm32/src/eth/mod.rs

@@ -134,9 +134,9 @@ impl<'a, 'd> embassy_net_driver::TxToken for TxToken<'a, 'd> {
 /// The methods cannot move out of self
 pub unsafe trait StationManagement {
     /// Read a register over SMI.
-    fn smi_read(&mut self, reg: u8) -> u16;
+    fn smi_read(&mut self, phy_addr: u8, reg: u8) -> u16;
     /// Write a register over SMI.
-    fn smi_write(&mut self, reg: u8, val: u16);
+    fn smi_write(&mut self, phy_addr: u8, reg: u8, val: u16);
 }
 
 /// Traits for an Ethernet PHY

embassy-stm32/src/eth/v1/mod.rs

@@ -107,7 +107,6 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
         tx_en: impl Peripheral<P = impl TXEnPin<T>> + 'd,
         phy: P,
         mac_addr: [u8; 6],
-        phy_addr: u8,
     ) -> Self {
         into_ref!(peri, ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en);
 
@@ -192,7 +191,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
         // TODO MTU size setting not found for v1 ethernet, check if correct
 
         // NOTE(unsafe) We got the peripheral singleton, which means that `rcc::init` was called
-        let hclk = unsafe { crate::rcc::get_freqs() }.ahb1;
+        let hclk = unsafe { crate::rcc::get_freqs() }.hclk1;
         let hclk_mhz = hclk.0 / 1_000_000;
 
         // Set the MDC clock frequency in the range 1MHz - 2.5MHz
@@ -227,7 +226,6 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
             station_management: EthernetStationManagement {
                 peri: PhantomData,
                 clock_range: clock_range,
-                phy_addr: phy_addr,
             },
             mac_addr,
             tx: TDesRing::new(&mut queue.tx_desc, &mut queue.tx_buf),
@@ -271,15 +269,14 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
 pub struct EthernetStationManagement<T: Instance> {
     peri: PhantomData<T>,
     clock_range: Cr,
-    phy_addr: u8,
 }
 
 unsafe impl<T: Instance> StationManagement for EthernetStationManagement<T> {
-    fn smi_read(&mut self, reg: u8) -> u16 {
+    fn smi_read(&mut self, phy_addr: u8, reg: u8) -> u16 {
         let mac = ETH.ethernet_mac();
 
         mac.macmiiar().modify(|w| {
-            w.set_pa(self.phy_addr);
+            w.set_pa(phy_addr);
             w.set_mr(reg);
             w.set_mw(Mw::READ); // read operation
             w.set_cr(self.clock_range);
@@ -289,12 +286,12 @@ unsafe impl<T: Instance> StationManagement for EthernetStationManagement<T> {
         mac.macmiidr().read().md()
     }
 
-    fn smi_write(&mut self, reg: u8, val: u16) {
+    fn smi_write(&mut self, phy_addr: u8, reg: u8, val: u16) {
         let mac = ETH.ethernet_mac();
 
         mac.macmiidr().write(|w| w.set_md(val));
         mac.macmiiar().modify(|w| {
-            w.set_pa(self.phy_addr);
+            w.set_pa(phy_addr);
             w.set_mr(reg);
             w.set_mw(Mw::WRITE); // write
             w.set_cr(self.clock_range);

embassy-stm32/src/eth/v2/mod.rs

@@ -71,7 +71,6 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
         tx_en: impl Peripheral<P = impl TXEnPin<T>> + 'd,
         phy: P,
         mac_addr: [u8; 6],
-        phy_addr: u8,
     ) -> Self {
         into_ref!(peri, ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en);
 
@@ -165,7 +164,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
         });
 
         // NOTE(unsafe) We got the peripheral singleton, which means that `rcc::init` was called
-        let hclk = unsafe { crate::rcc::get_freqs() }.ahb1;
+        let hclk = unsafe { crate::rcc::get_freqs() }.hclk1;
         let hclk_mhz = hclk.0 / 1_000_000;
 
         // Set the MDC clock frequency in the range 1MHz - 2.5MHz
@@ -202,7 +201,6 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
             station_management: EthernetStationManagement {
                 peri: PhantomData,
                 clock_range: clock_range,
-                phy_addr: phy_addr,
             },
             mac_addr,
         };
@@ -242,15 +240,14 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
 pub struct EthernetStationManagement<T: Instance> {
     peri: PhantomData<T>,
     clock_range: u8,
-    phy_addr: u8,
 }
 
 unsafe impl<T: Instance> StationManagement for EthernetStationManagement<T> {
-    fn smi_read(&mut self, reg: u8) -> u16 {
+    fn smi_read(&mut self, phy_addr: u8, reg: u8) -> u16 {
         let mac = ETH.ethernet_mac();
 
         mac.macmdioar().modify(|w| {
-            w.set_pa(self.phy_addr);
+            w.set_pa(phy_addr);
             w.set_rda(reg);
             w.set_goc(0b11); // read
             w.set_cr(self.clock_range);
@@ -260,12 +257,12 @@ unsafe impl<T: Instance> StationManagement for EthernetStationManagement<T> {
         mac.macmdiodr().read().md()
     }
 
-    fn smi_write(&mut self, reg: u8, val: u16) {
+    fn smi_write(&mut self, phy_addr: u8, reg: u8, val: u16) {
         let mac = ETH.ethernet_mac();
 
         mac.macmdiodr().write(|w| w.set_md(val));
         mac.macmdioar().modify(|w| {
-            w.set_pa(self.phy_addr);
+            w.set_pa(phy_addr);
             w.set_rda(reg);
             w.set_goc(0b01); // write
             w.set_cr(self.clock_range);

embassy-stm32/src/exti.rs

@@ -367,7 +367,7 @@ macro_rules! enable_irq {
 }
 
 /// safety: must be called only once
-pub(crate) unsafe fn init() {
+pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
     use crate::interrupt::typelevel::Interrupt;
 
     foreach_exti_irq!(enable_irq);

embassy-stm32/src/flash/f0.rs

@@ -19,8 +19,10 @@ pub(crate) unsafe fn lock() {
 }
 
 pub(crate) unsafe fn unlock() {
-    pac::FLASH.keyr().write(|w| w.set_fkeyr(0x4567_0123));
-    pac::FLASH.keyr().write(|w| w.set_fkeyr(0xCDEF_89AB));
+    if pac::FLASH.cr().read().lock() {
+        pac::FLASH.keyr().write(|w| w.set_fkeyr(0x4567_0123));
+        pac::FLASH.keyr().write(|w| w.set_fkeyr(0xCDEF_89AB));
+    }
 }
 
 pub(crate) unsafe fn enable_blocking_write() {

embassy-stm32/src/flash/f3.rs

@@ -19,8 +19,10 @@ pub(crate) unsafe fn lock() {
 }
 
 pub(crate) unsafe fn unlock() {
-    pac::FLASH.keyr().write(|w| w.set_fkeyr(0x4567_0123));
-    pac::FLASH.keyr().write(|w| w.set_fkeyr(0xCDEF_89AB));
+    if pac::FLASH.cr().read().lock() {
+        pac::FLASH.keyr().write(|w| w.set_fkeyr(0x4567_0123));
+        pac::FLASH.keyr().write(|w| w.set_fkeyr(0xCDEF_89AB));
+    }
 }
 
 pub(crate) unsafe fn enable_blocking_write() {

embassy-stm32/src/flash/f4.rs

@@ -228,8 +228,10 @@ pub(crate) unsafe fn lock() {
 }
 
 pub(crate) unsafe fn unlock() {
-    pac::FLASH.keyr().write(|w| w.set_key(0x45670123));
-    pac::FLASH.keyr().write(|w| w.set_key(0xCDEF89AB));
+    if pac::FLASH.cr().read().lock() {
+        pac::FLASH.keyr().write(|w| w.set_key(0x45670123));
+        pac::FLASH.keyr().write(|w| w.set_key(0xCDEF89AB));
+    }
 }
 
 pub(crate) unsafe fn enable_write() {

embassy-stm32/src/flash/f7.rs

@@ -19,8 +19,10 @@ pub(crate) unsafe fn lock() {
 }
 
 pub(crate) unsafe fn unlock() {
-    pac::FLASH.keyr().write(|w| w.set_key(0x4567_0123));
-    pac::FLASH.keyr().write(|w| w.set_key(0xCDEF_89AB));
+    if pac::FLASH.cr().read().lock() {
+        pac::FLASH.keyr().write(|w| w.set_key(0x4567_0123));
+        pac::FLASH.keyr().write(|w| w.set_key(0xCDEF_89AB));
+    }
 }
 
 pub(crate) unsafe fn enable_blocking_write() {

embassy-stm32/src/flash/g0.rs

@@ -24,8 +24,10 @@ pub(crate) unsafe fn unlock() {
     while pac::FLASH.sr().read().bsy() {}
 
     // Unlock flash
-    pac::FLASH.keyr().write(|w| w.set_keyr(0x4567_0123));
-    pac::FLASH.keyr().write(|w| w.set_keyr(0xCDEF_89AB));
+    if pac::FLASH.cr().read().lock() {
+        pac::FLASH.keyr().write(|w| w.set_keyr(0x4567_0123));
+        pac::FLASH.keyr().write(|w| w.set_keyr(0xCDEF_89AB));
+    }
 }
 
 pub(crate) unsafe fn enable_blocking_write() {

embassy-stm32/src/flash/h7.rs

@@ -26,11 +26,15 @@ pub(crate) unsafe fn lock() {
 }
 
 pub(crate) unsafe fn unlock() {
-    pac::FLASH.bank(0).keyr().write(|w| w.set_keyr(0x4567_0123));
-    pac::FLASH.bank(0).keyr().write(|w| w.set_keyr(0xCDEF_89AB));
+    if pac::FLASH.bank(0).cr().read().lock() {
+        pac::FLASH.bank(0).keyr().write(|w| w.set_keyr(0x4567_0123));
+        pac::FLASH.bank(0).keyr().write(|w| w.set_keyr(0xCDEF_89AB));
+    }
     if is_dual_bank() {
-        pac::FLASH.bank(1).keyr().write(|w| w.set_keyr(0x4567_0123));
-        pac::FLASH.bank(1).keyr().write(|w| w.set_keyr(0xCDEF_89AB));
+        if pac::FLASH.bank(1).cr().read().lock() {
+            pac::FLASH.bank(1).keyr().write(|w| w.set_keyr(0x4567_0123));
+            pac::FLASH.bank(1).keyr().write(|w| w.set_keyr(0xCDEF_89AB));
+        }
     }
 }
 

embassy-stm32/src/flash/l.rs

@@ -28,17 +28,23 @@ pub(crate) unsafe fn lock() {
 pub(crate) unsafe fn unlock() {
     #[cfg(any(flash_wl, flash_wb, flash_l4))]
     {
-        pac::FLASH.keyr().write(|w| w.set_keyr(0x4567_0123));
-        pac::FLASH.keyr().write(|w| w.set_keyr(0xCDEF_89AB));
+        if pac::FLASH.cr().read().lock() {
+            pac::FLASH.keyr().write(|w| w.set_keyr(0x4567_0123));
+            pac::FLASH.keyr().write(|w| w.set_keyr(0xCDEF_89AB));
+        }
     }
 
     #[cfg(any(flash_l0, flash_l1))]
     {
-        pac::FLASH.pekeyr().write(|w| w.set_pekeyr(0x89ABCDEF));
-        pac::FLASH.pekeyr().write(|w| w.set_pekeyr(0x02030405));
+        if pac::FLASH.pecr().read().pelock() {
+            pac::FLASH.pekeyr().write(|w| w.set_pekeyr(0x89ABCDEF));
+            pac::FLASH.pekeyr().write(|w| w.set_pekeyr(0x02030405));
+        }
 
-        pac::FLASH.prgkeyr().write(|w| w.set_prgkeyr(0x8C9DAEBF));
-        pac::FLASH.prgkeyr().write(|w| w.set_prgkeyr(0x13141516));
+        if pac::FLASH.pecr().read().prglock() {
+            pac::FLASH.prgkeyr().write(|w| w.set_prgkeyr(0x8C9DAEBF));
+            pac::FLASH.prgkeyr().write(|w| w.set_prgkeyr(0x13141516));
+        }
     }
 }
 

embassy-stm32/src/fmc.rs

@@ -19,8 +19,7 @@ where
     const REGISTERS: *const () = T::REGS.as_ptr() as *const _;
 
     fn enable(&mut self) {
-        <T as crate::rcc::sealed::RccPeripheral>::enable();
-        <T as crate::rcc::sealed::RccPeripheral>::reset();
+        T::enable_and_reset();
     }
 
     fn memory_controller_enable(&mut self) {

embassy-stm32/src/gpio.rs

@@ -1,6 +1,7 @@
 #![macro_use]
 use core::convert::Infallible;
 
+use critical_section::CriticalSection;
 use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef};
 
 use crate::pac::gpio::{self, vals};
@@ -757,9 +758,9 @@ foreach_pin!(
     };
 );
 
-pub(crate) unsafe fn init() {
+pub(crate) unsafe fn init(_cs: CriticalSection) {
     #[cfg(afio)]
-    <crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::enable();
+    <crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::enable_and_reset_with_cs(_cs);
 
     crate::_generated::init_gpio();
 }
@@ -974,6 +975,18 @@ mod eh1 {
         type Error = Infallible;
     }
 
+    impl<'d, T: Pin> InputPin for OutputOpenDrain<'d, T> {
+        #[inline]
+        fn is_high(&self) -> Result<bool, Self::Error> {
+            Ok(self.is_high())
+        }
+
+        #[inline]
+        fn is_low(&self) -> Result<bool, Self::Error> {
+            Ok(self.is_low())
+        }
+    }
+
     impl<'d, T: Pin> OutputPin for OutputOpenDrain<'d, T> {
         #[inline]
         fn set_high(&mut self) -> Result<(), Self::Error> {

embassy-stm32/src/hrtim/mod.rs

@@ -157,8 +157,7 @@ impl<'d, T: Instance> AdvancedPwm<'d, T> {
     fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self {
         into_ref!(tim);
 
-        T::enable();
-        <T as crate::rcc::sealed::RccPeripheral>::reset();
+        T::enable_and_reset();
 
         #[cfg(stm32f334)]
         if unsafe { get_freqs() }.hrtim.is_some() {

embassy-stm32/src/i2c/mod.rs

@@ -7,14 +7,9 @@ use crate::interrupt;
 mod _version;
 pub use _version::*;
 
-#[cfg(feature = "time")]
-mod timeout;
-#[cfg(feature = "time")]
-pub use timeout::*;
-
 use crate::peripherals;
 
-#[derive(Debug)]
+#[derive(Debug, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Error {
     Bus,

embassy-stm32/src/i2c/timeout.rs

@@ -1,209 +0,0 @@
-use embassy_time::{Duration, Instant};
-
-use super::{Error, I2c, Instance};
-
-/// An I2C wrapper, which provides `embassy-time` based timeouts for all `embedded-hal` trait methods.
-///
-/// This is useful for recovering from a shorted bus or a device stuck in a clock stretching state.
-/// A regular [I2c] would freeze until condition is removed.
-pub struct TimeoutI2c<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> {
-    i2c: &'a mut I2c<'d, T, TXDMA, RXDMA>,
-    timeout: Duration,
-}
-
-fn timeout_fn(timeout: Duration) -> impl Fn() -> Result<(), Error> {
-    let deadline = Instant::now() + timeout;
-    move || {
-        if Instant::now() > deadline {
-            Err(Error::Timeout)
-        } else {
-            Ok(())
-        }
-    }
-}
-
-impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
-    pub fn new(i2c: &'a mut I2c<'d, T, TXDMA, RXDMA>, timeout: Duration) -> Self {
-        Self { i2c, timeout }
-    }
-
-    // =========================
-    //  Async public API
-
-    #[cfg(i2c_v2)]
-    pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
-    where
-        TXDMA: crate::i2c::TxDma<T>,
-    {
-        self.write_timeout(address, write, self.timeout).await
-    }
-
-    #[cfg(i2c_v2)]
-    pub async fn write_timeout(&mut self, address: u8, write: &[u8], timeout: Duration) -> Result<(), Error>
-    where
-        TXDMA: crate::i2c::TxDma<T>,
-    {
-        self.i2c.write_timeout(address, write, timeout_fn(timeout)).await
-    }
-
-    #[cfg(i2c_v2)]
-    pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
-    where
-        TXDMA: crate::i2c::TxDma<T>,
-    {
-        self.write_vectored_timeout(address, write, self.timeout).await
-    }
-
-    #[cfg(i2c_v2)]
-    pub async fn write_vectored_timeout(&mut self, address: u8, write: &[&[u8]], timeout: Duration) -> Result<(), Error>
-    where
-        TXDMA: crate::i2c::TxDma<T>,
-    {
-        self.i2c
-            .write_vectored_timeout(address, write, timeout_fn(timeout))
-            .await
-    }
-
-    #[cfg(i2c_v2)]
-    pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
-    where
-        RXDMA: crate::i2c::RxDma<T>,
-    {
-        self.read_timeout(address, buffer, self.timeout).await
-    }
-
-    #[cfg(i2c_v2)]
-    pub async fn read_timeout(&mut self, address: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error>
-    where
-        RXDMA: crate::i2c::RxDma<T>,
-    {
-        self.i2c.read_timeout(address, buffer, timeout_fn(timeout)).await
-    }
-
-    #[cfg(i2c_v2)]
-    pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
-    where
-        TXDMA: super::TxDma<T>,
-        RXDMA: super::RxDma<T>,
-    {
-        self.write_read_timeout(address, write, read, self.timeout).await
-    }
-
-    #[cfg(i2c_v2)]
-    pub async fn write_read_timeout(
-        &mut self,
-        address: u8,
-        write: &[u8],
-        read: &mut [u8],
-        timeout: Duration,
-    ) -> Result<(), Error>
-    where
-        TXDMA: super::TxDma<T>,
-        RXDMA: super::RxDma<T>,
-    {
-        self.i2c
-            .write_read_timeout(address, write, read, timeout_fn(timeout))
-            .await
-    }
-
-    // =========================
-    //  Blocking public API
-
-    /// Blocking read with a custom timeout
-    pub fn blocking_read_timeout(&mut self, addr: u8, read: &mut [u8], timeout: Duration) -> Result<(), Error> {
-        self.i2c.blocking_read_timeout(addr, read, timeout_fn(timeout))
-    }
-
-    /// Blocking read with default timeout, provided in [`TimeoutI2c::new()`]
-    pub fn blocking_read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Error> {
-        self.blocking_read_timeout(addr, read, self.timeout)
-    }
-
-    /// Blocking write with a custom timeout
-    pub fn blocking_write_timeout(&mut self, addr: u8, write: &[u8], timeout: Duration) -> Result<(), Error> {
-        self.i2c.blocking_write_timeout(addr, write, timeout_fn(timeout))
-    }
-
-    /// Blocking write with default timeout, provided in [`TimeoutI2c::new()`]
-    pub fn blocking_write(&mut self, addr: u8, write: &[u8]) -> Result<(), Error> {
-        self.blocking_write_timeout(addr, write, self.timeout)
-    }
-
-    /// Blocking write-read with a custom timeout
-    pub fn blocking_write_read_timeout(
-        &mut self,
-        addr: u8,
-        write: &[u8],
-        read: &mut [u8],
-        timeout: Duration,
-    ) -> Result<(), Error> {
-        self.i2c
-            .blocking_write_read_timeout(addr, write, read, timeout_fn(timeout))
-    }
-
-    /// Blocking write-read with default timeout, provided in [`TimeoutI2c::new()`]
-    pub fn blocking_write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
-        self.blocking_write_read_timeout(addr, write, read, self.timeout)
-    }
-}
-
-impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Read
-    for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
-{
-    type Error = Error;
-
-    fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_read(addr, read)
-    }
-}
-
-impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Write
-    for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
-{
-    type Error = Error;
-
-    fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
-        self.blocking_write(addr, write)
-    }
-}
-
-impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::WriteRead
-    for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA>
-{
-    type Error = Error;
-
-    fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_write_read(addr, write, read)
-    }
-}
-
-#[cfg(feature = "unstable-traits")]
-mod eh1 {
-    use super::*;
-
-    impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::ErrorType for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
-        type Error = Error;
-    }
-
-    impl<'a, 'd: 'a, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::I2c for TimeoutI2c<'a, 'd, T, TXDMA, RXDMA> {
-        fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_read(address, read)
-        }
-
-        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.blocking_write(address, write)
-        }
-
-        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_write_read(address, write, read)
-        }
-
-        fn transaction(
-            &mut self,
-            _address: u8,
-            _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
-        ) -> Result<(), Self::Error> {
-            todo!();
-        }
-    }
-}

embassy-stm32/src/i2c/v1.rs

@@ -56,8 +56,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     ) -> Self {
         into_ref!(scl, sda, tx_dma, rx_dma);
 
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         scl.set_as_af_pull(
             scl.af_num(),

embassy-stm32/src/i2c/v2.rs

@@ -1,14 +1,21 @@
 use core::cmp;
+#[cfg(feature = "time")]
 use core::future::poll_fn;
 use core::marker::PhantomData;
+#[cfg(feature = "time")]
 use core::task::Poll;
 
 use embassy_embedded_hal::SetConfig;
+#[cfg(feature = "time")]
 use embassy_hal_internal::drop::OnDrop;
 use embassy_hal_internal::{into_ref, PeripheralRef};
 use embassy_sync::waitqueue::AtomicWaker;
+#[cfg(feature = "time")]
+use embassy_time::{Duration, Instant};
 
-use crate::dma::{NoDma, Transfer};
+use crate::dma::NoDma;
+#[cfg(feature = "time")]
+use crate::dma::Transfer;
 use crate::gpio::sealed::AFType;
 use crate::gpio::Pull;
 use crate::i2c::{Error, Instance, SclPin, SdaPin};
@@ -43,6 +50,8 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 pub struct Config {
     pub sda_pullup: bool,
     pub scl_pullup: bool,
+    #[cfg(feature = "time")]
+    pub transaction_timeout: Duration,
 }
 
 impl Default for Config {
@@ -50,6 +59,8 @@ impl Default for Config {
         Self {
             sda_pullup: false,
             scl_pullup: false,
+            #[cfg(feature = "time")]
+            transaction_timeout: Duration::from_millis(100),
         }
     }
 }
@@ -68,9 +79,12 @@ impl State {
 
 pub struct I2c<'d, T: Instance, TXDMA = NoDma, RXDMA = NoDma> {
     _peri: PeripheralRef<'d, T>,
+    #[allow(dead_code)]
     tx_dma: PeripheralRef<'d, TXDMA>,
     #[allow(dead_code)]
     rx_dma: PeripheralRef<'d, RXDMA>,
+    #[cfg(feature = "time")]
+    timeout: Duration,
 }
 
 impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
@@ -86,8 +100,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     ) -> Self {
         into_ref!(peri, scl, sda, tx_dma, rx_dma);
 
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         scl.set_as_af_pull(
             scl.af_num(),
@@ -132,6 +145,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
             _peri: peri,
             tx_dma,
             rx_dma,
+            #[cfg(feature = "time")]
+            timeout: config.transaction_timeout,
         }
     }
 
@@ -422,6 +437,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         result
     }
 
+    #[cfg(feature = "time")]
     async fn write_dma_internal(
         &mut self,
         address: u8,
@@ -512,6 +528,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         Ok(())
     }
 
+    #[cfg(feature = "time")]
     async fn read_dma_internal(
         &mut self,
         address: u8,
@@ -594,42 +611,41 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     // =========================
     //  Async public API
 
+    #[cfg(feature = "time")]
     pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
     where
         TXDMA: crate::i2c::TxDma<T>,
     {
-        self.write_timeout(address, write, || Ok(())).await
+        self.write_timeout(address, write, self.timeout).await
     }
 
-    pub async fn write_timeout(
-        &mut self,
-        address: u8,
-        write: &[u8],
-        check_timeout: impl Fn() -> Result<(), Error>,
-    ) -> Result<(), Error>
+    #[cfg(feature = "time")]
+    pub async fn write_timeout(&mut self, address: u8, write: &[u8], timeout: Duration) -> Result<(), Error>
     where
         TXDMA: crate::i2c::TxDma<T>,
     {
         if write.is_empty() {
-            self.write_internal(address, write, true, check_timeout)
+            self.write_internal(address, write, true, timeout_fn(timeout))
         } else {
-            self.write_dma_internal(address, write, true, true, check_timeout).await
+            embassy_time::with_timeout(
+                timeout,
+                self.write_dma_internal(address, write, true, true, timeout_fn(timeout)),
+            )
+            .await
+            .unwrap_or(Err(Error::Timeout))
         }
     }
 
+    #[cfg(feature = "time")]
     pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
     where
         TXDMA: crate::i2c::TxDma<T>,
     {
-        self.write_vectored_timeout(address, write, || Ok(())).await
+        self.write_vectored_timeout(address, write, self.timeout).await
     }
 
-    pub async fn write_vectored_timeout(
-        &mut self,
-        address: u8,
-        write: &[&[u8]],
-        check_timeout: impl Fn() -> Result<(), Error>,
-    ) -> Result<(), Error>
+    #[cfg(feature = "time")]
+    pub async fn write_vectored_timeout(&mut self, address: u8, write: &[&[u8]], timeout: Duration) -> Result<(), Error>
     where
         TXDMA: crate::i2c::TxDma<T>,
     {
@@ -644,67 +660,88 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
             let next = iter.next();
             let is_last = next.is_none();
 
-            self.write_dma_internal(address, c, first, is_last, || check_timeout())
-                .await?;
+            embassy_time::with_timeout(
+                timeout,
+                self.write_dma_internal(address, c, first, is_last, timeout_fn(timeout)),
+            )
+            .await
+            .unwrap_or(Err(Error::Timeout))?;
             first = false;
             current = next;
         }
         Ok(())
     }
 
+    #[cfg(feature = "time")]
     pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
     where
         RXDMA: crate::i2c::RxDma<T>,
     {
-        self.read_timeout(address, buffer, || Ok(())).await
+        self.read_timeout(address, buffer, self.timeout).await
     }
 
-    pub async fn read_timeout(
-        &mut self,
-        address: u8,
-        buffer: &mut [u8],
-        check_timeout: impl Fn() -> Result<(), Error>,
-    ) -> Result<(), Error>
+    #[cfg(feature = "time")]
+    pub async fn read_timeout(&mut self, address: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error>
     where
         RXDMA: crate::i2c::RxDma<T>,
     {
         if buffer.is_empty() {
-            self.read_internal(address, buffer, false, check_timeout)
+            self.read_internal(address, buffer, false, timeout_fn(timeout))
         } else {
-            self.read_dma_internal(address, buffer, false, check_timeout).await
+            embassy_time::with_timeout(
+                timeout,
+                self.read_dma_internal(address, buffer, false, timeout_fn(timeout)),
+            )
+            .await
+            .unwrap_or(Err(Error::Timeout))
         }
     }
 
+    #[cfg(feature = "time")]
     pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
     where
         TXDMA: super::TxDma<T>,
         RXDMA: super::RxDma<T>,
     {
-        self.write_read_timeout(address, write, read, || Ok(())).await
+        self.write_read_timeout(address, write, read, self.timeout).await
     }
 
+    #[cfg(feature = "time")]
     pub async fn write_read_timeout(
         &mut self,
         address: u8,
         write: &[u8],
         read: &mut [u8],
-        check_timeout: impl Fn() -> Result<(), Error>,
+        timeout: Duration,
     ) -> Result<(), Error>
     where
         TXDMA: super::TxDma<T>,
         RXDMA: super::RxDma<T>,
     {
+        let start_instant = Instant::now();
+        let check_timeout = timeout_fn(timeout);
         if write.is_empty() {
-            self.write_internal(address, write, false, || check_timeout())?;
+            self.write_internal(address, write, false, &check_timeout)?;
         } else {
-            self.write_dma_internal(address, write, true, true, || check_timeout())
-                .await?;
+            embassy_time::with_timeout(
+                timeout,
+                self.write_dma_internal(address, write, true, true, &check_timeout),
+            )
+            .await
+            .unwrap_or(Err(Error::Timeout))?;
         }
 
+        let time_left_until_timeout = timeout - Instant::now().duration_since(start_instant);
+
         if read.is_empty() {
-            self.read_internal(address, read, true, check_timeout)?;
+            self.read_internal(address, read, true, &check_timeout)?;
         } else {
-            self.read_dma_internal(address, read, true, check_timeout).await?;
+            embassy_time::with_timeout(
+                time_left_until_timeout,
+                self.read_dma_internal(address, read, true, &check_timeout),
+            )
+            .await
+            .unwrap_or(Err(Error::Timeout))?;
         }
 
         Ok(())
@@ -713,33 +750,73 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     // =========================
     //  Blocking public API
 
+    #[cfg(feature = "time")]
+    pub fn blocking_read_timeout(&mut self, address: u8, read: &mut [u8], timeout: Duration) -> Result<(), Error> {
+        self.read_internal(address, read, false, timeout_fn(timeout))
+        // Automatic Stop
+    }
+
+    #[cfg(not(feature = "time"))]
     pub fn blocking_read_timeout(
         &mut self,
         address: u8,
         read: &mut [u8],
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        self.read_internal(address, read, false, &check_timeout)
+        self.read_internal(address, read, false, check_timeout)
         // Automatic Stop
     }
 
+    #[cfg(feature = "time")]
+    pub fn blocking_read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Error> {
+        self.blocking_read_timeout(address, read, self.timeout)
+    }
+
+    #[cfg(not(feature = "time"))]
     pub fn blocking_read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Error> {
         self.blocking_read_timeout(address, read, || Ok(()))
     }
 
+    #[cfg(feature = "time")]
+    pub fn blocking_write_timeout(&mut self, address: u8, write: &[u8], timeout: Duration) -> Result<(), Error> {
+        self.write_internal(address, write, true, timeout_fn(timeout))
+    }
+
+    #[cfg(not(feature = "time"))]
     pub fn blocking_write_timeout(
         &mut self,
         address: u8,
         write: &[u8],
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        self.write_internal(address, write, true, &check_timeout)
+        self.write_internal(address, write, true, check_timeout)
     }
 
+    #[cfg(feature = "time")]
+    pub fn blocking_write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> {
+        self.blocking_write_timeout(address, write, self.timeout)
+    }
+
+    #[cfg(not(feature = "time"))]
     pub fn blocking_write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> {
         self.blocking_write_timeout(address, write, || Ok(()))
     }
 
+    #[cfg(feature = "time")]
+    pub fn blocking_write_read_timeout(
+        &mut self,
+        address: u8,
+        write: &[u8],
+        read: &mut [u8],
+        timeout: Duration,
+    ) -> Result<(), Error> {
+        let check_timeout = timeout_fn(timeout);
+        self.write_internal(address, write, false, &check_timeout)?;
+        self.read_internal(address, read, true, &check_timeout)
+        // Automatic Stop
+    }
+
+    #[cfg(not(feature = "time"))]
     pub fn blocking_write_read_timeout(
         &mut self,
         address: u8,
@@ -752,11 +829,17 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         // Automatic Stop
     }
 
+    #[cfg(feature = "time")]
+    pub fn blocking_write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
+        self.blocking_write_read_timeout(address, write, read, self.timeout)
+    }
+
+    #[cfg(not(feature = "time"))]
     pub fn blocking_write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
         self.blocking_write_read_timeout(address, write, read, || Ok(()))
     }
 
-    pub fn blocking_write_vectored_timeout(
+    fn blocking_write_vectored_with_timeout(
         &mut self,
         address: u8,
         write: &[&[u8]],
@@ -765,6 +848,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         if write.is_empty() {
             return Err(Error::ZeroLengthTransfer);
         }
+
         let first_length = write[0].len();
         let last_slice_index = write.len() - 1;
 
@@ -833,6 +917,33 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         result
     }
 
+    #[cfg(feature = "time")]
+    pub fn blocking_write_vectored_timeout(
+        &mut self,
+        address: u8,
+        write: &[&[u8]],
+        timeout: Duration,
+    ) -> Result<(), Error> {
+        let check_timeout = timeout_fn(timeout);
+        self.blocking_write_vectored_with_timeout(address, write, check_timeout)
+    }
+
+    #[cfg(not(feature = "time"))]
+    pub fn blocking_write_vectored_timeout(
+        &mut self,
+        address: u8,
+        write: &[&[u8]],
+        check_timeout: impl Fn() -> Result<(), Error>,
+    ) -> Result<(), Error> {
+        self.blocking_write_vectored_with_timeout(address, write, check_timeout)
+    }
+
+    #[cfg(feature = "time")]
+    pub fn blocking_write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error> {
+        self.blocking_write_vectored_timeout(address, write, self.timeout)
+    }
+
+    #[cfg(not(feature = "time"))]
     pub fn blocking_write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error> {
         self.blocking_write_vectored_timeout(address, write, || Ok(()))
     }
@@ -844,6 +955,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> {
     }
 }
 
+#[cfg(feature = "time")]
 mod eh02 {
     use super::*;
 
@@ -1043,7 +1155,7 @@ mod eh1 {
     }
 }
 
-#[cfg(all(feature = "unstable-traits", feature = "nightly"))]
+#[cfg(all(feature = "unstable-traits", feature = "nightly", feature = "time"))]
 mod eha {
     use super::super::{RxDma, TxDma};
     use super::*;
@@ -1089,3 +1201,15 @@ impl<'d, T: Instance> SetConfig for I2c<'d, T> {
         Ok(())
     }
 }
+
+#[cfg(feature = "time")]
+fn timeout_fn(timeout: Duration) -> impl Fn() -> Result<(), Error> {
+    let deadline = Instant::now() + timeout;
+    move || {
+        if Instant::now() > deadline {
+            Err(Error::Timeout)
+        } else {
+            Ok(())
+        }
+    }
+}

embassy-stm32/src/i2s.rs

@@ -170,7 +170,7 @@ impl<'d, T: Instance, Tx, Rx> I2S<'d, T, Tx, Rx> {
         let spi = Spi::new_internal(peri, txdma, rxdma, spi_cfg);
 
         #[cfg(all(rcc_f4, not(stm32f410)))]
-        let pclk = unsafe { get_freqs() }.plli2s.unwrap();
+        let pclk = unsafe { get_freqs() }.plli2s1_q.unwrap();
 
         #[cfg(stm32f410)]
         let pclk = T::frequency();

embassy-stm32/src/ipcc.rs

@@ -93,8 +93,7 @@ pub struct Ipcc;
 
 impl Ipcc {
     pub fn enable(_config: Config) {
-        IPCC::enable();
-        IPCC::reset();
+        IPCC::enable_and_reset();
         IPCC::set_cpu2(true);
 
         _configure_pwr();

embassy-stm32/src/lib.rs

@@ -155,79 +155,82 @@ impl Default for Config {
 
 /// Initialize embassy.
 pub fn init(config: Config) -> Peripherals {
-    let p = Peripherals::take();
+    critical_section::with(|cs| {
+        let p = Peripherals::take_with_cs(cs);
 
-    #[cfg(dbgmcu)]
-    if config.enable_debug_during_sleep {
-        crate::pac::DBGMCU.cr().modify(|cr| {
-            #[cfg(any(dbgmcu_f0, dbgmcu_c0, dbgmcu_g0, dbgmcu_u5, dbgmcu_wba))]
-            {
-                cr.set_dbg_stop(true);
-                cr.set_dbg_standby(true);
-            }
-            #[cfg(any(
-                dbgmcu_f1, dbgmcu_f2, dbgmcu_f3, dbgmcu_f4, dbgmcu_f7, dbgmcu_g4, dbgmcu_f7, dbgmcu_l0, dbgmcu_l1,
-                dbgmcu_l4, dbgmcu_wb, dbgmcu_wl
-            ))]
-            {
-                cr.set_dbg_sleep(true);
-                cr.set_dbg_stop(true);
-                cr.set_dbg_standby(true);
-            }
-            #[cfg(dbgmcu_h7)]
-            {
-                cr.set_d1dbgcken(true);
-                cr.set_d3dbgcken(true);
-                cr.set_dbgsleep_d1(true);
-                cr.set_dbgstby_d1(true);
-                cr.set_dbgstop_d1(true);
-            }
-        });
-    }
-
-    #[cfg(not(any(stm32f1, stm32wb, stm32wl)))]
-    peripherals::SYSCFG::enable();
-    #[cfg(not(any(stm32h5, stm32h7, stm32wb, stm32wl)))]
-    peripherals::PWR::enable();
-    #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))]
-    peripherals::FLASH::enable();
-
-    unsafe {
-        #[cfg(feature = "_split-pins-enabled")]
-        crate::pac::SYSCFG.pmcr().modify(|pmcr| {
-            #[cfg(feature = "split-pa0")]
-            pmcr.set_pa0so(true);
-            #[cfg(feature = "split-pa1")]
-            pmcr.set_pa1so(true);
-            #[cfg(feature = "split-pc2")]
-            pmcr.set_pc2so(true);
-            #[cfg(feature = "split-pc3")]
-            pmcr.set_pc3so(true);
-        });
-
-        gpio::init();
-        dma::init(
-            #[cfg(bdma)]
-            config.bdma_interrupt_priority,
-            #[cfg(dma)]
-            config.dma_interrupt_priority,
-            #[cfg(gpdma)]
-            config.gpdma_interrupt_priority,
-        );
-        #[cfg(feature = "exti")]
-        exti::init();
-
-        rcc::init(config.rcc);
-
-        // must be after rcc init
-        #[cfg(feature = "_time-driver")]
-        time_driver::init();
-
-        #[cfg(feature = "low-power")]
-        while !crate::rcc::low_power_ready() {
-            crate::rcc::clock_refcount_sub();
+        #[cfg(dbgmcu)]
+        if config.enable_debug_during_sleep {
+            crate::pac::DBGMCU.cr().modify(|cr| {
+                #[cfg(any(dbgmcu_f0, dbgmcu_c0, dbgmcu_g0, dbgmcu_u5, dbgmcu_wba))]
+                {
+                    cr.set_dbg_stop(true);
+                    cr.set_dbg_standby(true);
+                }
+                #[cfg(any(
+                    dbgmcu_f1, dbgmcu_f2, dbgmcu_f3, dbgmcu_f4, dbgmcu_f7, dbgmcu_g4, dbgmcu_f7, dbgmcu_l0, dbgmcu_l1,
+                    dbgmcu_l4, dbgmcu_wb, dbgmcu_wl
+                ))]
+                {
+                    cr.set_dbg_sleep(true);
+                    cr.set_dbg_stop(true);
+                    cr.set_dbg_standby(true);
+                }
+                #[cfg(dbgmcu_h7)]
+                {
+                    cr.set_d1dbgcken(true);
+                    cr.set_d3dbgcken(true);
+                    cr.set_dbgsleep_d1(true);
+                    cr.set_dbgstby_d1(true);
+                    cr.set_dbgstop_d1(true);
+                }
+            });
         }
-    }
 
-    p
+        #[cfg(not(any(stm32f1, stm32wb, stm32wl)))]
+        peripherals::SYSCFG::enable_and_reset_with_cs(cs);
+        #[cfg(not(any(stm32h5, stm32h7, stm32wb, stm32wl)))]
+        peripherals::PWR::enable_and_reset_with_cs(cs);
+        #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))]
+        peripherals::FLASH::enable_and_reset_with_cs(cs);
+
+        unsafe {
+            #[cfg(feature = "_split-pins-enabled")]
+            crate::pac::SYSCFG.pmcr().modify(|pmcr| {
+                #[cfg(feature = "split-pa0")]
+                pmcr.set_pa0so(true);
+                #[cfg(feature = "split-pa1")]
+                pmcr.set_pa1so(true);
+                #[cfg(feature = "split-pc2")]
+                pmcr.set_pc2so(true);
+                #[cfg(feature = "split-pc3")]
+                pmcr.set_pc3so(true);
+            });
+
+            gpio::init(cs);
+            dma::init(
+                cs,
+                #[cfg(bdma)]
+                config.bdma_interrupt_priority,
+                #[cfg(dma)]
+                config.dma_interrupt_priority,
+                #[cfg(gpdma)]
+                config.gpdma_interrupt_priority,
+            );
+            #[cfg(feature = "exti")]
+            exti::init(cs);
+
+            rcc::init(config.rcc);
+
+            // must be after rcc init
+            #[cfg(feature = "_time-driver")]
+            time_driver::init(cs);
+
+            #[cfg(feature = "low-power")]
+            while !crate::rcc::low_power_ready() {
+                crate::rcc::clock_refcount_sub(cs);
+            }
+        }
+
+        p
+    })
 }

embassy-stm32/src/low_power.rs

@@ -1,7 +1,7 @@
 use core::arch::asm;
 use core::marker::PhantomData;
+use core::sync::atomic::{compiler_fence, Ordering};
 
-use atomic_polyfill::{compiler_fence, Ordering};
 use cortex_m::peripheral::SCB;
 use embassy_executor::*;
 

embassy-stm32/src/opamp.rs

@@ -4,7 +4,15 @@ use embassy_hal_internal::{into_ref, PeripheralRef};
 
 use crate::Peripheral;
 
-#[cfg(opamp_f3)]
+#[derive(Clone, Copy)]
+pub enum OpAmpGain {
+    Mul1,
+    Mul2,
+    Mul4,
+    Mul8,
+    Mul16,
+}
+
 pub struct OpAmpOutput<'d, 'p, T: Instance, P: NonInvertingPin<T>> {
     _inner: &'d OpAmp<'d, T>,
     _input: &'p mut P,
@@ -35,14 +43,32 @@ impl<'d, T: Instance> OpAmp<'d, T> {
         Self { _inner: opamp }
     }
 
-    #[cfg(opamp_f3)]
-    pub fn buffer_for<'a, 'b, P>(&'a mut self, pin: &'b mut P) -> OpAmpOutput<'a, 'b, T, P>
+    pub fn buffer_for<'a, 'b, P>(&'a mut self, pin: &'b mut P, gain: OpAmpGain) -> OpAmpOutput<'a, 'b, T, P>
     where
         P: NonInvertingPin<T>,
     {
+        let (vm_sel, pga_gain) = match gain {
+            OpAmpGain::Mul1 => (0b11, 0b00),
+            OpAmpGain::Mul2 => (0b10, 0b00),
+            OpAmpGain::Mul4 => (0b10, 0b01),
+            OpAmpGain::Mul8 => (0b10, 0b10),
+            OpAmpGain::Mul16 => (0b10, 0b11),
+        };
+
         #[cfg(opamp_f3)]
         T::regs().opampcsr().modify(|w| {
             w.set_vp_sel(pin.channel());
+            w.set_vm_sel(vm_sel);
+            w.set_pga_gain(pga_gain);
+        });
+
+        #[cfg(opamp_g4)]
+        T::regs().opamp_csr().modify(|w| {
+            use crate::pac::opamp::vals::*;
+
+            w.set_vp_sel(OpampCsrVpSel::from_bits(pin.channel()));
+            w.set_vm_sel(OpampCsrVmSel::from_bits(vm_sel));
+            w.set_pga_gain(OpampCsrPgaGain::from_bits(pga_gain));
         });
 
         OpAmpOutput {

embassy-stm32/src/qspi/mod.rs

@@ -177,8 +177,7 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> {
     ) -> Self {
         into_ref!(peri, dma);
 
-        T::enable();
-        T::reset();
+        T::enable_and_reset();
 
         while T::REGS.sr().read().busy() {}
 

embassy-stm32/src/rcc/bd.rs

@@ -1,110 +1,161 @@
+use core::sync::atomic::{compiler_fence, Ordering};
+
+use crate::pac::common::{Reg, RW};
+pub use crate::pac::rcc::vals::Rtcsel as RtcClockSource;
+use crate::time::Hertz;
+
+#[cfg(any(stm32f0, stm32f1, stm32f3))]
+pub const LSI_FREQ: Hertz = Hertz(40_000);
+#[cfg(not(any(stm32f0, stm32f1, stm32f3)))]
+pub const LSI_FREQ: Hertz = Hertz(32_000);
+
+#[allow(dead_code)]
+#[derive(Clone, Copy)]
+pub enum LseMode {
+    Oscillator(LseDrive),
+    Bypass,
+}
+
+pub struct LseConfig {
+    pub frequency: Hertz,
+    pub mode: LseMode,
+}
+
 #[allow(dead_code)]
 #[derive(Default, Clone, Copy)]
 pub enum LseDrive {
-    #[cfg(any(rtc_v2f7, rtc_v2l4))]
     Low = 0,
     MediumLow = 0x01,
     #[default]
     MediumHigh = 0x02,
-    #[cfg(any(rtc_v2f7, rtc_v2l4))]
     High = 0x03,
 }
 
-#[cfg(any(rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l4))]
+// All families but these have the LSEDRV register
+#[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f400, rcc_f410, rcc_l1)))]
 impl From<LseDrive> for crate::pac::rcc::vals::Lsedrv {
     fn from(value: LseDrive) -> Self {
         use crate::pac::rcc::vals::Lsedrv;
 
         match value {
-            #[cfg(any(rtc_v2f7, rtc_v2l4))]
             LseDrive::Low => Lsedrv::LOW,
             LseDrive::MediumLow => Lsedrv::MEDIUMLOW,
             LseDrive::MediumHigh => Lsedrv::MEDIUMHIGH,
-            #[cfg(any(rtc_v2f7, rtc_v2l4))]
             LseDrive::High => Lsedrv::HIGH,
         }
     }
 }
 
-pub use crate::pac::rcc::vals::Rtcsel as RtcClockSource;
-
 #[cfg(not(any(rtc_v2l0, rtc_v2l1, stm32c0)))]
-#[allow(dead_code)]
 type Bdcr = crate::pac::rcc::regs::Bdcr;
-
 #[cfg(any(rtc_v2l0, rtc_v2l1))]
-#[allow(dead_code)]
 type Bdcr = crate::pac::rcc::regs::Csr;
+#[cfg(any(stm32c0))]
+type Bdcr = crate::pac::rcc::regs::Csr1;
 
-#[allow(dead_code)]
-pub struct BackupDomain {}
+#[cfg(any(stm32c0))]
+fn unlock() {}
 
-impl BackupDomain {
-    #[cfg(any(
-        rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
-        rtc_v3u5
-    ))]
-    #[allow(dead_code, unused_variables)]
-    fn modify<R>(f: impl FnOnce(&mut Bdcr) -> R) -> R {
-        #[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1, rtc_v2l0))]
-        let cr = crate::pac::PWR.cr();
-        #[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))]
-        let cr = crate::pac::PWR.cr1();
+#[cfg(not(any(stm32c0)))]
+fn unlock() {
+    #[cfg(any(stm32f0, stm32f1, stm32f2, stm32f3, stm32l0, stm32l1))]
+    let cr = crate::pac::PWR.cr();
+    #[cfg(not(any(stm32f0, stm32f1, stm32f2, stm32f3, stm32l0, stm32l1, stm32u5, stm32h5, stm32wba)))]
+    let cr = crate::pac::PWR.cr1();
+    #[cfg(any(stm32u5, stm32h5, stm32wba))]
+    let cr = crate::pac::PWR.dbpcr();
 
-        // TODO: Missing from PAC for l0 and f0?
-        #[cfg(not(any(rtc_v2f0, rtc_v3u5)))]
-        {
-            cr.modify(|w| w.set_dbp(true));
-            while !cr.read().dbp() {}
+    cr.modify(|w| w.set_dbp(true));
+    while !cr.read().dbp() {}
+}
+
+fn bdcr() -> Reg<Bdcr, RW> {
+    #[cfg(any(rtc_v2l0, rtc_v2l1))]
+    return crate::pac::RCC.csr();
+    #[cfg(not(any(rtc_v2l0, rtc_v2l1, stm32c0)))]
+    return crate::pac::RCC.bdcr();
+    #[cfg(any(stm32c0))]
+    return crate::pac::RCC.csr1();
+}
+
+pub struct LsConfig {
+    pub rtc: RtcClockSource,
+    pub lsi: bool,
+    pub lse: Option<LseConfig>,
+}
+
+impl LsConfig {
+    pub const fn default_lse() -> Self {
+        Self {
+            rtc: RtcClockSource::LSE,
+            lse: Some(LseConfig {
+                frequency: Hertz(32_768),
+                mode: LseMode::Oscillator(LseDrive::MediumHigh),
+            }),
+            lsi: false,
         }
-
-        #[cfg(any(rtc_v2l0, rtc_v2l1))]
-        let cr = crate::pac::RCC.csr();
-
-        #[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
-        let cr = crate::pac::RCC.bdcr();
-
-        cr.modify(|w| f(w))
     }
 
-    #[cfg(any(
-        rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
-        rtc_v3u5
-    ))]
-    #[allow(dead_code)]
-    fn read() -> Bdcr {
-        #[cfg(any(rtc_v2l0, rtc_v2l1))]
-        let r = crate::pac::RCC.csr().read();
-
-        #[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
-        let r = crate::pac::RCC.bdcr().read();
-
-        r
+    pub const fn default_lsi() -> Self {
+        Self {
+            rtc: RtcClockSource::LSI,
+            lsi: true,
+            lse: None,
+        }
     }
 
-    #[cfg(any(
-        rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
-        rtc_v3u5
-    ))]
-    #[allow(dead_code, unused_variables)]
-    pub fn configure_ls(clock_source: RtcClockSource, lsi: bool, lse: Option<LseDrive>) {
-        use atomic_polyfill::{compiler_fence, Ordering};
+    pub const fn off() -> Self {
+        Self {
+            rtc: RtcClockSource::DISABLE,
+            lsi: false,
+            lse: None,
+        }
+    }
+}
 
-        match clock_source {
-            RtcClockSource::LSI => assert!(lsi),
-            RtcClockSource::LSE => assert!(&lse.is_some()),
-            _ => {}
+impl Default for LsConfig {
+    fn default() -> Self {
+        // on L5, just the fact that LSI is enabled makes things crash.
+        // TODO: investigate.
+
+        #[cfg(not(stm32l5))]
+        return Self::default_lsi();
+        #[cfg(stm32l5)]
+        return Self::off();
+    }
+}
+
+impl LsConfig {
+    pub(crate) fn init(&self) -> Option<Hertz> {
+        let rtc_clk = match self.rtc {
+            RtcClockSource::LSI => {
+                assert!(self.lsi);
+                Some(LSI_FREQ)
+            }
+            RtcClockSource::LSE => Some(self.lse.as_ref().unwrap().frequency),
+            RtcClockSource::DISABLE => None,
+            _ => todo!(),
         };
 
-        if lsi {
-            #[cfg(rtc_v3u5)]
+        let (lse_en, lse_byp, lse_drv) = match &self.lse {
+            Some(c) => match c.mode {
+                LseMode::Oscillator(lse_drv) => (true, false, Some(lse_drv)),
+                LseMode::Bypass => (true, true, None),
+            },
+            None => (false, false, None),
+        };
+        _ = lse_drv; // not all chips have it.
+
+        // Disable backup domain write protection
+        unlock();
+
+        if self.lsi {
+            #[cfg(any(stm32u5, stm32h5, stm32wba))]
             let csr = crate::pac::RCC.bdcr();
-
-            #[cfg(not(rtc_v3u5))]
+            #[cfg(not(any(stm32u5, stm32h5, stm32wba, stm32c0)))]
             let csr = crate::pac::RCC.csr();
-
-            // Disable backup domain write protection
-            Self::modify(|_| {});
+            #[cfg(any(stm32c0))]
+            let csr = crate::pac::RCC.csr2();
 
             #[cfg(not(any(rcc_wb, rcc_wba)))]
             csr.modify(|w| w.set_lsion(true));
@@ -124,58 +175,71 @@ impl BackupDomain {
         // first check if the configuration matches what we want.
 
         // check if it's already enabled and in the source we want.
-        let reg = Self::read();
+        let reg = bdcr().read();
         let mut ok = true;
-        ok &= reg.rtcsel() == clock_source;
+        ok &= reg.rtcsel() == self.rtc;
         #[cfg(not(rcc_wba))]
         {
-            ok &= reg.rtcen() == (clock_source != RtcClockSource::NOCLOCK);
+            ok &= reg.rtcen() == (self.rtc != RtcClockSource::DISABLE);
         }
-        ok &= reg.lseon() == lse.is_some();
-        #[cfg(any(rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l4))]
-        if let Some(lse_drive) = lse {
-            ok &= reg.lsedrv() == lse_drive.into();
+        ok &= reg.lseon() == lse_en;
+        ok &= reg.lsebyp() == lse_byp;
+        #[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f400, rcc_f410, rcc_l1)))]
+        if let Some(lse_drv) = lse_drv {
+            ok &= reg.lsedrv() == lse_drv.into();
         }
 
         // if configuration is OK, we're done.
         if ok {
-            // RTC code assumes backup domain is unlocked
-            Self::modify(|w| {});
-
-            trace!("BDCR ok: {:08x}", Self::read().0);
-            return;
+            trace!("BDCR ok: {:08x}", bdcr().read().0);
+            return rtc_clk;
         }
 
         // If not OK, reset backup domain and configure it.
-        #[cfg(not(any(rcc_l0, rcc_l1)))]
+        #[cfg(not(any(rcc_l0, rcc_l0_v2, rcc_l1, stm32h5, stm32c0)))]
         {
-            Self::modify(|w| w.set_bdrst(true));
-            Self::modify(|w| w.set_bdrst(false));
+            bdcr().modify(|w| w.set_bdrst(true));
+            bdcr().modify(|w| w.set_bdrst(false));
+        }
+        #[cfg(any(stm32h5))]
+        {
+            bdcr().modify(|w| w.set_vswrst(true));
+            bdcr().modify(|w| w.set_vswrst(false));
+        }
+        #[cfg(any(stm32c0))]
+        {
+            bdcr().modify(|w| w.set_rtcrst(true));
+            bdcr().modify(|w| w.set_rtcrst(false));
         }
 
-        if let Some(lse_drive) = lse {
-            Self::modify(|w| {
-                #[cfg(any(rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l4))]
-                w.set_lsedrv(lse_drive.into());
+        if lse_en {
+            bdcr().modify(|w| {
+                #[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f400, rcc_f410, rcc_l1)))]
+                if let Some(lse_drv) = lse_drv {
+                    w.set_lsedrv(lse_drv.into());
+                }
+                w.set_lsebyp(lse_byp);
                 w.set_lseon(true);
             });
 
-            while !Self::read().lserdy() {}
+            while !bdcr().read().lserdy() {}
         }
 
-        if clock_source != RtcClockSource::NOCLOCK {
-            Self::modify(|w| {
+        if self.rtc != RtcClockSource::DISABLE {
+            bdcr().modify(|w| {
                 #[cfg(any(rtc_v2h7, rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))]
                 assert!(!w.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
 
                 #[cfg(not(rcc_wba))]
                 w.set_rtcen(true);
-                w.set_rtcsel(clock_source);
+                w.set_rtcsel(self.rtc);
             });
         }
 
-        trace!("BDCR configured: {:08x}", Self::read().0);
+        trace!("BDCR configured: {:08x}", bdcr().read().0);
 
         compiler_fence(Ordering::SeqCst);
+
+        rtc_clk
     }
 }

embassy-stm32/src/rcc/bus.rs

@@ -1,56 +0,0 @@
-use core::ops::Div;
-
-#[allow(unused_imports)]
-use crate::pac::rcc;
-pub use crate::pac::rcc::vals::{Hpre as AHBPrescaler, Ppre as APBPrescaler};
-use crate::time::Hertz;
-
-impl Div<AHBPrescaler> for Hertz {
-    type Output = Hertz;
-
-    fn div(self, rhs: AHBPrescaler) -> Self::Output {
-        let divisor = match rhs {
-            AHBPrescaler::DIV1 => 1,
-            AHBPrescaler::DIV2 => 2,
-            #[cfg(any(rcc_wb, rcc_wl5, rcc_wle))]
-            AHBPrescaler::DIV3 => 3,
-            AHBPrescaler::DIV4 => 4,
-            #[cfg(any(rcc_wb, rcc_wl5, rcc_wle))]
-            AHBPrescaler::DIV5 => 5,
-            #[cfg(any(rcc_wb, rcc_wl5, rcc_wle))]
-            AHBPrescaler::DIV6 => 6,
-            AHBPrescaler::DIV8 => 8,
-            #[cfg(any(rcc_wb, rcc_wl5, rcc_wle))]
-            AHBPrescaler::DIV10 => 10,
-            AHBPrescaler::DIV16 => 16,
-            #[cfg(any(rcc_wb, rcc_wl5, rcc_wle))]
-            AHBPrescaler::DIV32 => 32,
-            #[cfg(not(rcc_wba))]
-            AHBPrescaler::DIV64 => 64,
-            #[cfg(not(rcc_wba))]
-            AHBPrescaler::DIV128 => 128,
-            #[cfg(not(rcc_wba))]
-            AHBPrescaler::DIV256 => 256,
-            #[cfg(not(rcc_wba))]
-            AHBPrescaler::DIV512 => 512,
-            _ => unreachable!(),
-        };
-        Hertz(self.0 / divisor)
-    }
-}
-
-impl Div<APBPrescaler> for Hertz {
-    type Output = Hertz;
-
-    fn div(self, rhs: APBPrescaler) -> Self::Output {
-        let divisor = match rhs {
-            APBPrescaler::DIV1 => 1,
-            APBPrescaler::DIV2 => 2,
-            APBPrescaler::DIV4 => 4,
-            APBPrescaler::DIV8 => 8,
-            APBPrescaler::DIV16 => 16,
-            _ => unreachable!(),
-        };
-        Hertz(self.0 / divisor)
-    }
-}

embassy-stm32/src/rcc/c0.rs

@@ -1,6 +1,6 @@
-pub use super::bus::{AHBPrescaler, APBPrescaler};
 use crate::pac::flash::vals::Latency;
-use crate::pac::rcc::vals::{Hsidiv, Ppre, Sw};
+use crate::pac::rcc::vals::Sw;
+pub use crate::pac::rcc::vals::{Hpre as AHBPrescaler, Hsidiv as HSIPrescaler, Ppre as APBPrescaler};
 use crate::pac::{FLASH, RCC};
 use crate::rcc::{set_freqs, Clocks};
 use crate::time::Hertz;
@@ -8,9 +8,6 @@ use crate::time::Hertz;
 /// HSI speed
 pub const HSI_FREQ: Hertz = Hertz(48_000_000);
 
-/// LSI speed
-pub const LSI_FREQ: Hertz = Hertz(32_000);
-
 /// System clock mux source
 #[derive(Clone, Copy)]
 pub enum ClockSrc {
@@ -19,47 +16,22 @@ pub enum ClockSrc {
     LSI,
 }
 
-#[derive(Clone, Copy)]
-pub enum HSIPrescaler {
-    NotDivided,
-    Div2,
-    Div4,
-    Div8,
-    Div16,
-    Div32,
-    Div64,
-    Div128,
-}
-
-impl Into<Hsidiv> for HSIPrescaler {
-    fn into(self) -> Hsidiv {
-        match self {
-            HSIPrescaler::NotDivided => Hsidiv::DIV1,
-            HSIPrescaler::Div2 => Hsidiv::DIV2,
-            HSIPrescaler::Div4 => Hsidiv::DIV4,
-            HSIPrescaler::Div8 => Hsidiv::DIV8,
-            HSIPrescaler::Div16 => Hsidiv::DIV16,
-            HSIPrescaler::Div32 => Hsidiv::DIV32,
-            HSIPrescaler::Div64 => Hsidiv::DIV64,
-            HSIPrescaler::Div128 => Hsidiv::DIV128,
-        }
-    }
-}
-
 /// Clocks configutation
 pub struct Config {
     pub mux: ClockSrc,
     pub ahb_pre: AHBPrescaler,
     pub apb_pre: APBPrescaler,
+    pub ls: super::LsConfig,
 }
 
 impl Default for Config {
     #[inline]
     fn default() -> Config {
         Config {
-            mux: ClockSrc::HSI(HSIPrescaler::NotDivided),
+            mux: ClockSrc::HSI(HSIPrescaler::DIV1),
             ahb_pre: AHBPrescaler::DIV1,
             apb_pre: APBPrescaler::DIV1,
+            ls: Default::default(),
         }
     }
 }
@@ -68,33 +40,34 @@ pub(crate) unsafe fn init(config: Config) {
     let (sys_clk, sw) = match config.mux {
         ClockSrc::HSI(div) => {
             // Enable HSI
-            let div: Hsidiv = div.into();
             RCC.cr().write(|w| {
                 w.set_hsidiv(div);
                 w.set_hsion(true)
             });
             while !RCC.cr().read().hsirdy() {}
 
-            (HSI_FREQ.0 >> div.to_bits(), Sw::HSI)
+            (HSI_FREQ / div, Sw::HSI)
         }
         ClockSrc::HSE(freq) => {
             // Enable HSE
             RCC.cr().write(|w| w.set_hseon(true));
             while !RCC.cr().read().hserdy() {}
 
-            (freq.0, Sw::HSE)
+            (freq, Sw::HSE)
         }
         ClockSrc::LSI => {
             // Enable LSI
             RCC.csr2().write(|w| w.set_lsion(true));
             while !RCC.csr2().read().lsirdy() {}
-            (LSI_FREQ.0, Sw::LSI)
+            (super::LSI_FREQ, Sw::LSI)
         }
     };
 
+    let rtc = config.ls.init();
+
     // Determine the flash latency implied by the target clock speed
     // RM0454 § 3.3.4:
-    let target_flash_latency = if sys_clk <= 24_000_000 {
+    let target_flash_latency = if sys_clk <= Hertz(24_000_000) {
         Latency::WS0
     } else {
         Latency::WS1
@@ -129,7 +102,7 @@ pub(crate) unsafe fn init(config: Config) {
     }
 
     // Configure SYSCLK source, HCLK divisor, and PCLK divisor all at once
-    let (sw, hpre, ppre) = (sw.into(), config.ahb_pre.into(), config.apb_pre.into());
+    let (sw, hpre, ppre) = (sw.into(), config.ahb_pre, config.apb_pre);
     RCC.cfgr().modify(|w| {
         w.set_sw(sw);
         w.set_hpre(hpre);
@@ -150,34 +123,23 @@ pub(crate) unsafe fn init(config: Config) {
         FLASH.acr().modify(|w| w.set_latency(target_flash_latency));
     }
 
-    let ahb_div = match config.ahb_pre {
-        AHBPrescaler::DIV1 => 1,
-        AHBPrescaler::DIV2 => 2,
-        AHBPrescaler::DIV4 => 4,
-        AHBPrescaler::DIV8 => 8,
-        AHBPrescaler::DIV16 => 16,
-        AHBPrescaler::DIV64 => 64,
-        AHBPrescaler::DIV128 => 128,
-        AHBPrescaler::DIV256 => 256,
-        AHBPrescaler::DIV512 => 512,
-        _ => unreachable!(),
-    };
-    let ahb_freq = sys_clk / ahb_div;
+    let ahb_freq = sys_clk / config.ahb_pre;
 
     let (apb_freq, apb_tim_freq) = match config.apb_pre {
         APBPrescaler::DIV1 => (ahb_freq, ahb_freq),
         pre => {
-            let pre: Ppre = pre.into();
-            let pre: u8 = 1 << (pre.to_bits() - 3);
-            let freq = ahb_freq / pre as u32;
-            (freq, freq * 2)
+            let freq = ahb_freq / pre;
+            (freq, freq * 2u32)
         }
     };
 
     set_freqs(Clocks {
-        sys: Hertz(sys_clk),
-        ahb1: Hertz(ahb_freq),
-        apb1: Hertz(apb_freq),
-        apb1_tim: Hertz(apb_tim_freq),
+        hsi: None,
+        lse: None,
+        sys: sys_clk,
+        hclk1: ahb_freq,
+        pclk1: apb_freq,
+        pclk1_tim: apb_tim_freq,
+        rtc,
     });
 }

embassy-stm32/src/rcc/f0.rs

@@ -8,9 +8,6 @@ use crate::time::Hertz;
 /// HSI speed
 pub const HSI_FREQ: Hertz = Hertz(8_000_000);
 
-/// LSI speed
-pub const LSI_FREQ: Hertz = Hertz(40_000);
-
 /// Configuration of the clocks
 ///
 /// hse takes precedence over hsi48 if both are enabled
@@ -27,6 +24,8 @@ pub struct Config {
     pub sys_ck: Option<Hertz>,
     pub hclk: Option<Hertz>,
     pub pclk: Option<Hertz>,
+
+    pub ls: super::LsConfig,
 }
 
 pub(crate) unsafe fn init(config: Config) {
@@ -159,12 +158,15 @@ pub(crate) unsafe fn init(config: Config) {
         })
     }
 
+    let rtc = config.ls.init();
+
     set_freqs(Clocks {
         sys: Hertz(real_sysclk),
-        apb1: Hertz(pclk),
-        apb2: Hertz(pclk),
-        apb1_tim: Hertz(pclk * timer_mul),
-        apb2_tim: Hertz(pclk * timer_mul),
-        ahb1: Hertz(hclk),
+        pclk1: Hertz(pclk),
+        pclk2: Hertz(pclk),
+        pclk1_tim: Hertz(pclk * timer_mul),
+        pclk2_tim: Hertz(pclk * timer_mul),
+        hclk1: Hertz(hclk),
+        rtc,
     });
 }