Commit Graph

981 Commits

Author SHA1 Message Date
ec51880e28 stm32/exti: unify all versions into single impl 2021-08-19 22:17:17 +02:00
d3aeb45fb3 Update cortex-m-rt to v0.7 for stm32, rp. 2021-08-19 00:56:11 +02:00
f141b98741 bxcan: Cleanup
Older families like F1 and F4 have a consistent naming for the CAN
peripherals: CAN when there is only one instance, CAN1/CAN2/CAN2 if
there are multiple instances.
Newer families like L4 and F7 use the name CAN1 even if there is only
one instance. The number of filter banks is incorrect for those.

Affected chips:
* STM32F722
* STM32F723
* STM32F730
* STM32F732
* STM32F733
* STM32L4P5
* STM32L4Q5
* STM32L4R5
* STM32L4R7
* STM32L4R9
* STM32L4S5
* STM32L4S7
* STM32L4S9
* STM32L431
* STM32L432
* STM32L433
* STM32L442
* STM32L443
* STM32L451
* STM32L452
* STM32L462
* STM32L471
* STM32L475
* STM32L476
* STM32L485
* STM32L486
2021-08-18 21:58:50 +02:00
0c3bede64f bxcan: Make bxcan a hard dependency
There seems no way to enable a optional dependency from build.rs or
features passed through the command line.
2021-08-18 21:58:50 +02:00
191a589820 bxcan: namechange "bxcan_v1" -> "can_bxcan" 2021-08-18 21:58:50 +02:00
dc6b7f3cba bxcan: Disable on drop 2021-08-18 21:58:50 +02:00
7c405250a7 CAN support with bxcan crate 2021-08-18 21:58:50 +02:00
4df63f5379 Add per-core EXTI support
* Generate a core index put into the PAC for the peripherals to use as
  index into registers.
* Add EXTI v2 which uses CORE_INDEX to index exti registers
2021-08-17 16:22:47 +02:00
61409e2fb6 Add example for STM32WL55 2021-08-17 16:22:47 +02:00
a93ed2bed6 Add H7 exti button example using correct EXTI reg block offsets. 2021-08-16 15:15:07 -04:00
cbff0398bb Add IRQ-driven buffered USART implementation for STM32 v2 usart (#356)
* Add IRQ-driven buffered USART implementation for STM32 v2 usart

* Implementation based on nRF UARTE, but simplified to not use DMA to
  avoid complex interaction between DMA and USART.
* Implementation of AsyncBufRead and AsyncWrite traits
* Some unit tests to ring buffer
* Update polyfill version
* Update sub module to get usart IRQ fix
2021-08-16 17:16:49 +02:00
c7ae2d2a3a stm32: Add fences to DMA code 2021-08-10 20:45:41 -03:00
40e7176e13 embassy-stm32: Eliminate use of unwrap 2021-08-05 22:40:08 +02:00
41aaff95f8 stm32h7: Use unwrap! 2021-08-05 22:39:59 +02:00
e44acd0d56 stm32f4: Use unwrap! where possible 2021-08-05 22:39:59 +02:00
05e50e1f4a time_driver: use regular fn ptr -> raw ptr casts 2021-08-05 19:19:47 +02:00
b1d631d639 stm32/time: add Cargo features to choose tim2/tim3 2021-08-05 19:14:09 +02:00
0ea6a2d890 time: replace dyn clock/alarm with a global Driver trait 2021-08-05 19:14:09 +02:00
cfa1f61154 Merge pull request #344 from bobmcwhirter/remove_builders
Remove builders from Config(s) and examples.
2021-08-04 21:32:39 +02:00
07d4b196f7 Update nightly, remove removed features. 2021-08-04 19:48:14 +02:00
9bd34429f3 stm32: add missing + 'a bounds on trait GATs 2021-08-04 19:39:54 +02:00
f4971fbb79 Further work sharing config for example and removing duplicated code. 2021-08-04 13:39:02 -04:00
03f15d3a60 Remove builders from Config(s) and examples. 2021-08-04 11:32:39 -04:00
de77dc11ca Merge pull request #301 from thalesfragoso/i2cv2-dma
i2c-v2: Implement write_dma and write_dma_vectored
2021-08-04 12:28:18 +02:00
5d31dd328f Merge pull request #341 from lulf/usart-dma-read
Add uart::Read DMA-based implementation
2021-08-04 11:02:15 +02:00
0d02342b2d Rename bread -> read_blocking 2021-08-04 08:34:30 +02:00
88c11a653c Formatting fixes. 2021-08-03 14:12:11 -04:00
d7409d63e8 Enhance Rcc configuration to be more fluentish.
Clean up H7 examples to remove all vegan HALs and PACs.
2021-08-03 13:57:18 -04:00
6ff0614cb6 Add uart::Read DMA-based implementation
* Rename existing read() to bread() (blocking)
2021-08-03 15:31:24 +02:00
3f28bb6c77 common: Initialize PeripheralMutex state with closure to ensure it's done in-place. 2021-08-02 20:13:41 +02:00
e238079d7d Make const the states when able. 2021-08-02 19:59:02 +02:00
63ac7ac799 Mark news as unsafe due to not being leak-safe. 2021-08-02 19:55:04 +02:00
af87031d62 hal-common: remove Pin in PeripheralMutex 2021-08-02 19:55:04 +02:00
63b32b39e1 Use an em bikeshed instead of an underscore bikeshed. 2021-08-02 13:29:06 -04:00
5f9447abb4 Put the implicit memory.x behind a memory_x feature on embassy-stm32. 2021-08-02 13:21:30 -04:00
3a00a1dba7 Undo the pwr-guarding cfg. 2021-08-02 11:34:41 -04:00
f6c5f039c8 Emit a default memory.x alongside device.x from metapac. 2021-08-02 11:23:55 -04:00
64a3ebd183 i2c-v2: Use new interrupts macro 2021-08-01 19:10:42 -03:00
c1bb83d29d i2c-v2: Deref interrupt enabling in write_dma_internal 2021-08-01 19:10:42 -03:00
6ddc83029a i2c-v2: Simplify write_dma 2021-08-01 19:10:42 -03:00
362f7efe99 i2c-v2: Implement write_dma and write_dma_vectored 2021-08-01 19:10:42 -03:00
3835278567 Merge pull request #321 from thalesfragoso/f4-pll
F4 PLL
2021-07-31 11:08:46 +02:00
21e3acaa00 stm32: Use build.rs to generate a more coarse feature 2021-07-31 02:52:26 -03:00
0421c57bd6 F4: Add PWR configuration to PLL 2021-07-29 18:43:15 -03:00
5cfb9adad8 f4-pll: Add max values per chip 2021-07-29 18:43:15 -03:00
e7714983b3 f4-rcc: Add option to enable debug_wfe and add hello example 2021-07-29 18:43:15 -03:00
5abaf8e9d6 Start working on the F4 PLL 2021-07-29 18:43:13 -03:00
9342497132 stm32wl55: Use Dbgmcu::enable_all 2021-07-29 17:38:40 +02:00
cad43587e6 stm32l0: Use embassy::main for examples 2021-07-29 17:37:32 +02:00
2a4890165d stm32f0: Enable debug access in low power modes 2021-07-29 15:35:23 +02:00