2eb0cc5df7
stm32/rcc: remove Rcc struct, RccExt trait.
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All the RCC configuration is executed in init().
2022-01-05 00:00:44 +01:00
c3fd9a0f44
stm32/rcc: f4/f7 cleanup and make a bit more consistent.
2022-01-04 21:17:17 +01:00
b06e705a73
stm32/rcc: change family-specific code from dirs to single files.
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Consistent with how other peripherals handle their versions.
2022-01-04 19:28:15 +01:00
89b009b11d
stm32h7/rcc: remove unneeded DMA enable settings.
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These are automatically enabled by dma::init().
2022-01-04 13:31:30 +01:00
5d2f40b337
stm32wl/rcc: remove unneded gpio enables in RCC.
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These are already done by gpio::init().
2022-01-04 13:31:30 +01:00
cdc66e110f
stm32/rcc: remove builders on Config.
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This makes API consistent with other Config structs in Embassy, where
the convention is to not use builders.
2022-01-04 13:31:30 +01:00
a93b1141e9
stm32f1: Store adc clock rate in Clocks struct
2021-12-30 10:50:28 +01:00
d5a3064c2c
Merge #540
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540: Initial support for STM32F3 r=Dirbaio a=VasanthakumarV
The [companion PR](https://github.com/embassy-rs/stm32-data/pull/109 ) in `stm32-data` should be merged before this PR.
The examples were tested on an STM32F303VC MCU.
Co-authored-by: VasanthakumarV <vasanth260m12@gmail.com >
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net >
2021-12-16 07:30:03 +00:00
3f33d307ff
[feature] Add rcc register support for F3
2021-12-13 14:50:13 +05:30
1dd5a71c07
Add DCMI peripheral support.
2021-12-09 12:56:39 +01:00
b0fabfab5d
Update stm32-data: rcc regs info comes from yamls now.
2021-11-29 02:28:02 +01:00
25b49a8a2a
Remove common clock types
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Different STM32 RCC peripherals have different capabilities and register
values. Define types for each RCC types inside each module to ensure
full range of capabilities for each family can be used
2021-11-28 16:46:08 +01:00
88d4b0c00d
stm32: add stm32g4 support.
2021-11-27 02:34:23 +01:00
8193885cb5
Merge #482
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482: Add MCO peripheral. r=Dirbaio a=matoushybl
This PR adds an abstraction over STM32 RCC feature called MCO (Microcontroller Clock Output). The clock output can bind to several clock sources and then can be scaled using a prescaler.
Given that from the embassy ecosystem the RCC is generaly invisible to the user, the MCO was implemented as a separate peripheral bound to the pin where the clock should appear.
Co-authored-by: Matous Hybl <hyblmatous@gmail.com >
2021-11-11 16:20:02 +00:00
c14642cffc
Add MCO peripheral.
2021-11-11 11:34:09 +01:00
12a64b867b
More support for U5 PWR (ish), RCC, and FLASH (ish).
2021-11-08 14:27:33 -05:00
5f124ec49f
Update U5 to init RCC.
2021-11-08 14:20:51 -05:00
d1272e00bb
Prefix unused variable for now.
2021-11-02 15:45:56 -04:00
f12b70535b
Adjust for STM32U5.
2021-11-02 12:05:24 -04:00
015cad84dd
Initial support for STM32F767ZI.
2021-10-26 17:33:28 +02:00
e55726964d
Fix clock setup for MSI and PLL to allow RNG opereation
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Add RNG example using PLL as clock source.
2021-10-26 13:45:53 +02:00
573e6ec373
stm32g0: Add support for low-power run
2021-09-28 21:19:10 -04:00
794798e225
stm32g0: Add support for HSI divider
2021-09-28 21:19:10 -04:00
ce361abb1b
Changing the casts (code review request)
2021-09-28 18:31:04 +02:00
bce909ec1e
Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill)
2021-09-28 18:31:04 +02:00
7d6d274d55
Add MSI and PLL clock source for L4
2021-09-24 18:27:39 +02:00
b6fc19182b
Add pwr for L1 and update RCC to new reg block
2021-09-23 14:51:16 +02:00
c79485c286
Support for STM32L1
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* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
fb697a2657
Updates
2021-09-15 12:46:20 +02:00
7ad6280e65
Add HAL for SubGhz peripheral for STM32 WL series
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Based on the HAL from stm32wl, the peripheral driver has been
modified to fit into embassy, using the embassy APIs, providing
operation of the radio peripheral.
The initial version does not offer any async APIs, but the example
shows how the radio IRQ can be used to perform async TX of the radio.
2021-09-02 10:39:56 +02:00
e2f71ffbbd
Add support for STM32G0
2021-08-20 00:15:11 +02:00
174c51f097
stm32/metapac: check GPIO RCC regs are always found.
2021-08-19 23:59:50 +02:00
2c992f7010
stm32: move dbgmcu stuff to toplevel config setting, defaulting to true.
2021-08-19 23:50:19 +02:00
9f51f9a170
stm32/wl: add stub APB3 to get it to build.
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Completely untested.
2021-08-19 22:51:41 +02:00
637fcdd316
stm32/rcc: update for new version naming
2021-08-19 22:17:45 +02:00
61409e2fb6
Add example for STM32WL55
2021-08-17 16:22:47 +02:00
41aaff95f8
stm32h7: Use unwrap!
2021-08-05 22:39:59 +02:00
e44acd0d56
stm32f4: Use unwrap! where possible
2021-08-05 22:39:59 +02:00
f4971fbb79
Further work sharing config for example and removing duplicated code.
2021-08-04 13:39:02 -04:00
03f15d3a60
Remove builders from Config(s) and examples.
2021-08-04 11:32:39 -04:00
88c11a653c
Formatting fixes.
2021-08-03 14:12:11 -04:00
d7409d63e8
Enhance Rcc configuration to be more fluentish.
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Clean up H7 examples to remove all vegan HALs and PACs.
2021-08-03 13:57:18 -04:00
3835278567
Merge pull request #321 from thalesfragoso/f4-pll
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F4 PLL
2021-07-31 11:08:46 +02:00
21e3acaa00
stm32: Use build.rs to generate a more coarse feature
2021-07-31 02:52:26 -03:00
0421c57bd6
F4: Add PWR configuration to PLL
2021-07-29 18:43:15 -03:00
5cfb9adad8
f4-pll: Add max values per chip
2021-07-29 18:43:15 -03:00
e7714983b3
f4-rcc: Add option to enable debug_wfe and add hello example
2021-07-29 18:43:15 -03:00
5abaf8e9d6
Start working on the F4 PLL
2021-07-29 18:43:13 -03:00
9342497132
stm32wl55: Use Dbgmcu::enable_all
2021-07-29 17:38:40 +02:00
cad43587e6
stm32l0: Use embassy::main for examples
2021-07-29 17:37:32 +02:00
