Thales Fragoso
c1bb83d29d
i2c-v2: Deref interrupt enabling in write_dma_internal
2021-08-01 19:10:42 -03:00
Thales Fragoso
6ddc83029a
i2c-v2: Simplify write_dma
2021-08-01 19:10:42 -03:00
Thales Fragoso
362f7efe99
i2c-v2: Implement write_dma and write_dma_vectored
2021-08-01 19:10:42 -03:00
Dario Nieuwenhuis
3835278567
Merge pull request #321 from thalesfragoso/f4-pll
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F4 PLL
2021-07-31 11:08:46 +02:00
Thales Fragoso
21e3acaa00
stm32: Use build.rs to generate a more coarse feature
2021-07-31 02:52:26 -03:00
Thales Fragoso
0421c57bd6
F4: Add PWR configuration to PLL
2021-07-29 18:43:15 -03:00
Thales Fragoso
5cfb9adad8
f4-pll: Add max values per chip
2021-07-29 18:43:15 -03:00
Thales Fragoso
e7714983b3
f4-rcc: Add option to enable debug_wfe and add hello example
2021-07-29 18:43:15 -03:00
Thales Fragoso
5abaf8e9d6
Start working on the F4 PLL
2021-07-29 18:43:13 -03:00
Timo Kröger
9342497132
stm32wl55: Use Dbgmcu::enable_all
2021-07-29 17:38:40 +02:00
Timo Kröger
cad43587e6
stm32l0: Use embassy::main
for examples
2021-07-29 17:37:32 +02:00
Timo Kröger
2a4890165d
stm32f0: Enable debug access in low power modes
2021-07-29 15:35:23 +02:00
Dario Nieuwenhuis
7bfb763e09
Rename embassy-extras to embassy-hal-common
2021-07-29 13:44:51 +02:00
Dario Nieuwenhuis
c8a48d726a
Merge pull request #277 from Liamolucko/fix-peripheral-ub
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extras: Fix UB in `Peripheral`
2021-07-29 13:08:30 +02:00
Liam Murphy
d5ba35424d
Replace PeripheralStateUnchecked
with register_interrupt_unchecked
2021-07-29 15:11:26 +10:00
Bob McWhirter
8759213fcc
Use new interrupt! table format to /enable/ the IRQs also.
2021-07-27 13:23:33 -04:00
Bob McWhirter
b910551c9a
Generate more rows in the interrupts! table.
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Adjust DMA/BDMA to use the new style.
2021-07-27 12:52:01 -04:00
Liam Murphy
079526559f
Remove critical sections from PeripheralMutex
interrupt handler by checking the interrupt's priority on startup.
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Since `PeripheralMutex` is the only way to safely maintain state across interrupts, and it no longer allows setting the interrupt's priority, the priority changing isn't a concern.
This also prevents other causes of UB due to the interrupt being exposed during `with`, and allowing enabling the interrupt and setting its context to a bogus pointer.
2021-07-27 17:28:52 +10:00
Timo Kröger
06fb2a7a80
Enable SYSCFG clock in exti::init()
2021-07-24 11:13:49 +02:00
Dario Nieuwenhuis
3c7375c6cd
stm32/bdma: do not clear IF on IRQ handler
2021-07-24 10:01:11 +02:00
Timo Kröger
43c4f24207
STM32 BDMA: Use interrupt flags instead of atomics
2021-07-24 09:26:07 +02:00
Timo Kröger
5a4a5ce334
STM32 DMA: Use interrupt flags instead of atomics
2021-07-24 09:26:07 +02:00
Bob McWhirter
83f63890e5
Actually take a &mut of that read slice.
2021-07-23 13:22:39 -04:00
Bob McWhirter
473a83a937
Adjust how we deal with read/write being different length.
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Including some docs about it.
Removing the Rx-enablement for write-only operations.
2021-07-23 13:22:39 -04:00
Bob McWhirter
f1a3e0e05d
As before, EVERY DANG TIME.
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It'll be sweet with intellij-rust-plugin works better.
2021-07-23 13:22:39 -04:00
Bob McWhirter
b07325b476
Enable DMA for SPIv1 on F4's etc.
2021-07-23 13:22:39 -04:00
Bob McWhirter
8ab82191b7
Every dang time.
2021-07-23 13:22:39 -04:00
Bob McWhirter
a1dac21bdf
Make SPIv3 work with DMA.
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Add both DMA and non-DMA example to H7.
2021-07-23 13:22:39 -04:00
Bob McWhirter
6dbe049468
Add back in the other versions of SPI.
2021-07-23 13:22:39 -04:00
Bob McWhirter
0d2051243e
SPIv2 + DMA.
2021-07-23 13:22:39 -04:00
Bob McWhirter
1a03f00b56
Wire up peripheral DMA channels for SPI.
2021-07-23 13:22:39 -04:00
Bob McWhirter
3df2aadc39
Avoid borrowck issue.
2021-07-23 13:22:39 -04:00
Bob McWhirter
dedc2bac42
IntelliJ'd.
2021-07-23 13:22:39 -04:00
Bob McWhirter
4c5a234a3a
Add a non-minc write() to DMA which takes a count.
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Use it from "read-only" SPI.
2021-07-23 13:22:39 -04:00
Bob McWhirter
7bbad4c4e5
More unused allowances.
2021-07-23 13:22:39 -04:00
Bob McWhirter
4bcc3b06c6
Include all versions when handing to CI.
2021-07-23 13:22:39 -04:00
Bob McWhirter
a75110296d
Annotate to avoid unused warnings for the moment.
2021-07-23 13:22:39 -04:00
Bob McWhirter
3f379e06b0
Begin reworking SPI to add DMA for stm32.
2021-07-23 13:22:39 -04:00
Bob McWhirter
fe66f0f8f8
Checkpoint.
2021-07-23 13:22:39 -04:00
Bob McWhirter
650f867b1c
Add a single-column variant to gpio_rcc! macro table
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which includes just the set of registers that need to be
considered.
Then match against those registers with a single `modify(...)`
2021-07-23 11:32:20 -04:00
Bob McWhirter
13873df30b
Auto-enable all GPIOs during init().
2021-07-23 11:32:19 -04:00
Bob McWhirter
d68f2617e6
Add a Dbgmcu
struct capable of enabling all relevant DBGMCU.cr fields.
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Includes the addition of a `dbgmcu!(...)` macro table which currently takes
the form of
(cr, $fn_name:ident)
where `$fn_name` is something like `set_dbgsleep_d1` etc.
The method is unsafe, since it's performing unsafe PAC operations.
Two examples modified to demonstrate its usage.
2021-07-22 14:18:48 -04:00
Bob McWhirter
2d3137afc7
The async move
portion of @thalesfragoso's i2c PR.
2021-07-20 11:38:16 -04:00
Thales
40ea8298ee
Merge pull request #300 from thalesfragoso/clear-dma
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stm32: Clear possible set flags after disabling DMA
2021-07-17 17:28:02 -03:00
Thales
f4b8709bac
Merge pull request #281 from thalesfragoso/i2c-256
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i2c-v2: Support transfers with more than 255 bytes
2021-07-17 17:21:50 -03:00
Thales Fragoso
aae0431d31
stm32: Clear possible set flags after disabling DMA
2021-07-17 16:59:35 -03:00
Dario Nieuwenhuis
36be877ba3
stm32/dma: only set TRBUFF in DMAv1 (H7)
2021-07-17 08:01:20 +02:00
Dario Nieuwenhuis
3655048e0f
stm32/dma: add MuxChannel trait to distinguish DMAMUX1 and DMAMUX2 channels.
2021-07-17 07:54:16 +02:00
Dario Nieuwenhuis
54b5012c56
stm32/dma: update codegen+macrotables for new stm32-data
2021-07-17 07:35:59 +02:00
Bob McWhirter
0119ea809d
Get DMA on H7 working, add usart_dma example for H7.
2021-07-16 14:41:20 -04:00