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1609 Commits

Author SHA1 Message Date
ba43444292 Merge pull request #1601 from embassy-rs/net-release
Release embassy-net v0.1
2023-06-29 20:01:10 +02:00
6eac49186d Release embassy-net v0.1 2023-06-29 19:55:32 +02:00
4feabb13bf Merge pull request #1599 from ilikepi63/main
feature(1355): Add trigger to task, triggered + clear to Event
2023-06-29 15:53:11 +00:00
3f19879f41 PR Fixes 2023-06-29 17:44:46 +02:00
e90f47aba3 Fixed Pointer Updates 2023-06-29 17:37:51 +02:00
2aa2b843ce feature(1355): Add trigger to task, triggered + clear to Event 2023-06-29 17:11:36 +02:00
fa2cda81db Merge pull request #1598 from kaspar030/patch-1
embassy-boot/nrf/README.md: typo fix
2023-06-29 12:57:55 +00:00
837d3bcdbb embassy-boot/nrf/README.md: typo fix 2023-06-29 14:43:31 +02:00
9f50f34547 Merge pull request #1597 from embassy-rs/usb-missing-reexports
usb: add missing builder reexports.
2023-06-29 10:24:25 +00:00
f0b17675d8 usb: add missing builder reexports.
Fixes #1176
cc #1596
2023-06-29 12:20:51 +02:00
6eb46c419c Merge pull request #1565 from JuliDi/main
Implement DMA for DAC on STM32
2023-06-29 08:54:28 +00:00
96f1525ffe Revert changes to dma.rs 2023-06-29 09:20:25 +02:00
01101e3df0 Update readme 2023-06-29 03:11:22 +02:00
b95e5a4ea6 Merge pull request #1595 from embassy-rs/probe-rs
Update probe-rs-cli -> probe-rs
2023-06-29 00:43:44 +00:00
f7ec579c18 Update probe-rs-cli -> probe-rs 2023-06-29 02:39:28 +02:00
4f0aca481f Merge pull request #1594 from embassy-rs/update-rp-pac
Update rp-pac.
2023-06-29 00:15:13 +00:00
ce889900d6 Update rp-pac. 2023-06-29 02:09:51 +02:00
8a0a7c81b6 Merge pull request #1593 from embassy-rs/metapac-update
Update stm32-metapac, includes chiptool changes to use real Rust enums.
2023-06-29 00:06:44 +00:00
e892014b65 Update stm32-metapac, includes chiptool changes to use real Rust enums now. 2023-06-29 02:01:33 +02:00
8cbe5b8e20 Merge pull request #1592 from kevswims/feature/stm32g4-usb-crs
WIP: Working CRS USB Example
2023-06-28 22:55:11 +00:00
5666c56903 STM32G4: Add CRS support to RCC
Create working CRS USB Example
2023-06-28 16:53:16 -06:00
d5898c11eb remove need for StaticCell in dac_dma example for stm32l4 2023-06-28 16:40:50 +02:00
daedfbbd87 add dma is_running change doc 2023-06-28 15:39:36 +02:00
bf7e24e9d7 revert to STM32L4S5VI 2023-06-28 15:37:29 +02:00
02f367f733 attempt at fixing ci 2023-06-28 15:28:10 +02:00
f2e7a23148 attempt at fixing ci 2023-06-28 15:25:57 +02:00
27a89019ad add doc 2023-06-28 15:21:24 +02:00
2eb7a67c70 Merge pull request #1591 from bugadani/patch-1
Make StackResources::new() const
2023-06-28 13:16:27 +00:00
59f829c6cc Make StackResources::new() const 2023-06-28 15:03:57 +02:00
91c31d5e43 Update DAC examples, add DAC + DMA example 2023-06-28 11:58:25 +02:00
9b5d7ec061 Merge pull request #1589 from embassy-rs/otg-fixes
stm32/otg: implement VBUS detection, misc fixes so plug/unplug works.
2023-06-27 22:39:00 +00:00
ed493be869 stm32: update metapac, includes fix for OTG with 9 endpoints (H7) 2023-06-27 23:58:32 +02:00
f5ca687e9b sync/pipe: fix doc typos. 2023-06-27 23:49:12 +02:00
9c81d63155 fix warnings 2023-06-27 22:33:17 +02:00
60c54107ce fix sdmmc bdma transferconfig fields 2023-06-27 21:58:56 +02:00
56dd22f0ac feature-gate set_channel_mode, undo dma.rs changes 2023-06-27 21:23:47 +02:00
afec1b439b feature-gate dma write, make trigger not return a result 2023-06-27 18:17:51 +02:00
219ef5b37a stm32/otg: add VBUS detection.
Fixes #1442.
2023-06-27 12:52:37 +02:00
a2d1e7f02c rp/usb: add TODO: implement VBUS detection. 2023-06-27 04:29:01 +02:00
5e6e18b310 stm32/usb: add TODO: implement VBUS detection. 2023-06-27 04:29:01 +02:00
80407aa930 stm32/otg: set tx fifo num in IN endpoints on configure. 2023-06-27 02:12:33 +02:00
a575e40a35 stm32/otg: clear NAK bit on endpoint enable. 2023-06-27 02:12:06 +02:00
28fb492c40 stm32/otg: flush fifos on reconfigure and on ep disable. 2023-06-27 00:42:24 +02:00
45561f1622 Merge pull request #1587 from embassy-rs/update-smoltcp2
Update smoltcp to 0.10
2023-06-26 18:28:38 +00:00
715bf20c41 Update smoltcp to 0.10 2023-06-26 20:13:55 +02:00
ac2b7928c5 Merge pull request #1585 from embassy-rs/update-smoltcp2
Update smoltcp.
2023-06-26 09:51:28 +00:00
64cba950e5 Update smoltcp. 2023-06-26 11:43:28 +02:00
e7bc84dda8 fix issues when DAC2 present, add additional options to DMA (NOT YET WORKING with STM32H7A3ZI) 2023-06-26 09:42:25 +02:00
d8c70c5c3e Merge pull request #1583 from bugadani/const
Allow path expressions as `task(pool_size)`
2023-06-25 21:17:56 +00:00
12872ce49b Modify an example 2023-06-25 23:10:59 +02:00
2809e926cf Allow arbitrary expressions as pool_size 2023-06-25 23:10:48 +02:00
aa0ab06645 Update darling 2023-06-25 22:24:48 +02:00
03e0116a56 Merge pull request #1580 from xoviat/wpan
stm32/wpan: cleanup
2023-06-25 16:44:52 +00:00
018622f607 stm32/wpan: update example 2023-06-25 11:38:48 -05:00
8cafaa1f3c add docs, cleanup 2023-06-25 11:54:25 +02:00
df944edeef fix minor issues with splitting channels etc 2023-06-25 10:53:35 +02:00
388d3e273d first attempt at fixing the 2nd channel problem 2023-06-24 13:10:59 +02:00
49333ce6ad stm32/wpan: move linker file into pkg 2023-06-23 20:09:13 -05:00
d43417e97c stm32/wpan: implement mm pattern 2023-06-23 19:59:48 -05:00
91fdd76053 stm32/wpan: use align to align data 2023-06-23 18:08:42 -05:00
f23b34951a rustfmt 2023-06-23 17:55:47 -05:00
29f32ce00e stm32/wpan: reorg subsystems 2023-06-23 17:54:06 -05:00
4dd48099be Merge pull request #1577 from dbdbc/main
disable pull-up and down resistors for rp adc blocking_read
2023-06-23 10:17:40 +00:00
915f79c974 allow independent use of ch1 and ch2 on dac 2023-06-23 12:14:40 +02:00
ea04a0277b change dma complete transfer IR default to true 2023-06-23 12:14:26 +02:00
6f17286c75 Merge pull request #1576 from OueslatiGhaith/hci_v2
wpan: add BLE HCI
2023-06-23 02:09:52 +00:00
caf63b9e73 stm32/tests: update ble test 2023-06-22 21:05:51 -05:00
64ff1a6b75 update hci crate git path 2023-06-22 22:53:07 +01:00
558247d8f6 update hci crate name 2023-06-22 22:51:38 +01:00
23c51a1874 disable pull-up and down resistors for rp adc blocking_read 2023-06-22 23:02:16 +02:00
70907d84f1 Merge pull request #1546 from embassy-rs/esp-hosted
esp-hosted embassy-net driver.
2023-06-22 19:18:01 +00:00
8bbfa6827c esp-hosted: add perf hil test. 2023-06-22 21:12:24 +02:00
6e65282f18 esp-hosted: smaller delay after transfer, makes slightly better perf. 2023-06-22 21:12:10 +02:00
0d02298ea6 esp-hosted: fix build on stable. 2023-06-22 21:12:10 +02:00
1ed909ea74 esp-hosted: fix warnings. 2023-06-22 21:12:10 +02:00
764b43e82c esp-hosted: wait for esp firmware init. 2023-06-22 21:12:10 +02:00
082f1ab494 esp-hosted: nicer names for shared state struct. 2023-06-22 21:12:10 +02:00
ec2c095a76 esp-hosted: print events. 2023-06-22 21:12:10 +02:00
6c123596b7 wip: esp-hosted net driver. 2023-06-22 21:12:10 +02:00
3dbd58f40e fix unsound access in EvtBox 2023-06-22 15:59:03 +01:00
810c6af77a fix build 2023-06-22 15:31:45 +01:00
cd4f8f13a2 wpan: add BLE HCI 2023-06-22 15:21:14 +01:00
78736328a0 update docs and update to new dma interface 2023-06-22 10:44:08 +02:00
8d0095c618 add option to enable/disable complete transfer interrupt 2023-06-22 10:43:45 +02:00
1f2be2dac5 Merge pull request #1569 from xoviat/tl-mbox-2
wpan: misc. cleanup and add mac
2023-06-21 21:50:12 +00:00
5247c1c795 stm32/wpan: fix data alignment 2023-06-21 16:34:56 -05:00
fdb3c3d6ff Merge remote-tracking branch 'upstream/main' 2023-06-21 11:52:53 +02:00
2e625138ff Merge pull request #1501 from xoviat/can
async can
2023-06-20 22:57:31 +00:00
ca21027eea Merge pull request #3 from schphil/can
fix extended can id
2023-06-20 17:45:28 -05:00
0a551eb7c6 stm32/can: fix time 2023-06-20 17:39:00 -05:00
5dd0d35021 Merge pull request #1574 from embassy-rs/bootloader-safe-order
Prevent bootloader revert and add missing examples to CI
2023-06-20 17:04:34 +00:00
0d67ef795e Merge branch 'main' of https://github.com/embassy-rs/embassy into tl-mbox-2 2023-06-19 21:18:46 -05:00
978e7b5e77 stm32/wpan: fix bugs 2023-06-19 21:17:31 -05:00
161d3ce05c Add firmware updater examples to CI
CI was not building the a.rs application due to the requirement of b.bin
having been built first. Add a feature flag to examples so that CI can
build them including a dummy application.

Update a.rs application examples so that they compile again.
2023-06-19 23:34:07 +02:00
37a1e9f971 Merge pull request #1573 from embassy-rs/stm32-gpdma-clear-irqs
stm32: GPDMA clear irqs
2023-06-19 21:11:20 +00:00
5a075acc6a stm32/tests: fix can 2023-06-19 16:11:01 -05:00
0998221478 stm32/can: update interrupts 2023-06-19 16:05:59 -05:00
428a4ba3f9 stm32/gpdma: clear all interrupts after reset.
Reset doesn't clear them, this causes subsequent transfers to instantly
complete because the TC flag was set from before.
2023-06-19 23:03:31 +02:00
aaad906815 Merge branch 'main' of https://github.com/embassy-rs/embassy into can 2023-06-19 15:52:33 -05:00
76659d9003 Prevent accidental revert when using firmware updater
This change prevents accidentally overwriting the previous firmware before
the new one has been marked as booted.
2023-06-19 22:39:00 +02:00
990dd5e5db tests/stm32: do multiple transfers to catch more bugs. 2023-06-19 22:38:27 +02:00
56ab6d9f14 remove write_X variants 2023-06-19 13:54:22 +02:00
88052480b1 fix typo, minor cleanup 2023-06-19 13:50:17 +02:00
218b102b28 remove Alignment and make Value and Value array look the same 2023-06-19 13:46:17 +02:00
fe7b72948a add ValueArray type and respective write functions 2023-06-19 13:42:25 +02:00
3c70f799a2 Merge pull request #1572 from whitequark/bdma-blocking_wait-stop
BDMA: request stop after busy loop in blocking_wait()
2023-06-19 09:55:07 +00:00
e0747e937f remove unsafe for circular dma reg access 2023-06-19 11:15:09 +02:00
320e2cf35b Merge branch 'main' of github.com:embassy-rs/embassy 2023-06-19 11:14:48 +02:00
bbc81146ec BDMA: request stop after busy loop in blocking_wait().
Otherwise the channel cannot be used again, since CR.EN remains set
and the DMA channel registers are read-only while it is set.
2023-06-19 09:06:41 +00:00
faf7aeba27 Merge pull request #1570 from embassy-rs/update-metapac2
stm32: update stm32-metapac.
2023-06-19 01:25:43 +00:00
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
0122b813d3 stm32/wpan: fix lifetime param 2023-06-18 19:03:50 -05:00
72fd648d92 stm32/wpan: add shci mac init 2023-06-18 18:56:53 -05:00
b95c0210b8 stm32/wpan: add draft mac mbox 2023-06-18 18:51:14 -05:00
f8ee33abb9 add half transfer interrupt and circular dma 2023-06-18 18:51:36 +02:00
9f63158aad stm32/wpan: reorg modules 2023-06-18 10:11:36 -05:00
748d1ea89d stm32/ipcc: minor cleanup 2023-06-18 10:10:05 -05:00
39334f7280 stm32/wpan: add ble, mac features and cleanup 2023-06-18 09:43:07 -05:00
7177e7ea1a stm32/wpan: cleanup and expand shci 2023-06-18 08:37:26 -05:00
adaed307b4 Merge pull request #1561 from petegibson/stm32-buffereduart-int-flags-fix
Ensure idle & ove flags are cleared in BufferedUart ISR on STM32
2023-06-18 10:40:22 +00:00
b4f96e192c Don't read data register to clear flags on usart v3 ^& v4 2023-06-18 08:45:58 +10:00
ae83e6f536 Merge pull request #1566 from xoviat/tl-mbox-2
tl-mbox: switch to new ipcc mechanism
2023-06-17 20:48:37 +00:00
443550b353 stm32/wpan: use new ownership model 2023-06-17 15:37:34 -05:00
6d7d617f40 stm32/wpan: add ble acl_write 2023-06-17 15:18:15 -05:00
c7b0df569b stm32/wpan: modify evtbox to use slice view 2023-06-17 14:38:36 -05:00
041a4a4208 rustfmt 2023-06-17 12:15:00 -05:00
4d2d7d7684 stm32/wpan: fix examples 2023-06-17 12:13:51 -05:00
faa58b9074 rustfmt 2023-06-17 12:06:00 -05:00
6b5d55eb29 stm32/wpan: convert to new ipcc 2023-06-17 12:00:33 -05:00
b0a2f0c4fe stm32/wpan: debug remove node 2023-06-17 11:02:31 -05:00
4c9b7befaa stm32/ipcc: add clear debug 2023-06-17 10:50:06 -05:00
6ef060ca17 disable mm 2023-06-17 10:44:36 -05:00
391f0b5d09 revert reset changes 2023-06-17 08:37:00 -05:00
9e8de5f596 fut: add poll_once 2023-06-17 08:11:55 -05:00
78a2ca8a0e remove unnecessary use, disable DAC and DMA after transfer 2023-06-17 11:51:57 +02:00
f5d084552d implement mwe of a DMA write() method for DAC 2023-06-17 11:48:21 +02:00
e1161dfc80 stm32/wpan: improve linked list ergonomics 2023-06-16 20:15:03 -05:00
ec36225f8a Merge pull request #1560 from kevswims/feature/stm32g4-pll-enhancements
Feature/stm32g4 pll enhancements - Add PLL support for the P and Q outputs for G4 series chips
2023-06-16 16:06:50 +00:00
0ac43d3e7c Merge pull request #1562 from embassy-rs/rp-pac-update
rp: update rp-pac.
2023-06-16 16:00:52 +00:00
6ed36cd9c7 Merge pull request #1563 from kaspar030/interrupt_executor_spawner_fn
embassy-executor: introduce `InterruptExecutor::spawner()`
2023-06-16 16:00:42 +00:00
f6c1108bdf fix extended can id 2023-06-16 14:56:28 +02:00
54fc933932 embassy-executor: introduce InterruptExecutor::spawner() 2023-06-16 12:59:23 +02:00
af451b5462 stm32/wpan: move schi command into sys 2023-06-15 21:02:10 -05:00
837ebe405f rp: update rp-pac. 2023-06-16 01:41:07 +02:00
d236f3dbf9 actually fix formatting 2023-06-15 18:35:58 +10:00
d23717904b fix formatting 2023-06-15 18:33:01 +10:00
837950cd74 ensure DR is read to clear idle/overflow interrupt when they occur independently of the rxne 2023-06-15 13:24:49 +10:00
61aa6b5236 STM32G4: Add USB Serial example 2023-06-14 11:07:19 -06:00
c94ba84892 stm32g4: PLL: Add support for configuring PLL_P and PLL_Q 2023-06-14 10:44:51 -06:00
64e3310e64 Merge pull request #1559 from xoviat/tl-mbox
wpan: get --release HIL working
2023-06-14 02:20:22 +00:00
4601f4e1eb stm32/wpan: minor linked list cleanpu 2023-06-13 21:15:01 -05:00
ae9983324d stm32/wpan: cleanup linked list and fix edge cases 2023-06-13 21:10:42 -05:00
bc0734eee5 stm32/wpan: remove break 2023-06-13 18:05:27 -05:00
c1fc98c313 stm32/wpan: fix linked list bug 2023-06-13 18:04:05 -05:00
c484f0715b rustfmt 2023-06-13 17:17:10 -05:00
29513074ee rustfmt 2023-06-13 17:16:12 -05:00
f15a0203e4 rustfmt 2023-06-13 17:13:25 -05:00
6c13f381c4 stm32/wpan: get --release working 2023-06-13 17:12:34 -05:00
38891c29ea Merge pull request #1549 from timokroeger/uart_rx_idle
embassy-nrf: Idle detection for RX only uarte
2023-06-13 09:43:32 +00:00
d82c2a1c26 Merge pull request #1558 from OueslatiGhaith/doc
stm32-wpan: docs
2023-06-13 09:41:06 +00:00
055f6afdcc stm32-wpan: add doc metadata 2023-06-13 09:51:21 +01:00
b55e618175 embassy-nrf: Idle detection for RX only uarte
Introduce `with_idle()` to upgrade an `UarteRx` instance to
`UarteRxWithIdle`. Use the method in the split constructor aswell.
2023-06-13 08:22:38 +02:00
0053a8a1a7 Merge pull request #1555 from xoviat/old-tl-mbox
wip: old tl mbox
2023-06-13 02:25:45 +00:00
3c98587a88 tests/ble: disable test for now
does not work in --release
2023-06-12 21:23:42 -05:00
9cfcc5b89a Fix docs build. 2023-06-13 03:29:51 +02:00
7f63fbbf4a Merge branch 'old_tl_mbox' of github.com:OueslatiGhaith/embassy into old-tl-mbox 2023-06-12 20:26:38 -05:00
c822fd46e5 Merge pull request #1553 from henrikberg/rp_wifi_blinky
Add wifi_blinky.rs for easy beginners start.
2023-06-12 18:52:44 +00:00
35db5cf416 Spelling. 2023-06-12 20:19:33 +02:00
23724b6bf6 Code cleanup. 2023-06-12 20:19:33 +02:00
6863786243 Document external button. Add wifi_blinky.rs for easy beginners start. 2023-06-12 20:19:33 +02:00
c5a0e8579a Merge pull request #1552 from embassy-rs/log-fix
usb-logger: fix breakage in log 0.4.19
2023-06-12 16:06:50 +00:00
8d5f995a01 usb-logger: fix breakage in log 0.4.19
https://github.com/rust-lang/log/issues/567
2023-06-12 16:37:36 +02:00
bf32dc5d3a clippy 2023-06-12 15:07:46 +01:00
802416d267 fix CI for tests 2023-06-12 15:04:52 +01:00
553c934325 fix CI for tests 2023-06-12 14:54:17 +01:00
bb5ceb2d9c fix CI error 2023-06-12 14:52:14 +01:00
a1b27783a6 fix build 2023-06-12 14:44:30 +01:00
cf83f6820c Merge pull request #3 from OueslatiGhaith/master
fix merge conflicts
2023-06-12 14:28:23 +01:00
2d89cfb18f fix merge conflict 2023-06-12 14:27:53 +01:00
2dd5ce83ec stm32/ipcc: fix tl_mbox example 2023-06-12 12:31:15 +01:00
ca8957da43 stm32/ipcc: move tl_mbox into embassy-stm32-wpan 2023-06-12 12:27:51 +01:00
ab86b06050 Merge pull request #1548 from embassy-rs/crate-cleanup
Crate cleanups
2023-06-09 14:55:50 +00:00
6653f262d7 examples: use nicer InterrupExt to set irq priority in multprio. 2023-06-09 16:46:57 +02:00
98c821ac39 Remove embassy-cortex-m crate, move stuff to embassy-hal-common. 2023-06-09 16:44:20 +02:00
dc8e34420f Remove executor dep+reexports from HALs.
Closes #1547
2023-06-09 16:29:45 +02:00
479ccf17df Merge pull request #1545 from embassy-rs/fixes4
Dumb fixes.
2023-06-09 01:40:45 +00:00
d46b2b49c7 cyw43: remove pointless wait_complete. 2023-06-09 03:34:12 +02:00
3465452a93 fmt: remove unused defmt::timestamp! 2023-06-09 03:33:39 +02:00
c0331cdf89 Merge pull request #1532 from cstlaurent/stm32g4-pll
stm32/rcc: Add basic PLL support for G4 series chips
2023-06-09 01:22:31 +00:00
8ddeaddc67 Rename to follow ref manual and CubeIDE 2023-06-08 20:46:48 -04:00
0915fb73b2 Merge branch 'master' into stm32g4-pll 2023-06-08 20:43:14 -04:00
2e0bc71c86 Merge pull request #1535 from rubdos/v4-optional
Add IPv6 to Embassy net, make IPv4 optional
2023-06-08 19:13:46 +00:00
3dde01597a tests/rp: make cyw43-perf less strict. 2023-06-08 21:12:34 +02:00
4716166041 tests/rp: update cyw43-perf for embassy-net changes. 2023-06-08 20:51:36 +02:00
8a1d3d5c84 Merge branch 'main' into v4-optional 2023-06-08 19:38:15 +02:00
b68cf6c5c8 Merge pull request #1544 from embassy-rs/irq-typelevel
Rework typelevel interrupts.
2023-06-08 17:01:54 +00:00
8c93805ab5 Add rt feature to HALs, cfg out interrupt handling when not set. 2023-06-08 18:57:03 +02:00
f498c689e7 Add RTIC example. 2023-06-08 18:07:49 +02:00
5c2f02c735 Reexport NVIC_PRIO_BITS at HAL root.
This allows using RTIC with `#[rtic::app(device = embassy_nrf, ...)]`
2023-06-08 18:07:49 +02:00
bce24e8005 asdg 2023-06-08 18:07:49 +02:00
921780e6bf Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.

This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
  - It works with `cortex-m` functions for manipulating interrupts, for example.
  - It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
2023-06-08 18:00:48 +02:00
ce1d72c609 wip 2023-06-08 16:26:47 +01:00
2455fd4dbe net: Add documentation to new Config system 2023-06-07 13:18:19 +02:00
352f0b6c38 net: Support dual stack IP 2023-06-07 13:18:19 +02:00
87ad66f2b4 Merge pull request #1540 from RussHewgill/can_recv
Added can_recv for TcpSocket
2023-06-06 16:59:57 +00:00
2eb08b2dc9 updated can_recv and may_recv to match the smoltcp functions. 2023-06-06 09:49:38 -07:00
ca47af6978 CI: introduce tests for dual stack v4 and v6 2023-06-06 18:21:45 +02:00
ae1dedc059 net: proto-ipv6 in is_config_up 2023-06-06 17:58:46 +02:00
ada7ec2289 CI: add proto-ipv4 to embassy-net test 2023-06-06 17:58:46 +02:00
d2a6c5c608 CI: Add proto-ipv6 tests without ipv4 to CI 2023-06-06 17:58:46 +02:00
18578fd15f net: Allow a combined use of IPv4 and IPv6 DNS servers 2023-06-06 17:58:45 +02:00
d7f674e410 net: Allow setting an IPv6 in the stack 2023-06-06 17:58:45 +02:00
e871324bde net: StaticV4 config behind proto-ipv4 2023-06-06 17:58:45 +02:00
54bab33c73 Rename StaticConfig to StaticConfigV4 2023-06-06 17:04:21 +02:00
a9fdd468d5 Merge pull request #1538 from embassy-rs/cyw43-hil
cyw43: add perf HIL test.
2023-06-06 00:55:40 +00:00
6701606e4c cyw43: add perf HIL test. 2023-06-06 02:50:57 +02:00
79b982c941 Merge pull request #1536 from embassy-rs/rp-flash-fix
Rp flash fix
2023-06-05 22:16:44 +00:00
593fc78dd8 tests/rp: enable run-from-ram.
Otherwise the flash test is flaky because it attempts to use boot2.
2023-06-06 00:07:03 +02:00
4f03dff577 rp: add run-from-ram feature. 2023-06-06 00:06:32 +02:00
162d485304 rp/flash: centralize USE_BOOT2 in a single const. 2023-06-05 23:41:26 +02:00
70e1b976d8 rp/flash: fix missing clobbers, do not clobber frame pointer (r7). 2023-06-05 23:40:34 +02:00
adf053a935 rp/flash: unify FLASH_BASE const. 2023-06-05 22:55:15 +02:00
5ee26a5dd1 rp/dma: fix use-after-free read. 2023-06-05 22:28:14 +02:00
44624b2d7a Put proto-ipv4 behind a feature flag 2023-06-05 16:45:40 +02:00
d690a1717f Merge pull request #1530 from cumthugo/write_func_in_pipe
sync/pipe: write all user data to pipe
2023-06-05 02:48:36 +02:00
f6d75970d8 Merge pull request #1534 from ExplodingWaffle/main
Replace Into<bool> for Level with From<Level> for bool
2023-06-05 02:48:22 +02:00
a4b8fc420a Replace Into<bool> for Level with From<Level> for bool 2023-06-05 01:37:56 +01:00
4185c10bf8 Cleanup 2023-06-04 12:09:03 -04:00
ade46489f1 Added Vcore boost mode and Flash wait state 2023-06-04 11:57:42 -04:00
e83762e979 Use HSI16 for exemple since HSE might have a different value depending on board 2023-06-04 11:05:13 -04:00
6fe853a7d3 Better comments 2023-06-04 10:58:44 -04:00
24c4ea71b1 sync/pipe: write all user data to pipe
sync/pipe: add write_all function
2023-06-04 22:29:59 +08:00
675499449f Example using PLL 2023-06-03 22:10:43 -04:00
2f269f3256 stm32/rcc: Implement basic PLL support for STM32G4 series 2023-06-03 22:05:24 -04:00
f2c2536cf3 Merge pull request #1529 from sentry-sync/1528-stm32f7-usb-hs
Fix #1528 HS USB on STM32F7
2023-06-03 01:27:53 +00:00
gak
3539dd7d4c Fix #1528 HS USB on STM32F7 2023-06-03 07:00:31 +10:00
d414f4e4f7 Merge pull request #1527 from embassy-rs/rp-spi-fix
rp/spi: enable rxdmae/txdmae only once at init.
2023-06-02 02:09:04 +00:00
dd5ce985bd rp/spi: enable rxdmae/txdmae only once at init.
see https://github.com/raspberrypi/pico-sdk/blob/master/src/rp2_common/hardware_spi/spi.c#L27-L28
2023-06-02 04:05:25 +02:00
f901cf57e5 Merge pull request #1526 from embassy-rs/rp-spi-fix
rp/spi: start rx dma first.
2023-06-02 01:47:15 +00:00
fa7510968a rp/spi: start rx dma first. 2023-06-02 03:44:49 +02:00
d36feb6405 Merge pull request #1524 from embassy-rs/remove-irqs
Remove owned interrupts, PeripheralMutex.
2023-06-01 01:31:05 +00:00
404aa29289 cortex-m: remove owned interrupts. 2023-06-01 03:25:19 +02:00
2a435e53b7 cortex-m: remove PeripheralMutex. 2023-06-01 02:22:31 +02:00
c036eab62c Merge pull request #1523 from embassy-rs/static-cell
Use make_static! from static-cell v1.1
2023-05-31 23:49:00 +00:00
1d8321b821 Use make_static! from static-cell v1.1 2023-06-01 01:42:34 +02:00
d7d66bd74f Document w5500, cyw43 2023-06-01 00:15:37 +02:00
e8527bac69 Merge pull request #1522 from embassy-rs/ci-doc
Add embsasy-stm32 docs build.
2023-05-31 18:06:25 +00:00
25f367432d ci: build stm32 docs. 2023-05-31 20:04:17 +02:00
7fcded5705 stm32/rtc: fix build failure in some L4s 2023-05-31 20:03:52 +02:00
c7e6c7ed18 Merge pull request #1521 from embassy-rs/ci-doc
Move doc building to new CI.
2023-05-31 12:31:28 +00:00
046a99aba0 Move doc building to new CI. 2023-05-31 14:29:40 +02:00
35083b262b Merge branch 'main' into can 2023-05-30 21:15:26 -05:00
16bfbd4e99 stm32/can: add hw test and cleanup 2023-05-30 21:14:25 -05:00
98398d31f7 README fixes. 2023-05-31 01:12:08 +02:00
4f203ae175 Merge pull request #1520 from embassy-rs/w5500
Merge embassy-net-w5500 into main repo
2023-05-30 23:04:38 +00:00
d70994e4a8 net-w5500: integrate into main repo. 2023-05-31 01:01:30 +02:00
82d765689a Merge remote-tracking branch 'w5500/main' into w5500 2023-05-31 00:55:16 +02:00
7f0e778145 move embassy-net-w5500 to subdir. 2023-05-31 00:54:20 +02:00
3f90620343 Merge pull request #1512 from embassy-rs/cyw43
Merge cyw43 into main repo
2023-05-30 21:54:32 +00:00
3f35a8876e cyw43: adapt build to main embassy repo. 2023-05-30 23:26:29 +02:00
b3bbe5eb2d Merge remote-tracking branch 'cyw43/master' into cyw43 2023-05-30 22:43:40 +02:00
c327c6cd6f cyw43: move crate to subdir. 2023-05-30 22:42:49 +02:00
f5d0d28ac3 Merge pull request #1498 from rmja/remove-bootloader-partitions
Remove bootloader partitions
2023-05-30 20:08:01 +00:00
05688934a1 Merge pull request #1511 from Eekle/ex-debug-symbols-on-release
Add [profile.release] debug = true to all examples
2023-05-30 19:52:13 +00:00
36bd6c817e Add [profile.release] debug = true to all examples 2023-05-30 20:27:06 +02:00
c22d2b5b5b Remove unused use's 2023-05-30 14:15:52 +02:00
b703db4c09 Fix verify test 2023-05-30 14:07:35 +02:00
b527cc98af Formatting 2023-05-30 14:05:38 +02:00
36e00caf4d Align examples 2023-05-30 14:03:31 +02:00
c2aca45b8d Add offset and size accessors to Partition 2023-05-30 13:57:40 +02:00
887ecef369 Align stm32 2023-05-30 13:57:19 +02:00
24dee870a8 Align rp 2023-05-30 13:57:03 +02:00
54bbb4400d Align nrf 2023-05-30 13:56:35 +02:00
c6a984f506 Align tests 2023-05-30 13:55:49 +02:00
551f76c700 Remove legacy Partition type and use the one from embedded-hal 2023-05-30 13:44:12 +02:00
b23e40f722 Add TestFlash helper 2023-05-30 13:41:10 +02:00
1cd87f0028 Cleanup MemFlash 2023-05-30 13:40:04 +02:00
c5ec453ec1 Add bootloader helper for creating config from linkerfile symbols 2023-05-30 13:38:00 +02:00
5205b5b095 Split FirmwareUpdater into async and blocking types 2023-05-30 13:36:42 +02:00
311236e81e Merge branch 'remove-bootloader-partitions' of https://github.com/rmja/embassy into remove-bootloader-partitions 2023-05-30 13:25:09 +02:00
392ed64f6f Merge remote-tracking branch 'upstream/main' into remove-bootloader-partitions 2023-05-30 13:24:15 +02:00
f8d35806dc stm32/can: move to irq binding use embassy channel 2023-05-29 19:09:52 -05:00
1d34078fa1 Merge pull request #1508 from embassy-rs/ci-fixes
ci: run HIL tests in parallel.
2023-05-29 23:21:00 +00:00
020e956f1b ci: run HIL tests in parallel. 2023-05-30 01:10:53 +02:00
3760bdbb1b Merge pull request #1507 from embassy-rs/ci-fixes
Remove unneeded default-features=false.
2023-05-29 20:56:13 +00:00
42a5b14724 Remove unneeded default-features=false. 2023-05-29 22:50:30 +02:00
08753f74ae Merge pull request #1428 from xoviat/uart
stm32/uart: rework ringbuf
2023-05-29 20:19:35 +00:00
da0be7114f stm32/uart: fix dma ringbuf tests 2023-05-29 15:14:43 -05:00
f8a835be27 Merge pull request #1506 from embassy-rs/ci-fixes
ci: fix nrf, rp tests.
2023-05-29 20:07:28 +00:00
68441a74c2 Merge branch 'main' of https://github.com/embassy-rs/embassy into uart 2023-05-29 15:07:21 -05:00
1a31b03976 ci: fix nrf, rp tests. 2023-05-29 22:01:19 +02:00
94046f30ff Remove the usage of the local Partition type in BootLoader 2023-05-29 22:00:44 +02:00
aba0f8fd6c stm32/uart: refactor rx ringbuffer
- remove some race conditions
- allow full use of rx buffer
2023-05-29 14:49:43 -05:00
3b38079490 Merge pull request #1505 from rmja/split-firmware-updater
Split the FirmwareUpdater into blocking and async
2023-05-29 19:48:44 +00:00
c844894a6e Split the FirmwareUpdater into blocking and async 2023-05-29 21:29:13 +02:00
642eb1400b Merge pull request #1503 from embassy-rs/ci-fixes
ci: add stable build, add tests.
2023-05-29 18:09:05 +00:00
1acbc5b1a9 Remove the usage of the local Partition type in BootLoader 2023-05-29 20:07:26 +02:00
421ee4dfbf ci: add stable build, add tests. 2023-05-29 19:51:06 +02:00
46961cfdf7 Fix tests. 2023-05-29 19:46:28 +02:00
cc23129456 Merge pull request #1502 from embassy-rs/ci-fixes
CI fixes.
2023-05-29 16:55:38 +00:00
6cb6e57592 CI fixes. 2023-05-29 18:49:50 +02:00
760a32246a Merge pull request #1495 from embassy-rs/new-ci
Switch from GHA to Bender CI
2023-05-29 16:21:10 +00:00
7b2a39a6fb Switch to Bender for CI. 2023-05-29 18:15:53 +02:00
bab03a3927 Merge #1489 #1500
1489: stm32/ipcc: make IPCC methods static r=xoviat a=OueslatiGhaith



1500: stm32/tests: disable sdmmc test for now r=xoviat a=xoviat



Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-29 14:42:51 +00:00
403cbb1dc9 Merge commit '8d7abeb06fbe3e19db3cae3f5220725969ecbb81' of https://github.com/Lytehorse/embassy into can 2023-05-29 09:40:37 -05:00
bd6a1d38d2 stm32/tests: disable sdmmc test for now 2023-05-29 09:16:50 -05:00
0a136c308e Merge pull request #1496 from rmja/blocking-partition
Add BlockingPartition
2023-05-28 21:59:18 +02:00
5d7301e510 tests/stm32: revert cfg changes 2023-05-27 15:08:30 -05:00
09d52638b5 stm32/ipcc: refactor examples and tests 2023-05-27 15:05:50 -05:00
37e104a6b3 stm32/ipcc: refactor tl_mbox 2023-05-27 15:05:23 -05:00
7e501855fc stm32/ipcc: move into tl_mbox 2023-05-27 15:05:07 -05:00
c19967dcf2 stm32/ipcc: extract tl_mbox linker file to embassy-stm32 2023-05-27 15:03:25 -05:00
85ce44f78e Use RefCell in blocking mutex 2023-05-27 17:02:54 +02:00
6d8f409018 Add BlockingPartition 2023-05-27 10:29:21 +02:00
bea42a78a4 Merge pull request #1468 from rmja/assume-noise-free
Add assume_noise_free to usart configuration
2023-05-27 00:23:56 +02:00
cb5df138d6 Use found divider instead of re-reading brr 2023-05-26 23:48:49 +02:00
ef8695cecb Merge pull request #1494 from rmja/flash-partition
Create flash partition for shared flash access
2023-05-26 22:31:30 +02:00
e495473fc3 Remove runtime offset and size assertions 2023-05-26 22:07:23 +02:00
62e799da09 Create flash partition for shared flash access 2023-05-26 21:40:12 +02:00
a8b426d0fe Merge pull request #1493 from linusharberg/nrf-buffered-uarte-drop
Disable ppi group in BufferedUarte drop
2023-05-26 17:33:03 +02:00
f4736457f5 nrf/timer: use low power counter mode.
The regular one permanently requests HFCLK, while the low power one only does
so while counting, for 1 clock cycle. The regular mode is "deprecated" too.
2023-05-26 16:50:19 +02:00
f501a1ba2c Disable ppi group first to avoid BufferedUarte not getting dropped properly 2023-05-26 16:40:10 +02:00
ee20fd4c16 Merge #1492
1492: Remove ability to, during runtime, set alt layout - it does not work. r=rmja a=rmja

I wasted yesterday trying to get this to work. It seems that erase operations does not work when in db1m mode. The erase operations, both bank and sector, runs and completes without any error flags being set. It also takes expected amount of time, but the flash is not actually erased.
I found [this](https://community.st.com/s/question/0D50X00009XkWrASAV/is-it-possilbe-to-checkand-may-be-writethe-db1m-option-byte-from-the-firmware-i-am-using-an-stmf4427ig-1mb-with-double-bank-via-db1m-option-byte) on the topic, at it seems that one have to reset the mcu for the change to take effect, so it does not make any sense to have it as runtime configurable.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-26 13:58:59 +00:00
fee89ed7c7 Remove ability to set alt layout - it does not work. 2023-05-26 15:41:08 +02:00
c5c5b64729 Merge #1490
1490: sync: do will_wake check in MultiWakerRegistration. r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-26 13:35:53 +00:00
3081ecf301 sync: do will_wake check in MultiWakerRegistration. 2023-05-26 13:17:39 +02:00
66304a102d Revert "Merge branch 'tl_mbox' into ipcc"
This reverts commit 859e539f85, reversing
changes made to 984cd47b41.
2023-05-26 11:26:58 +01:00
859e539f85 Merge branch 'tl_mbox' into ipcc 2023-05-26 11:24:08 +01:00
984cd47b41 stm32/ipcc: update test 2023-05-26 10:03:01 +01:00
2ccf9f3abd stm32/ipcc: static methods for IPCC 2023-05-26 09:56:55 +01:00
31b364b9b0 Merge #1480
1480: stm32: Async flash support for F4 r=rmja a=rmja

This PR depends on https://github.com/embassy-rs/embassy/pull/1478.

It adds async write/erase operations to the F4 series based on the work in https://github.com/embassy-rs/embassy/pull/870 but aligned to the new flash regions.

If one considers the entire `Flash` then nothing has changed other than the async operations have been added.



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-26 08:21:57 +00:00
307f2365da Fix blocking example 2023-05-26 04:53:43 +02:00
d82ba4af8a WHY does format on save not work 2023-05-26 00:35:53 +02:00
35d8edbc41 nightly guard async traits only 2023-05-26 00:31:41 +02:00
9115431d35 Move nightly guard and clear data cache reset bit 2023-05-26 00:12:22 +02:00
e08267df54 Move new async to asynch module to guard for models without flash interrupt 2023-05-25 23:51:10 +02:00
74104aafda erase_sector_blocking -> blocking_erase_sector 2023-05-25 23:13:20 +02:00
4478d8322b Endless rustfmt pain 2023-05-25 22:58:13 +02:00
88543445d8 Fix end address for assertion 2023-05-25 22:52:57 +02:00
41a632a56c Formatting 2023-05-25 22:48:17 +02:00
524a89cc72 Merge #1487
1487: rp: Implement embedded_hal::serial::Write for Uart/UartTx r=Dirbaio a=Alpha-3

Uart/UartTx currently implements `embedded_hal_02::serial::Read<u8>` and `embedded_hal_02::blocking::serial::Write<u8>` but not `embedded_hal_02::serial::Write<u8>`.

This implements the missing `embedded_hal_02::serial::Write<u8>` to allow use of Uart with crates that expect this interface, such as [defmt_serial](https://docs.rs/defmt-serial/latest/defmt_serial/).

Co-authored-by: Alpha3__0 <Alpha3.0gmail.com>
2023-05-25 20:38:23 +00:00
8938d928f8 Fix examples 2023-05-25 22:36:56 +02:00
b50d04336e Fix merge error 2023-05-25 22:32:57 +02:00
ce331b411c Only assert_not_corrupted_read if we read from the second bank 2023-05-25 22:31:24 +02:00
8528455a75 Errata if _not_ pa12 out low 2023-05-25 22:20:05 +02:00
d28dc08f09 Merge #1486
1486: feature(embassy-stm32): add RTC MUX selection to embassy-stm32 L4 family r=Dirbaio a=MathiasKoch

To select and setup LSE and/or LSI

Co-authored-by: Mathias <mk@blackbird.online>
2023-05-25 20:13:27 +00:00
344e28360f More blocking rename 2023-05-25 22:09:28 +02:00
983f01016b Merge branch 'async-flash' of https://github.com/rmja/embassy into async-flash 2023-05-25 21:52:35 +02:00
9eca19b49d *_blocking -> blocking_* 2023-05-25 21:46:26 +02:00
860b519f99 Let Flash<Async/Blocking> be a thing 2023-05-25 21:40:54 +02:00
181c4c5311 Add RTC MUX selection to embassy-stm32 L4 family, to select and setup LSE and/or LSI 2023-05-25 21:28:32 +02:00
18d14dff48 Handle errata 2.2.12 2023-05-25 21:14:35 +02:00
b412784a7a Add runtime checks for errata 2.2.11 2023-05-25 20:55:12 +02:00
dc28a42fd2 Fix return definition 2023-05-25 11:55:05 -07:00
0d80a95e54 Implement eh 0.2.* serial::Write for Uart/UartTx 2023-05-25 11:33:29 -07:00
8073bf22e9 Add sector number tests 2023-05-25 20:07:43 +02:00
e764a3d9ca Fix unused errors 2023-05-25 20:07:43 +02:00
49a31bd5d8 Simplify SR->Result 2023-05-25 20:07:43 +02:00
7371eefa86 Align with new bind_interrupt 2023-05-25 20:07:42 +02:00
15636f05f5 Actually transition to dual bank mode - key was required 2023-05-25 20:07:42 +02:00
efc71e08c4 Default to Async mode 2023-05-25 20:07:42 +02:00
bac8ad565e Remove TryLockError, 2023-05-25 20:07:42 +02:00
525e065474 Align examples 2023-05-25 20:07:42 +02:00
44b6494ab7 Let FlashLayout and FlashRegion depends on a Blocking/Async mode generic 2023-05-25 20:07:42 +02:00
6df6239704 Run format with nightly 2023-05-25 20:07:42 +02:00
c6ffece410 Add more missing nightly guards 2023-05-25 20:07:41 +02:00
34a2804b54 Fix unused get_sector and ensure_sector_aligned 2023-05-25 20:07:41 +02:00
cdb1447569 Add missing nightly guards 2023-05-25 20:07:41 +02:00
7477785bbb Align examples 2023-05-25 20:07:41 +02:00
0e90e98e9b stm32: Add async flash write/erase to f4 2023-05-25 20:07:41 +02:00
f616b22159 Fix yet another v1 error 2023-05-25 18:16:46 +02:00
c5bf36eebf Fix oversampling message for usart v1 2023-05-25 17:56:52 +02:00
abbaaeee37 stm32/ipcc: support for MAC 802.15.4 2023-05-25 16:39:43 +01:00
387a4fcb8e Exclude usart_v1 2023-05-25 17:24:22 +02:00
cd6256a924 Add assume_noise_free to usart configuration
Effectively setting cr3.onebit
2023-05-25 17:24:22 +02:00
06f5c309c0 Merge #1485
1485: Align with updated stm32 metapac r=Dirbaio a=rmja

This now depends on https://github.com/embassy-rs/stm32-data/pull/192 as it seems that ppre1 is using the enum, but ppre2 does not.

Please have a good look at this. I do not have a G4 chip so I cannot verify this change.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-25 14:51:13 +00:00
a58c7b60bc Merge #1471
1471: embassy-net: Make TcpSocket::abort() async r=Dirbaio a=mkj

This lets callers ensure that the reset packet is sent to the remote host. Otherwise there isn't a way to wait for the smoltcp stack to send the reset.

Requires changes to smoltcp to wake after the reset has been sent, see https://github.com/smoltcp-rs/smoltcp/compare/master...mkj:smoltcp:abort-wake

This commit also adds a "TCP accept" demo of the problem. Without the `.await` for abort() it gets dropped before the RST packet is emitted.

Co-authored-by: Matt Johnston <matt@ucc.asn.au>
2023-05-25 14:20:04 +00:00
673396c0e7 Update metapac version again 2023-05-25 16:19:46 +02:00
963f3e3059 Align with updated stm32 metapac 2023-05-25 16:06:02 +02:00
373eb97357 Add std example of a TCP listener
This also demonstrates calling .abort() on a TCP socket and ensuring
that the reset packet is sent out.
2023-05-25 20:43:36 +08:00
b20427b2ec net: Make flush() wait for RST packets from abort()
Add docs to note that dropping a TcpSocket early will
prevent the .abort() RST from being sent.
2023-05-25 20:43:36 +08:00
c02759ad91 Fix unused errors 2023-05-25 13:59:32 +02:00
8b1eaf00a0 Simplify SR->Result 2023-05-25 13:54:40 +02:00
baf1c2efbe Align with new bind_interrupt 2023-05-25 13:42:42 +02:00
cd8198037f Actually transition to dual bank mode - key was required 2023-05-25 13:08:40 +02:00
e65ff85b88 Default to Async mode 2023-05-25 13:04:48 +02:00
9370973846 Remove TryLockError, 2023-05-25 13:04:48 +02:00
8b13a7b338 Align examples 2023-05-25 13:04:48 +02:00
dfd5603171 Let FlashLayout and FlashRegion depends on a Blocking/Async mode generic 2023-05-25 13:04:48 +02:00
966f0abf48 Run format with nightly 2023-05-25 13:04:48 +02:00
1329a387e0 Add more missing nightly guards 2023-05-25 13:04:47 +02:00
6804b6c0b4 Fix unused get_sector and ensure_sector_aligned 2023-05-25 13:04:47 +02:00
ff3a70ed9d Add missing nightly guards 2023-05-25 13:04:47 +02:00
0a26870d36 Align examples 2023-05-25 13:04:47 +02:00
b2775fc90c stm32: Add async flash write/erase to f4 2023-05-25 13:04:47 +02:00
6efcc9acaa Merge pull request #1483 from embassy-rs/remove-oidc
ci: replace openid connect with static secret.
2023-05-25 04:25:43 +02:00
2a589b7904 ci: replace openid connect with static secret.
The oidc token is only valid for 5min, builds are starting to fail because HIL tests
take more than 5 min and we only obtain it once at start.

Instead of fixing it, let's remove it. My hope for OIDC was to allow running
HIL tests on PRs from forks if the author is in a list of trusted users.
However GHA simply doesn't give the ID token to PRs from forks. 🤷
Same limitation as with static tokens. So it's useless complexity, let's kill it.
2023-05-25 03:54:49 +02:00
5f10eadb8d Merge #1475 #1478 #1482
1475: Add YieldingAsync adapter r=Dirbaio a=rmja

This PR calls `yield_now()` for long blocking `NorFlash` read and erase operations.
The motivation for this change is to allow for other tasks on the same executor to get something done between these long running operations, for example a task that feeds a watchdog. This will allow the watchdog to have a timer relative to e.g. one sector erase, instead of all sector erase.

1478: stm32: Minor fixes in flash regions for F4 dual bank layout r=Dirbaio a=rmja

This PR has the following fixes:
* Ensure that `FlashRegion` instances can only be created within the embassy-stm32 crate.
* Remove `Drop` trait for `AltFlashLayout`, as it is hard to use, as one cannot take the individual regions out from the struct. Instead of going back to single bank mode on `Drop`, we instead transition to single bank mode when calling `Flash::into_regions()`.
* Add missing `otp_region` to the dual bank layout and implement `NorFlash` for the alternate regions.

1482: Add ConcatFlash utility r=Dirbaio a=rmja

This PR adds a `ConcatFlash` utility that can be used to concatenate two `NorFlash` flashes. This is especially useful when concatenating multiple flash regions with unequal erase size.


Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-25 01:05:32 +00:00
224faccd4c Merge #1340 #1474
1340: Add I2S for f4 r=Dirbaio a=xoviat

This is only for f4, but it puts us equal to or ahead of the standard rust hal.

1474: stm32: Fix watchdog timeout computation r=Dirbaio a=rmja



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-25 00:42:10 +00:00
ce1078994d Merge #1479
1479: Move stm32 to bind_interrupts r=xoviat a=xoviat



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-24 23:47:35 +00:00
b6ba1ea53a stm32: move lora to bind_interrupts 2023-05-24 18:09:04 -05:00
316be179af stm32: move to bind_interrupts
disable lora functionality for now
2023-05-24 17:29:56 -05:00
e785e1bc22 Add ConcatFlash utility 2023-05-24 14:40:34 +02:00
3cc0ec654a Merge pull request #83 from papyDoctor/master
Update examples in README.md
2023-05-24 11:41:03 +00:00
a19f8c32ff Update examples in README.md 2023-05-24 09:22:05 +02:00
87acf5f50f Add missing set_default_layout() in "other" family 2023-05-23 23:01:55 +02:00
14e3e72b0f Add missing implementations for f4 alternate regions 2023-05-23 22:51:26 +02:00
faf506b300 Remove Drop for AltFlashLayout 2023-05-23 22:50:41 +02:00
879c621394 Ensure FlashRegion can only be created within this crate 2023-05-23 22:49:27 +02:00
627d7f66ef Merge #1477
1477: embassy-embedded-hal: Add i2c transaction to I2cDevice r=Dirbaio a=CBJamo

Not sure why this was a todo before, but this seems to be working fine in my limited testing.

Co-authored-by: Caleb Jamison <caleb@hellbender.com>
2023-05-23 09:20:44 +00:00
3ad52f837d Remove debug 2023-05-22 21:31:00 -04:00
49eaf000b8 Add i2c transaction 2023-05-22 21:26:03 -04:00
1fdde8f03f Merge #1457
1457: TL Mbox read and write for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, built upon the work done in #1405 and #1424, and was tested on an stm32wb55rg.

This pull request aims to add read and write functionality to the TL mailbox for stm32wb microcontrollers

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-23 01:15:22 +00:00
64092169e3 stm32/ipcc: disable test 2023-05-22 20:14:37 -05:00
187551f914 Move module documentation 2023-05-22 16:55:18 +02:00
cd1bf31fed Add YieldingAsync adapter 2023-05-22 16:48:31 +02:00
d54eb1107e Yield between BlockingAsync NorFlash write and erase operations 2023-05-22 15:57:20 +02:00
e9121cba2c stm32: Fix watchdog timeout computation 2023-05-22 14:22:27 +02:00
059ab358a5 stm32/ipcc: uncomment shci init cmd 2023-05-22 11:13:22 +01:00
ab7d129e15 Merge #1473
1473: Protect default implementations for FirmwareUpdater and BootLoader r=lulf a=rmja

It seems as if the arm compiler can does not care about whether the bootloader symbols are undefined if the default() function is never used. The x64 compiler does care however, so this change ensures that we can instantiate the types from tests.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-05-22 09:52:56 +00:00
12720737e1 stm32/ipcc: fix incorrect example 2023-05-22 10:52:05 +01:00
18c62aa5b4 Protect default implementations for FirmwareUpdater and BootLoader
It seems as if the arm compiler can does not care about whether the bootloader symbols are undefined if the default() function is never used. The x64 compiler does care however, so this change ensures that we can instantiate the types from tests.
2023-05-22 11:32:39 +02:00
d1dfaa1905 stm32/ipcc: fix hil test 2023-05-21 20:18:26 -05:00
1f65a4eb6f stm32/ipcc: enable test 2023-05-21 18:40:29 -05:00
eb09d7d671 stm32/ipcc: update doc 2023-05-21 18:39:13 -05:00
7f702fd6f1 stm32/ipcc: fix warnings 2023-05-20 11:29:53 -05:00
383bef1711 stm32/ipcc: naming 2023-05-20 10:24:26 -05:00
5e86188c25 stm32/ipcc: cleanup naming 2023-05-20 10:24:13 -05:00
661b1f3373 stm32/ipcc: remove constrain 2023-05-20 10:23:57 -05:00
d55b9bc6e2 Merge #1440
1440: rp: Pin fix, improve fifo handling r=Dirbaio a=CBJamo

Went to actually use this code and found two issues:
* The config for the pins got dropped in the shuffle. 
* I found that when using more than one ws2812, only the first would get data. I'm pretty sure the data was shifted out before the task got back to push the next word. So now the fifo gets filled, then we wait.

Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
Co-authored-by: Caleb Jamison <caleb@hellbender.com>
2023-05-19 20:53:26 +00:00
1ebb742fbf Switch to DMA, use new clocks, don't take ownership of pio common 2023-05-19 16:48:47 -04:00
1be6e53316 Pin fix, improve fifo handling 2023-05-19 15:06:36 -04:00
d737e3dcbb Merge pull request #1469 from embassy-rs/update-nightly
Update Rust nightly.
2023-05-19 19:01:31 +02:00
a1cbdd8d29 nrf/uarte: fix deref warning, fix errata not being applied on nrf53. 2023-05-19 18:25:34 +02:00
8b9306ed5c stm32/sdmmc: fix "drop with a value that implements Copy does nothing" warning. 2023-05-19 18:00:33 +02:00
df56f901de time: fix unused mut. 2023-05-19 17:38:57 +02:00
9f7392474b Update Rust nightly. 2023-05-19 17:12:39 +02:00
9dff6b9d81 Merge #1419
1419: stm32/pwm: improve dead-time api r=Dirbaio a=xoviat



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-19 14:41:44 +00:00
d736c9205c updated test case 2023-05-19 15:40:09 +01:00
464018e12d Merge #1463
1463: Allow for an optional user-defined entry macro when targeting RISC-V r=Dirbaio a=jessebraham

In [esp-hal](https://github.com/esp-rs/esp-hal) we use our own custom runtime crate, [esp-riscv-rt](https://github.com/esp-rs/esp-riscv-rt). This PR adds the ability to optionally specify an entry macro when using `embassy_executor::main`. The following forms are both accepted:

```rust
#[embassy_executor::main] // uses `riscv_rt::entry` by default
async fn main() {}

#[embassy_executor::main(entry = "esp_riscv_rt::entry")]
async fn main() {}
```

I attempted to get this working without needing to quote the entry macro argument, however I was not able to get this working. Based off some reading I did this may not be possible, however I am rather inexperienced with proc macros. Happy to change this if anybody has any insight.

Co-authored-by: Jesse Braham <jesse@beta7.io>
2023-05-19 14:14:08 +00:00
55e4a89819 Merge pull request #1467 from embassy-rs/stm32-usb-no-time
stm32/usb: do not require embassy-time.
2023-05-19 16:10:41 +02:00
a521a9b5ce stm32: test more feature combinations in ci. 2023-05-19 15:38:45 +02:00
f43d57846e stm32/usb: do not require embassy-time.
Fixes #1466
2023-05-19 15:20:37 +02:00
4b303949bf Merge #1465
1465: rp: continue clock rework r=Dirbaio a=pennae

vastly reduce the code size of initial clock config (over 700 bytes saved!), at the cost of about 48 bytes of ram used to store the frequencies of all clocks in the system. also stop exporting unstable pac items for clock config, fix a few settings that were out of spec, and add missing features (most notably gpin source information).

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-17 22:20:44 +00:00
fc746a88b5 rp/clocks: comment out all gpin handling for now
gpin clock sources aren't going to be very useful during cold boot and
thus require runtime clock reconfig. once we get there we can use this
for reference. or maybe we can't, only time will tell.
2023-05-17 23:25:49 +02:00
1e029a9e66 rp/clocks: remove superfluous clock actions
the rtc doesn't have to be disabled since it's always clocked from ref,
and the watchdog doesn't need to be configured twice.
2023-05-17 21:36:19 +02:00
053d5629ba rp/clocks: require GpinPin for gpin config
we'll take static ownership of an entire pin (not just a limited
reference), otherwise we cannot at all guarantee that the pin will not
be reused for something else while still in use. in theory we could
limit the liftime of this use, but that would require attaching
lifetimes to ClockConfig (and subsequently the main config), passing
those through init(), and returning an object that undoes the gpin
configuration on drop. that's a lot unnecessary support code while we
don't have runtime clock reconfig.
2023-05-17 21:36:19 +02:00
1b3d9a0aef rp/clocks: compactify pll setup
we don't need to preserve existing bits of the pll pwr register, so
let's only write and save a few instructions.
2023-05-17 21:36:19 +02:00
f79d8cb2d3 rp/clocks: store clock frequencies in ram
don't recalculate clock frequencies every time they are asked for. while
this is not very often in practice it does consume a bunch of flash
space that cannot be optimized away, and was pulled in unconditionally
previously. while we technically only need the configured rosc, xosc and
gpin frequencies it is easier to store all frequencies (and much cheaper
at runtime too).
2023-05-17 21:36:19 +02:00
0d4ab559a7 rp/clocks: fix comments and rosc defaults
if rosc really does run at 140MHz in high at div=1 then these values
were not correct and would've exceeded the chip spec. the HIL test
device seems to run fast (150MHz) so they're still not quite correct,
but rosc has high variance anyway so it's probably fine.
2023-05-17 21:36:19 +02:00
1379eb4e70 rp/clocks: handle fractional gpout dividers 2023-05-17 21:36:19 +02:00
f97b591831 rp/clocks: don't expose unstable pac items
exposing pac items kind of undermines the unstable-pac feature. directly
exposing register structure is also pretty inconvenient since the clock
switching code takes care of the src/aux difference in behavior, so a
user needn't really be forced to write down decomposed register values.
2023-05-17 21:36:19 +02:00
d97a771479 rp/clocks: remove unsupported xosc config input
the datasheet says that the xosc may be run by feeding a square wave
into the XIN pin of the chip, but requires that the oscillator be set to
pass through XIN in that case. it does not mention how, the xosc
peripheral does not seem to have any config bits that could be set to
this effect, and pico-sdk seems to have no (or at least no special)
handling for this configuration at all. it can thus be assumed to either
be not supported even by the reference sdk or to not need different
handling.
2023-05-17 19:29:26 +02:00
5bbed31513 rp/clocks: provide fbdiv, not vco_freq
solvers usually output fbdiv directly, using vco_freq to get back to
fbdiv is not all that necessary or useful. both vco_freq and fbdiv have
hidden constraints, but vco_freq is a lot less accurate because the
fbdiv value resulting from the division may be off by almost a full
ref_freq's worth of frequency.

also fixes the usb pll config, which ran the pll vco way out of (below)
spec.
2023-05-17 19:28:51 +02:00
d3494a4bdf rp/clocks: reset all plls at once
we might not configure both, so we should put the others into reset
state. leaving them fully as is might leave them running, which might
not be the goal for runtime reconfig (when it comes around). this now
mirrors how we reset all clock-using peripherals and only unreset those
that are properly clocked.
2023-05-17 18:35:58 +02:00
2f2860b096 rp/clocks: always reconfigure pll
this is only really useful for runtime *re*configuration, which we don't
currently support. even runtime reconfig probably won't need it, unless
we keep taking the sledgehammer approach of reconfiguring everything all
the time.
2023-05-17 14:45:42 +02:00
e1e87fef25 rp/clocks: always inline configure_pll
this is always advantageous, except *maybe* in O0. nothing really works
as expected in O0, so we may as well always inline for constant propagation.
2023-05-17 14:45:35 +02:00
908ec5faef Merge #1464
1464: rp: Add system reset fn via watchdog r=Dirbaio a=kalkyl



Co-authored-by: kalkyl <henrik.alser@me.com>
2023-05-16 22:20:40 +00:00
a4772c15c0 rp: Add system reset fn via watchdog 2023-05-17 00:16:36 +02:00
4e9ed223a9 Allow for an optional user-defined entry macro when targeting RISC-V 2023-05-16 09:37:25 -07:00
56f2e0c9a0 Merge #1462
1462: rp: Read flash unique id and jedec id r=Dirbaio a=kalkyl



Co-authored-by: kalkyl <henrik.alser@me.com>
2023-05-16 09:36:06 +00:00
b950d6d72b Add HIL test 2023-05-16 11:28:35 +02:00
ab63f3832f rp: Read flash unique id and jedec id 2023-05-16 11:21:17 +02:00
b0541c01be Merge #1460
1460: rp/multicore: ensure stack is 8-byte aligned. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-15 23:49:11 +00:00
56c3a949af rp/multicore: ensure stack is 8-byte aligned. 2023-05-16 01:42:35 +02:00
34a0c2172b Merge #1459
1459: rp/multicore: fix undefined behavior in multicore spawn. r=Dirbaio a=Dirbaio

It is UB to pass `entry` to core1 as `&mut`, because core0 keeps an aliasing pointer to that memory region, and actually writes to it (when `spawn_core1` returns, the stack frame gets deallocated and the memory gets reused). This violates noalias requirements.

Added the fence just in case, een though it works without.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-15 23:26:58 +00:00
0c18a13cc0 rp/multicore: fix undefined behavior in multicore spawn.
It is UB to pass `entry` to core1 as `&mut`, because core0 keeps
an aliasing pointer to that memory region, and actually writes to
it (when `spawn_core1` returns, the stack frame gets deallocated and the memory
gets reused). This violates noalias requirements.

Added the fence just in case, een though it works without.
2023-05-16 01:21:28 +02:00
1a87f7477a Merge #1458
1458: rp: remove take!, add bind_interrupts! r=Dirbaio a=pennae

both of the uart interrupts now check a flag that only the dma rx path ever sets (and now unsets again on drop) to return early if it's not as they expect. this is ... not our preferred solution, but if bind_interrupts *must* allow mutiple handlers to be specified then this is the only way we can think of that doesn't break uarts.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-15 15:59:30 +00:00
14a5d03af2 rp: remove take!, add bind_interrupts! 2023-05-15 15:24:56 +02:00
a8953b5c66 cleanup 2023-05-15 10:34:52 +01:00
d97724cca3 tl_mbox read and write 2023-05-15 10:25:02 +01:00
2bf2e54db9 Merge #1456
1456: net: do not use smoltcp Instant/Duration in public API, docs. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-14 22:57:38 +00:00
288309b9d5 net-driver: document crate. 2023-05-15 00:56:59 +02:00
d07821d851 net: document crate. 2023-05-15 00:56:09 +02:00
62857bdb2d net: reexport UDP PacketMetadata under the udp module. 2023-05-15 00:55:34 +02:00
26d7610554 net: do not use smoltcp Instant/Duration in public API. 2023-05-15 00:53:30 +02:00
6e93d193cf Merge #1451
1451: Work around xtensa deadlock, take 2 r=Dirbaio a=bugadani

This PR is another go at trying to do something with #1449. The commit was part of the previous attempt but mistakenly discarded as I still experienced lockups. However, after further testing, it looks like that lockup is caused by something else.

This is a manual, "cpu-local" critical section impl that should be good enough on dual-core CPUs, although the implementation still contains `SIGNAL_WORK_THREAD_MODE` which is absolutely not correct on dual-core. This approach was chosen because:
 - not taking the global lock technically allows the second core to run
 - wrapping the signal read and the sleep in a critical section prevents a race condition that would cause the CPU to sleep longer than ideal if an interrupt hits after reading, but before sleeping.

Co-authored-by: Dániel Buga <bugadani@gmail.com>
2023-05-14 22:20:15 +00:00
4567eff78e Merge #1455
1455: Remove unused `feature(type_alias_impl_trait)`. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-14 21:57:51 +00:00
2d65373f63 Remove unused feature(type_alias_impl_trait). 2023-05-14 23:44:53 +02:00
ae4827587c Merge #1454
1454: stm32f0 flash implementation r=Dirbaio a=jp99

i've copied and modified the f3 implementation and it seems to be working.


Co-authored-by: Jaap Prickartz <jaap@tetra.nl>
2023-05-14 21:39:55 +00:00
a3d6aa5d7d Merge pull request #79 from embassy-rs/update-embassy
Update Embassy, to new PIO API.
2023-05-14 21:08:37 +00:00
db907a914c cyw43-pio: add overclock feature flag. 2023-05-14 23:02:49 +02:00
cdd326284a Merge #1453
1453: stm32 uart: Fix error flag handling for blocking operations r=Dirbaio a=timokroeger

Clear and report the error flags one by one and pop the data byte only after all error flags were handled.

For v1/v2 we emulate the v3/v4 behaviour by buffering the status register because a read to the data register clears all flags at once which means we might loose all but the first error.

Only tested on stm32f3 discovery board with loopback. Let‘s see what CI says for the other families.
Fixes #1452 

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-05-14 20:20:45 +00:00
3e9d5978c0 stm32 uart: Add a test for blocking RX overflow 2023-05-14 22:03:06 +02:00
ec7a4fd9cc stm32f0 flash implementation 2023-05-14 21:57:31 +02:00
977a7906e4 stm32 uart: Fix error flag handling for blocking operations
Clear and report the error flags one by one and pop the data byte only
after all error flags were handled.

For v1/v2 we emulate the v3/v4 behaviour by buffering the status
register because a read to the data register clears all flags at once
which means we might loose all but the first error.
2023-05-14 21:10:37 +02:00
7cfce05bd2 Merge pull request #81 from mkj/powersave-none
Fix PowerManagementMode::None
2023-05-14 15:26:48 +00:00
f46e0eb5f2 Fix PowerManagementMode::None
Mode was being set to 2 (PM2_POWERSAVE_MODE), should be
0 (NO_POWERSAVE_MODE). Setting None mode failed with a panic:

85.707099 DEBUG set pm2_sleep_ret = [00, 00, 00, 00]
└─ cyw43::control::{impl#0}::set_iovar_v::{async_fn#0} @ cyw43/src/fmt.rs:127
85.710469 ERROR panicked at 'IOCTL error -29'
2023-05-14 22:48:04 +08:00
5fe36b6bb0 Work around xtensa deadlock, take 2 2023-05-13 15:04:02 +02:00
6c1137177f Wait until there's enough space in tx buffer, remove busy wait for completed send 2023-05-13 06:34:03 +02:00
8800caa216 Update Embassy, to new PIO API. 2023-05-13 02:58:42 +02:00
82f7e104d9 Merge #1448
1448: rp: don't use SetConfig trait in PWM and PIO. r=Dirbaio a=Dirbaio

It was intended to allow changing baudrate on shared spi/i2c. There's no advantage in using it for PWM or PIO, and makes it less usable because you have to have `embassy-embedded-hal` as a dep to use it.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-13 00:14:50 +00:00
2fcdfc4876 rp: don't use SetConfig trait in PWM and PIO.
It was intended to allow changing baudrate on shared spi/i2c. There's no
advantage in using it for PWM or PIO, and makes it less usable because you have to
have `embassy-embedded-hal` as a dep to use it.
2023-05-13 02:13:26 +02:00
dec75474d5 Merge #1447
1447: rp/watchdog: fix overflow if period is longer than 4294 seconds. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-12 22:33:59 +00:00
3edd81a94e rp/watchdog: fix overflow if period is longer than 4294 seconds. 2023-05-13 00:33:00 +02:00
3810fe6a20 tl_mbox: added zigee, lld tests and ble lld tables to ref table 2023-05-12 10:26:46 +01:00
7f96359804 Merge #1424
1424: add TL maibox for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, build upon the work done in #1405, and was tested on an stm32wb55rg.

This pull request aims to add the transport layer mailbox for stm32wb microcontrollers. For now it's only capable of initializing it and getting the firmware information

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-11 22:48:55 +00:00
bf45b1d83d fix memory.x 2023-05-11 17:23:18 -05:00
d7262f9849 rustfmt 2023-05-11 16:53:55 -05:00
8a620fd59c stm32/ble: fix tests and add instructions to run example 2023-05-11 16:45:42 -05:00
bbd687fcb0 Update embassy 2023-05-10 02:40:41 +02:00
7b83d53bbf vscode settings 2023-05-10 02:25:18 +02:00
adefa4f86b vscode settings 2023-05-10 02:23:54 +02:00
e179e7cf85 Merge #1436
1436: rp: Clock configuration r=CBJamo a=CBJamo

Draft of a more complete clock config for the 2040.

I also extended and made public the clk_<name>_freq functions. I know at least the ws2812 pio example would like to get the sys clock at runtime rather than just using a constant. I suspect most pio-based peripherals will want access to the clocks.

Open questions:

1. Best way to handle the 3 external clock frequencies. I think the XIN (aka crystal) freq should just be set by the init function then never changed, though if it's an external clock that could change? I'm not sure anyone would ever want to do that but maybe it should be handled just in case? The other two should probably be set by the application.
2. Better estimation of ROSC frequency. Right now it's really just a lookup table of the speed from the single sample I did this testing on, and only uses the frequency range and div, drive strength is ignored.
3. Probably some kind of warning should be generated if the random bit from the rosc won't be useful, not sure how to do that.
4. Should clocks only be allowed to be configured at init, or should they be modifiable at runtime? For example, switching the RTC to a clock in pin when a pps source is available.

Bonus feature to support clock output. I only implemented the bare minimum, and only for gpout0. I'm sure there's a clean way with macros to impl all 4 without just copy/paste, but I haven't learned macros yet.

Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
2023-05-09 21:56:43 +00:00
9d971e5b15 Merge branch 'master' into master 2023-05-09 17:55:27 -04:00
5cfe1a1fb4 Dirbaio comments round 2 2023-05-09 17:45:24 -04:00
856b944eaf Merge #1439
1439: rp: use rp2040-boot2 to provide the boot2 blob r=Dirbaio a=pennae

we're currently shipping an old boot2 that runs the flash at half speed. use the more recent version instead, and allow user to choose between the different supported boot2 versions for different flash chips if they need that.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-09 16:39:13 +00:00
0e3cd87a32 rp: use rp2040-boot2 to provide the boot2 blob
we're currently shipping an old boot2 that runs the flash at half speed.
use the more recent version instead, and allow user to choose between
the different supported boot2 versions for different flash chips if they
need that.
2023-05-09 18:36:17 +02:00
6bea078487 Remove patches, bump rp-pac version 2023-05-09 12:20:23 -04:00
5015c845c5 Improve gpout example, clk_gpout_freq 2023-05-09 12:10:24 -04:00
c1eaad41f3 Gpout cleanup, basic Gpin support
Requires rp-pac #3
2023-05-09 11:46:25 -04:00
d40589f082 Fix CI 2023-05-09 02:27:28 +02:00
9d018a0075 Add CI 2023-05-09 02:24:25 +02:00
fdc87a8e7f Add CI 2023-05-09 02:21:17 +02:00
72b0379125 🌈 2023-05-09 01:51:08 +02:00
14eecf2fc4 Address Dirbaio comments
Gpout still incomplete.
2023-05-08 19:13:50 -04:00
0b4b87e344 Merge #1437 #1438
1437: Fix some typos r=Dirbaio a=striezel

This pull request fixes some typos, no functional changes intended.

1438: Update GitHub Actions CI r=Dirbaio a=striezel

The following updates are performed:
* update [`actions/cache`](https://github.com/actions/cache) to v3
* update [`actions/checkout`](https://github.com/actions/checkout) to v3

Still using the outdated actions will generate several warnings in CI runs, for example in https://github.com/embassy-rs/embassy/actions/runs/4917900672:

> Node.js 12 actions are deprecated. Please update the following actions to use Node.js 16: actions/checkout@v2, actions/cache@v2. For more information see: https://github.blog/changelog/2022-09-22-github-actions-all-actions-will-begin-running-on-node16-instead-of-node12/.

The PR will get rid of those warnings.

Co-authored-by: Dirk Stolle <striezel-dev@web.de>
2023-05-08 21:38:30 +00:00
5df263db38 Update GitHub Actions CI
The following updates are performed:
* update actions/cache to v3
* update actions/checkout to v3
2023-05-08 23:28:01 +02:00
0584312ef0 Fix some typos 2023-05-08 23:25:01 +02:00
6b5d9642d5 Rename BCD -> BDC. That's what Broadcom calls it. Still no idea what it means. 2023-05-08 22:01:44 +02:00
881e9d07d2 Fix missing padding in tx. Makes max-sized packets not get dropped 2023-05-08 21:53:03 +02:00
a7dee5b65c Change all logging level to debug. 2023-05-08 21:53:03 +02:00
d3d424dad3 remove comment. 2023-05-08 21:53:03 +02:00
008b1fd30c update defmt to 0.3.4, now that probe-run is fixed. 2023-05-08 21:53:03 +02:00
d0703f83db Merge #1435
1435: Added example for multi priority executors rp2040 r=Dirbaio a=fakusb

I added an example for multiple priorities of tasks on rp2040 by adjusting [examples/nrf52840/src/bin/multiprio.rs](https://github.com/embassy-rs/embassy/blob/master/examples/nrf52840/src/bin/multiprio.rs) .

This needs https://github.com/embassy-rs/rp-pac/pull/2 , and this commit also adds the 6 new interrupt handlers for software interrupts to embassy-rs.

We might need to change the git path for rp-pac in [embassy-rp/Cargo.toml](https://github.com/embassy-rs/embassy/compare/master...fakusb:rp2040-multiprio-executor?expand=1#diff-47463ea358745927ecdb686f52feab816fde5d402a9628a136c116f34a802ab0)

Closes #1413

Co-authored-by: Fabian Kunze <fkunze@fkunze.de>
2023-05-08 16:59:07 +00:00
2910b09cba bumped rp-pac version 2023-05-08 17:55:53 +02:00
59132514cf Add missing functions, Cleanup, Gpout example 2023-05-08 09:45:54 -04:00
1a96eae22c rp clock configuration 2023-05-08 09:45:54 -04:00
79c60f4a7d Merge #1434
1434: rp pio IV (the voyage home) r=Dirbaio a=pennae

this should hopefully be the last entry in this series. after this we'll have a reasonably safe interface to pio, both for configuration and at runtime. pio now looks very much like the other peripherals (though not exactly, seeing how state machines can't be constructed from a config but only have it applied to them later). the generated code for `StateMachine::set_config` is still larger than we'd like (almost 300 bytes at Oz), but it's a great step up in safety from the previous interface at approximately the same code space cost.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-08 09:17:51 +00:00
fb2d5b484a changed relative cargo.toml dependency to github revision 2023-05-07 01:24:59 +02:00
87795cbca8 added example multi priority executors rp2040 2023-05-07 01:00:13 +02:00
db9b8eb88f rp/pio: make sure gpio() asserts are compiled out
we'll have to touch pio one way or other if the number of gpio pins ever
increases. may as well make sure an assert never fires until that happens.
2023-05-06 21:14:00 +02:00
b38d496d51 rp/pio: allow wrap-around program loading
execution wraps around after the end of instruction memory and wrapping
works with this, so we may as well allow program loading across this
boundary. could be useful for reusing chunks of instruction memory.
2023-05-06 21:08:20 +02:00
374c7513f9 rp/pio: mark exec_instr as unsafe
because it most definitely is.
2023-05-06 17:24:06 +02:00
bdcea84ca1 rp/pio: add sm batch operations
sometimes state machines need to be started, restarted, or synchronized
at exactly the same time. the current interface does not allow this but
the hardware does, so let's expose that.
2023-05-06 17:23:41 +02:00
8e4d65e163 rp/pio: configure state machines with Config struct
the many individual sets aren't very efficient, and almost no checks
were done to ensure that the configuration written to the hardware was
actually valid. this adresses both of these.
2023-05-06 17:23:41 +02:00
2873cb93ee rp/pio: mark pio_instr_util unsafe
none of these are safe. the x/y functions mangle the fifos, the set
functions require the state machine to be stopped to be in any way safe,
the out functions do both of those things at once. only the jump
instruction is marginally safe, but running this on an active program is
bound to cause problems.
2023-05-06 11:52:25 +02:00
37b460637d rp/pio: add set-pin-{values,dirs} convenience functions
these are needed a lot during state machine setup, it makes sense to
provide convenience functions for them.
2023-05-06 11:52:25 +02:00
41ec4170a5 rp/pio: add load_program, use_program
programs contain information we could pull from them directly and use to
validate other configuration of the state machine instead of asking the
user to pull them out and hand them to us bit by bit. unfortunately
programs do not specify how many in or out bits they use, so we can only
handle side-set and wrapping jumps like this. it's still something though.
2023-05-06 11:44:04 +02:00
a9c7263ba0 Merge #1432
1432: Support PLLXTPRE switch. r=Dirbaio a=MrOscarLoplate

See figure 2. Clock tree page 12 DS5319 Rev 18
https://www.st.com/resource/en/datasheet/stm32f103cb.pdf

Co-authored-by: Marco Pastrello <marco.pastrello@gmail.com>
2023-05-05 17:09:26 +00:00
5f7ef8bed0 rp/pio: only clear diag bits if they're set
otherwise we may lose a bit being raised after it was read, but before
it was cleared.
2023-05-05 19:08:16 +02:00
ed843b519b rp/pio: tighten variance of particle structs
all of these exist in 1:1 correspondence to their parent hal objects, so
let's make all of their lifetimes invariant.
2023-05-05 19:08:16 +02:00
09f078a1cc rp/pio: remove critical section in IrqFuture::poll
there's nothing this critical section protects against. both read and
write-to-clear are atomic and don't interfere with other irq futures,
only potentially with setting/clearing an irq flag from an arm core.
neither have ever been synchronized, and both have the same observable
effects under atomic writes and critical sections. (for both setting and
clearing an irq flag observable differences could only happen if the
set/clear happened after the poll read, but before the write. if it's a
clear we observe the same effects as sequencing the clear entirely after
the poll, and if it's a set we observe the same effects as sequencing
the set entirely before the poll)
2023-05-05 19:08:16 +02:00
8ebe6e5f20 rp/pio: drop Pio prefix from almost all names
it's only any good for PioPin because there it follows a pattern of gpio
pin alternate functions being named like that, everything else can just
as well be referred to as `pio::Thing`
2023-05-05 19:08:16 +02:00
db2bc8783e Improve readability 2023-05-05 19:04:58 +02:00
705270faae Merge pull request #77 from kbleeke/join-error-handling
simple a simple Error type for join instead of looping internally
2023-05-04 22:21:16 +00:00
c37f86ff1c removes unecessary braces 2023-05-05 00:12:32 +02:00
2dcbe75cca beautify 2023-05-04 23:51:42 +02:00
5158014f3f PPLXTPRE is a bool.
This flag for example permits the following clock tree
configuration on stm32f103r8

    let mut config = Config::default();
    config.rcc.hse = Some(Hertz(16_000_000));
    config.rcc.sys_ck = Some(Hertz(72_000_000));
    config.rcc.pclk1 = Some(Hertz(36_000_000));
    config.rcc.pclk2 = Some(Hertz(72_000_000));
    config.rcc.pllxtpre = true;

Init fails if pllxtpre is false.
2023-05-04 22:59:52 +02:00
4439031d43 lora: fix docs build. 2023-05-04 22:39:37 +02:00
067f1382e4 Merge #1429
1429: rp pio, √9 r=Dirbaio a=pennae

another mix of refactoring and soundness issues. most notably pio pins are now checked for being actually accessible to the pio blocks, are constructible from not just the owned peripherals but refs as well, and have their registrations to the pio block reverted once all state machines and the common block has been dropped.

state machines are now also stopped when dropped, and concurrent rx+tx using dma can finally be done in a sound manner. previously it was possible to do, but allowed users to start two concurrent transfers to the same fifo using different dma channels, which obviously would not have the expected results on average.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-04 20:04:11 +00:00
1cc61dc68a Support PLLXTPRE switch.
See figure 2. Clock tree page 12 DS5319 Rev 18
https://www.st.com/resource/en/datasheet/stm32f103cb.pdf
2023-05-04 21:32:37 +02:00
0d8d8d3320 simple error handling for join instead of looping internally 2023-05-04 20:23:02 +02:00
72e36d8997 Merge #1431
1431: Simplify SUBGHZSPI configuration r=Dirbaio a=ceekdee

Determine SUBGHZSPI PCLK3 within new_subghz(), controlled by the stm32wl feature.

Co-authored-by: ceekdee <taigatensor@gmail.com>
2023-05-04 14:57:00 +00:00
91612b7446 Simplify SUBGHZSPI configuration. 2023-05-04 09:45:18 -05:00
007f452927 removed hardcoded addresses in memory.x 2023-05-04 11:02:17 +01:00
3e728d5e73 Merge branch 'tl_mbox' of https://github.com/OueslatiGhaith/embassy into tl_mbox
merge
2023-05-04 09:36:00 +01:00
b1ef856242 Merge #1430
1430: Handle SUBGHZSPI as async r=lulf a=ceekdee

For STM32WL, simplify configuration for the use of SUBGHZSPI to perform LoRa operations.  Use Rx/Tx DMA on SPI to enable async functionality.

Co-authored-by: ceekdee <taigatensor@gmail.com>
Co-authored-by: Chuck Davis <taigatensor@gmail.com>
2023-05-04 07:19:20 +00:00
91d1fff4ed Merge branch 'embassy-rs:master' into master 2023-05-03 21:07:28 -05:00
629e0ea595 Handle SUBGHZSPI as async. 2023-05-03 21:05:47 -05:00
02d6e0d14d stm32/i2s: add module and example for f4 2023-05-03 18:17:57 -05:00
7750ea65ba rustfmt 2023-05-03 18:14:42 -05:00
a0b1299890 stm32/tests: add hil test for ble 2023-05-03 17:36:31 -05:00
733b83e44f Merge pull request #76 from kbleeke/ioctl-response-logging
cleanup ioctl response logging
2023-05-03 18:21:35 +00:00
8dbe397f99 cleanup ioctl response logging 2023-05-03 20:15:43 +02:00
c44c108db5 rp/pio: wrap sm rx, tx in structs and allow splitting
this *finally* allows sound implementions of bidirectional transfers
without blocking. the futures previously allowed only a single direction
to be active at any given time, and the dma transfers didn't take a
mutable reference and were thus unsound.
2023-05-03 13:00:52 +02:00
77f7830da3 rp/pio: move irq flag handling to own struct
this way we can share irq handling between state machines and common
without having to duplicate the methods. it also lets us give irq flag
access to places without having to dedicate a state machine or the
common instance to those places, which can be very useful to eg trigger
an event and wait for a confirmation using an irq wait object.
2023-05-03 13:00:08 +02:00
909a5fe2e5 rp/pio: split irqs from state machines
we can only have one active waiter for any given irq at any given time.
allowing waits for irqs on state machines bypasses this limitation and
causes lost events for all but the latest waiter for a given irq.
splitting this out also allows us to signal from state machines to other
parts of the application without monopolizing state machine access for
the irq wait, as would be necessary to make irq waiting sound.
2023-05-03 12:57:21 +02:00
0997021a05 fixed ble table cmd buffer being constant 2023-05-03 11:11:51 +01:00
486fe9e59d rp/pio: remove PioStateMachineInstance
move all methods into PioStateMachine instead. the huge trait wasn't
object-safe and thus didn't have any benefits whatsoever except for
making it *slightly* easier to write bounds for passing around state
machines. that would be much better solved with generics-less instances.
2023-05-03 11:25:58 +02:00
906d2b2db7 rp/pio: PioStateMachine{Instance, => ,Instance}
next step: get rid of the insance trait entirely
2023-05-03 11:25:58 +02:00
79985f0036 rp/pio: hide pio/sm numbers
nothing should care which number pio it is running on, and the state
machine index could always be extracted from type information.
2023-05-03 11:25:58 +02:00
6ad58f428a rp/pio: wrap PioPins from ref, like everything else
also store peripheral refs instead of a raw pin/bank number, like
everything else.
2023-05-03 11:25:53 +02:00
4ccb2bc95a rp/pio: add PioPin trait
pio can only access pins in bank 0, so it doesn't make sense to even
allow wrapping of other banks' pins.
2023-05-03 11:25:43 +02:00
17e78175a6 rp/pio: disable state machines on drop 2023-05-03 11:25:32 +02:00
62841dd5b9 rp/pio: revert pio pin funcsel to null on pio+sms drop
once all sharing owners of pio pins have been dropped we should reset
the pin for use by other hal objects. unfortunately this needs an atomic
state per pio block because PioCommon and all of the state machines
really do share ownership of any wrapped pins. only PioCommon can create
them, but all state machines can keep them alive. since state machines
can be moved to core1 we can't do reference counting in relaxed mode,
but we *can* do relaxed pin accounting (since only common and the final
drop can modify this).
2023-05-03 11:25:28 +02:00
1e8da91def rp/pio: make free_instr unsafe
we can't prove that some instruction memory is not used as long as state
machines are alive, and we can pass instance memory handles between
instances as well. mark free_instr unsafe, with documentation for this caveat.
2023-05-03 08:53:34 +02:00
374c92a4f0 Merge #1420
1420: stm32/usart: add OVER8 and PRESC, add baudrate test. r=Dirbaio a=Dirbaio

Fixes #1183 
Fixes #1418 

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-02 20:14:12 +00:00
433422b9f2 stm32/test: remove adsfa 2023-05-02 22:13:38 +02:00
a85b34c1fe stm32/test: F1 no longer fits in RAM. 2023-05-02 22:13:38 +02:00
1078f6f4e7 stm32/test: workaround #1426 2023-05-02 22:13:38 +02:00
2bb6e93e86 stm32/usart: add baudrate calc test. 2023-05-02 20:10:09 +02:00
2afa08c923 Merge #1425
1425: rp pio, round 2 r=Dirbaio a=pennae

another round of bugfixes for pio, and some refactoring. in the end we'd like to make pio look like all the other modules and not expose traits that provide all the methods of a type, but put them onto the type itself. traits only make much sense, even if we added an AnyPio and merged the types for the member state machines (at the cost of at least a u8 per member of Pio).

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-02 18:03:00 +00:00
a61701b756 stm32/usart: add OVER8 and PRESC support, update PAC 2023-05-02 19:36:00 +02:00
7a36072a15 rp/pio: drop SmInstance{,Base}
these are just overly convoluted ways of writing down numbers.
2023-05-02 18:01:18 +02:00
a167c77d39 rp/pio: make PioCommon a struct
the PioCommon trait does not serve much of a purpose; there can be only
two implementations and they only differ in a few associated constants.
2023-05-02 18:01:18 +02:00
8839f3f62a rp/pio: PioInstance::split -> Pio::new
not requiring a PioInstance for splitting lets us split from a
PeripheralRef or borrowed PIO as well, mirroring every other peripheral
in embassy_rp. pio pins still have to be constructed from owned pin
instances for now.
2023-05-02 15:52:50 +02:00
ac111f40d8 rp/pio: fix PioPin::set_pull, set_schmitt comment 2023-05-02 15:46:22 +02:00
3229b5e809 rp/pio: remove PioPeripheral
merge into PioInstance instead. PioPeripheral was mostly a wrapper
around PioInstance anyway, and the way the wrapping was done required
PioInstanceBase<N> types where PIO{N} could've been used instead.
2023-05-02 15:46:21 +02:00
0c07eef3a9 Merge branch 'tl_mbox' of https://github.com/OueslatiGhaith/embassy into tl_mbox
merge
2023-05-02 14:18:39 +01:00
371a80e1a2 whoops, plugin formatted Cargo.toml, reverting 2023-05-02 14:16:59 +01:00
b2047c4351 Merge #1423
1423: rp: fix gpio InputFuture and inefficiencies r=pennae a=pennae

InputFuture could not wait for edges without breaking due to a broken From impl, but even if the impl had been correct it would not have worked correctly because raw edge interrupts are sticky and must be cleared from software. also replace critical sections with atomic accesses, and do nvic setup only once.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-02 12:56:51 +00:00
849011b826 rp/gpio: set up gpio interrupts only once
doing this setup work repeatedly, on every wait, is unnecessary. with
nothing ever disabling the interrupt it is sufficient to enable it once
during device init and never touch it again.
2023-05-02 14:28:27 +02:00
6cec6fa09b rp/pio: don't use modify on shared registers
pio control registers are notionally shared between state machines as
well. state machine operations that change these registers must use
atomic accesses (or critical sections, which would be overkill).

notably PioPin::set_input_sync_bypass was even wrong, enabling the
bypass on a pin requires the corresponding bit to be set (not cleared).
the PioCommon function got it right.
2023-05-02 13:44:24 +02:00
0d224a00e1 rp/pio: avoid sm(SM_NO) indexing
accessing the current state machine is an extremely common operation
that shouldn't have its specifics repeated myriad times.
2023-05-02 13:44:24 +02:00
47ae9b7981 rp/pio: add funcsel values to PioInstance
makes code setting funcsels easier to read and should make it easier to
hook up more pio blocks, should they ever appear
2023-05-02 13:44:24 +02:00
8e22d57447 rp/pio: add hd44780 example
add an hd44780 example for pio. hd44780 with busy polling is a pretty
complicated protocol if the busy polling is to be done by the
peripheral, and this example exercises many pio features that we don't
have good examples for yet.
2023-05-02 13:44:24 +02:00
0107f83b53 Merge branch 'embassy-rs:master' into tl_mbox 2023-05-02 12:25:43 +01:00
bab30a7e87 added TL Mailbox initialization for STM32WB 2023-05-02 12:16:48 +01:00
5f99ccf54c Merge #1422
1422: rp: remove leftovers from #1414 r=Dirbaio a=pennae

forgot to remove these when they were no longer necessary or useful. oops.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-02 10:07:32 +00:00
54e695b1b2 rp/pio: fix dma
fixing the dma word size to 32 makes it impossible to implement any
peripheral that takes its data in smaller chunks, eg uart, spi, i2c,
ws2812, the list goes on.

compiler barriers were also not set correctly; we need a SeqCst barrier
before starting a transfer as well to avoid reordering of accesses into
a buffer after dma has started.
2023-05-02 10:56:37 +02:00
8fc92fdf62 rp/gpio: drop critical_section use
we don't need critical sections if we just use atomic access aliases.
2023-05-02 08:43:04 +02:00
c6424fdc11 gp/gpio: fix InputFuture edge waits
InputFuture did not use and check edge interrupts correctly.
InterruptTrigger should've checked for not 1,2,3,4 but 1,2,4,8 since the
inte fields are bitmasks, and not clearing INTR would have repeatedly
triggered edge interrupts early.
2023-05-02 08:43:04 +02:00
3c31236c10 rp: remove leftovers from #1414
forgot to remove these when they were no longer necessary or useful. oops.
2023-05-02 07:40:12 +02:00
cd88e39f5f stm32/pwm: improve dead-time api 2023-05-01 16:42:03 -05:00
6096f0cf4b Merge #1404
1404: feat(stm32): Add DMA based, ring-buffer based rx uart, v3 r=Dirbaio a=rmja

This PR replaces #1150. Comparing to that PR, this one has the following changes:

* The implementation now aligns with the new stm32 dma module, thanks `@Dirbaio!`
* Calls to `read()` now returns on either 1) idle line, or 2) ring buffer is at most half full. This is different from the previous pr, which would return a lot of 1 byte reads. Thank you `@chemicstry` for making me realize that it was actually not what I wanted. This is accomplished using half-transfer completed and full-transfer completed interrupts. Both seems to be supported on both dma and bdma.

The implementation still have the issue mentioned here: https://github.com/embassy-rs/embassy/pull/1150#discussion_r1094627035

Regarding the todos here: https://github.com/embassy-rs/embassy/pull/1150#issuecomment-1513905925. I have removed the exposure of ndtr from `dma::RingBuffer` to the uart so that the uart now simply calls `ringbuf::reload_position()` to align the position within the ring buffer to that of the actual running dma controller. BDMA and GPDMA is not implemented. I do not have any chips with those dma controllers, so maybe someone else should to this so that it can be tested.

The `saturate_serial` test utility inside `tests/utils` has an `--idles` switch which can be used to saturate the uart from a pc, but with random idles.

Because embassy-stm32 now can have tests, we should probably run them in ci. I do this locally to test the DmaRingBuffer:  `cargo test --no-default-features --features stm32f429ig`.

cc `@chemicstry` `@Dirbaio` 


Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-05-01 21:36:10 +00:00
a1d45303c3 stm32/test: fix race condition in uart_dma. 2023-05-01 23:20:51 +02:00
7601779693 stm32/test: cleanup ringbuffer test, exit on success (transferring 100kb) 2023-05-01 23:20:51 +02:00
1806422763 stm32/test: add real defmt timestamp 2023-05-01 23:20:51 +02:00
00cde67abe stm32/dma: solve overlapping impl on DmaCtrl on stm32h7 2023-05-01 23:20:51 +02:00
96e8a7ddb9 stm32/uart: feature-gate ringbuffer out when using gpdma, not supported yet. 2023-05-01 22:43:23 +02:00
25864ae4dc stm32/bdma: add ringbuffer support. 2023-05-01 22:42:36 +02:00
14e0090cb1 stm32/dma: remove separate process_tcif. 2023-05-01 22:42:36 +02:00
45843034ec Actually clear idle flag 2023-05-01 22:42:36 +02:00
7757405908 Remove unused import 2023-05-01 22:42:36 +02:00
fc268df6f5 Support overflow detection for more than one ring-period 2023-05-01 22:42:36 +02:00
4ea6662e55 Do not disable dma request when idle line is detected 2023-05-01 22:42:36 +02:00
49455792cb Ring-buffered uart rx with one-period overrun detection 2023-05-01 22:42:36 +02:00
855c0d1423 Merge #1376
1376: rtc: cleanup and consolidate r=Dirbaio a=xoviat

This removes an extra file that I left in, adds an example, and consolidates the files into one 'v2' file.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-01 19:32:06 +00:00
6ee45f5ec0 Update README.md 2023-05-01 18:47:09 +02:00
1296817f7b Merge pull request #74 from tana/ap-mode-example
Add AP mode example
2023-05-01 16:38:42 +00:00
534cf7c618 Add AP mode example 2023-05-02 01:30:08 +09:00
05c36e05f9 Merge #1414
1414: rp: report errors from buffered and dma uart receives r=Dirbaio a=pennae

neither of these reported errors so far, which is not ideal. add error reporting to both of them that matches the blocking error reporting as closely as is feasible, even allowing partial receives from buffered uarts before errors are reported where they would have been by the blocking code. dma transfers don't do this, if an errors applies to any byte in a transfer the entire transfer is nuked (though we probably could report how many bytes have been transferred).

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-01 15:35:39 +00:00
73cd016885 Merge pull request #72 from tana/ap-mode
Add AP mode
2023-05-01 14:50:29 +00:00
0589f2f36e Merge pull request #71 from kbleeke/wifi-scanning2
add wifi scan example
2023-05-01 14:37:25 +00:00
b612976cc7 add wifi scan example 2023-05-01 16:34:30 +02:00
b58b9ff390 rp/uart: report errors from dma receive 2023-05-01 15:36:53 +02:00
1d5adb8974 rp/uart: extract fifo draining from blocking_read
this will also be needed for dma operations.
2023-05-01 15:32:58 +02:00
be66e0f7ce rp/uart: make dma multicore-safe
running rx and tx on different cores could lead to hangs if the dmacr
register modifys run concurrently. this is bad.
2023-05-01 15:32:58 +02:00
861f49cfd4 rp/uart: report errors from buffered uart
this reports errors at the same location the blocking uart would, which
works out to being mostly exact (except in the case of overruns, where
one extra character is dropped). this is actually easier than going
nuclear in the case of errors and nuking both the buffer contents and
the rx fifo, both of which are things we'd have to do in addition to
what's added here, and neither are needed for correctness.
2023-05-01 15:32:58 +02:00
7ab9fe0522 rp/uart: extract common code from async and blocking buffered reads
once we add error propagation the common code will become even larger,
so it makes sense to move it out.
2023-05-01 15:24:03 +02:00
1c8492bab2 tests/rp: test error conditions for uart 2023-05-01 15:22:56 +02:00
19588a9e6f rp/uart: rename state to buffered_state
we'll add a dma state soon as well.
2023-05-01 15:22:39 +02:00
1d2f6667df rp/uart: add set-break functions
sending break conditions is necessary to implement some protocols, and
the hardware supports this natively. we do have to make sure that we
don't assert a break condition while the uart is busy though, otherwise
the break may be inserted before the last character in the tx fifo.
2023-05-01 15:16:30 +02:00
ac0ea406f9 Merge #1395
1395: rp/pio: bit of a rework r=Dirbaio a=pennae

the pio module is currently in a Bit of a State. this is far from all that's needed to make it more useful, but it's a start.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-01 11:00:48 +00:00
7336b8cd88 rp/uart: add UartRx::new_blocking 2023-05-01 13:00:40 +02:00
bcbe3040a1 tests/rp: fix buffered uart test
the rp uart receive fifo is 32 entries deep, so the 31 byte test data
fits into it without needing any buffering. extend to 48 bytes to fill
the entire fifo and the 16 byte test buffer.
2023-05-01 13:00:40 +02:00
f4ade6af8b rp/pio: write instr memory only from common
instruction memory is a shared resource. writing it only from PioCommon
clarifies this, and perhaps makes it more obvious that multiple state
machines can share the same instructions.

this also allows *freeing* of instruction memory to reprogram the
system, although this interface is not entirely safe yet. it's safe in
the sense rusts understands things, but state machines may misbehave if
their instruction memory is freed and rewritten while they are running.
fixing this is out of scope for now since it requires some larger
changes to how state machines are handled. the interface provided
currently is already unsafe in that it lets people execute instruction
memory that has never been written, so this isn't much of a drawback for now.
2023-05-01 12:58:57 +02:00
fa1ec29ae6 rp/pio: remove a bunch of unnecessary let _ = self 2023-05-01 12:58:57 +02:00
58e727d3b9 rp/pio: move non-sm-specific methods to PioCommon
pin and irq operations affect the entire pio block. with pins this is
not very problematic since pins themselves are resources, but irqs are
not treated like that and can thus interfere across state machines. the
ability to wait for an irq on a state machine is kept to make
synchronization with user code easier, and since we can't inspect loaded
programs at build time we wouldn't gain much from disallowing waits from
state machines anyway.
2023-05-01 12:58:57 +02:00
4cd5ed81aa rp/pio: remove top-level PIOS array
this mainly removes the need for explicit indexing to get the pac
object. runtime effect is zero, but arguably things are a bit easier to
read with less indexing.
2023-05-01 12:58:57 +02:00
4618b79b22 rp/pio: seal PioInstance, SmInstance
seems prudent to hide access to the internals.
2023-05-01 12:58:57 +02:00
db16b6ff3f rp/pio: don't call dma::init so much
this is already done during platform init. it wasn't even sound in the
original implementation because futures would meddle with the nvic in
critical sections, while another (interrupt) executor could meddle with
the nvic without critical sections here. it is only accidentally sound
now and only if irq1 of both pios isn't used by user code. luckily the
worst we can expect to happen is interrupt priorities being set wrong,
but wrong is wrong is wrong.
2023-05-01 12:58:57 +02:00
a9074fd09b rp/pio: enable pio interrupts only once
since we never actually *disable* these interrupts for any length of
time we can simply enable them globally. we also initialize all pio
interrupt flags to not cause system interrupts since state machine
irqa are not necessarily meant to cause a system interrupt when set. the
fifo interrupts are sticky and can likewise only be cleared inside the
handler by disabling them.
2023-05-01 12:58:57 +02:00
f2469776f4 rp/pio: use atomic accesses, not critical sections
atomic accesses are not only faster but also can't conflict with other
critical sections.
2023-05-01 12:53:32 +02:00
a10850a6da rp/pio: handle all pio irqs in one handler
dma does this too, also with 12 bits to check. this decreases code size
significantly (increasing speed when the cache is cold), frees up an
interrupt handler, and avoids read-modify-write cycles (which makes each
processed flag cheaper). due to more iterations per handler invocation
the actual runtime of the handler body remains roughly the
same (slightly faster at O2, slightly slower at Oz).

notably wakers are now kept in one large array indexed by the irq
register bit number instead of three different arrays, this allows for
machine code-level optimizations of waker lookups.
2023-05-01 12:53:32 +02:00
03737e4be4 Merge pull request #73 from daniel-larsen/master
cyw43-pio optional feature for defmt
2023-05-01 09:25:24 +00:00
bc34f3c60f updated example 2023-04-30 23:19:53 -03:00
c70a66fe81 Make defmt optional 2023-04-30 18:55:19 -03:00
a186694fdd Implement WPA2 AP mode 2023-05-01 06:54:26 +09:00
af368676ef Removed defmt 2023-04-30 18:02:44 -03:00
ce04b732d1 Merge #1407
1407: Remove legacy LoRa drivers r=Dirbaio a=ceekdee

Remove legacy LoRa drivers and associated configuration.

Co-authored-by: ceekdee <taigatensor@gmail.com>
Co-authored-by: Chuck Davis <taigatensor@gmail.com>
2023-04-30 19:36:36 +00:00
099ec7443b Add AP mode (unencrypted) 2023-05-01 04:30:21 +09:00
ff6748a0d8 Merge branch 'embassy-rs:master' into master 2023-04-30 11:09:43 -05:00
7646f18836 Merge #1405
1405: add IPCC peripheral for stm32wb r=xoviat a=OueslatiGhaith

Hello again,

This pull request is related to #1397 and #1401, inspired by #24, and was tested on an stm32wb55rg.

This pull request aims to add the IPCC peripheral for stm32wb microcontrollers.
I am debating whether this should be included in the public API, since the IPCC peripheral would be typically managed by the TL Mailbox, not by the app directly.

Co-authored-by: OueslatiGhaith <ghaith.oueslati@enis.tn>
2023-04-30 15:23:55 +00:00
5659269c8f Merge pull request #70 from kbleeke/wifi-scanning-ioctl
Wifi scanning ioctl
2023-04-30 15:05:16 +00:00
41fe718ea8 Merge #1412
1412: stm32/uart: abort on error r=Dirbaio a=xoviat

This PR aborts the DMA transfer in the event of a UART error. Otherwise, the transfer will never complete, and an error will not be returned.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-30 14:58:36 +00:00
94c6727b3f Merge #1410
1410: Add `Transactional` trait to rp's i2c impl r=Dirbaio a=DasLixou

Fixes #1409 

Co-authored-by: Lixou <82600264+DasLixou@users.noreply.github.com>
Co-authored-by: xoviat <49173759+xoviat@users.noreply.github.com>
2023-04-30 07:52:49 +00:00
b77794c9a7 stm32/uart: abort on error 2023-04-28 21:43:03 -05:00
ba886b45b8 rustfmt 2023-04-28 16:46:32 -05:00
76b967a966 comment wifi scanning items 2023-04-28 21:28:59 +02:00
2c5d94493c wifi scan ioctl 2023-04-28 21:28:59 +02:00
2119b8e1ca Add Transactional trait to rp's i2c impl 2023-04-28 21:23:32 +02:00
49bed094a3 Merge branch 'embassy-rs:master' into master 2023-04-28 13:35:22 -05:00
49ecd8d7c5 Remove external-lora-phy feature. 2023-04-28 13:33:20 -05:00
29cc661dca removed constrain method 2023-04-28 10:17:01 +01:00
c19de29847 Merge pull request #63 from kbleeke/generalize-events
rework event handling to allow sending data to `Control`
2023-04-27 18:23:36 +00:00
f4bfda345d Merge pull request #69 from kalkyl/update-embassy
Update embassy
2023-04-27 18:22:46 +00:00
3e730aa8b0 Merge #1403
1403: Bump versions preparing for -macros and -executor release r=lulf a=lulf

I'd like to propose a new release of embassy-macros and embassy-executor, as there is a challenge with some of the features changing since 0.1.1 when using libraries that depend on 0.1.1 with applications that patch to use git versions.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-04-27 18:20:10 +00:00
28a3454846 add changelog 2023-04-27 20:19:07 +02:00
4d551a5865 Update embassy 2023-04-27 19:37:19 +02:00
91cddd50f6 reversed changes in Cargo.toml 2023-04-27 18:26:19 +01:00
9d610c6866 Remove legacy LoRa drivers. 2023-04-27 11:05:33 -05:00
03d6363d5a Merge #1406
1406: rp: DMA behaviour during flash operations r=Dirbaio a=kalkyl

This PR changes the old behaviour during flash operations where all DMA transfers were paused during the flash operation.
The new approach is to wait for any DMA operating in flash region to finish and let RAM transfers continue.

Co-authored-by: kalkyl <henrik.alser@me.com>
2023-04-27 15:28:11 +00:00
d960bf344a fixed missing imports 2023-04-27 16:22:41 +01:00
31b54e0fbd rustfmt 2023-04-27 17:09:16 +02:00
3ba73b5ff4 fixed mistake with casting channel to a usize 2023-04-27 16:08:57 +01:00
8c733c29cc add IPCC peripheral for stm32wb 2023-04-27 16:03:22 +01:00
278818395e rp: DMA behaviour during FLASH operations 2023-04-27 16:48:25 +02:00
42a8f1671d Bump versions preparing for -macros and -executor release 2023-04-27 11:54:22 +02:00
1cf26f0eb3 Merge #1402
1402: rp: remove pio Cargo feature. r=Dirbaio a=Dirbaio

We shouldn't have Cargo features if their only purpose is reduce cold build time a bit.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-26 20:39:55 +00:00
d91c37dae3 rp: remove pio Cargo feature.
We shouldn't have Cargo features if their only purpose is reduce cold build time a bit.
2023-04-26 22:39:24 +02:00
759d911b50 Merge #1396
1396: Add an external LoRa physical layer feature r=Dirbaio a=ceekdee

The original LoRa drivers have been deprecated and examples associated with them deleted; however, the original LoRa drivers are still available to allow a gentle transition to the external lora-phy crate.

Co-authored-by: ceekdee <taigatensor@gmail.com>
Co-authored-by: Chuck Davis <taigatensor@gmail.com>
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-04-26 20:10:40 +00:00
a277deeaa5 Merge pull request #1 from lulf/build-fixes
build fixes for stable
2023-04-26 14:57:33 -05:00
cb00fb18cb Merge #1400
1400: Add support for setting up the nRFs internal DCDCs r=Dirbaio a=korken89



Co-authored-by: Emil Fresk <emil.fresk@gmail.com>
2023-04-26 19:49:26 +00:00
f8b359dc5a Add support for setting up the nRFs internal DCDCs 2023-04-26 21:24:50 +02:00
edef790e1a build fixes for stable 2023-04-26 20:45:59 +02:00
18af9f304a Merge branch 'embassy-rs:master' into master 2023-04-26 12:26:19 -05:00
deadf40c85 Merge pull request #1399 from mbrieske/probe-rs-stm32f7example
fix stm32f7 example runner command for probe-rs-cli
2023-04-26 19:01:28 +02:00
405649ddc7 fix stm32f7 example runner command for probe-rs-cli 2023-04-26 18:58:28 +02:00
0c8e5f92c7 Switch from probe-run to probe-rs-cli. 2023-04-26 18:10:57 +02:00
e2410cbb6a Merge pull request #1398 from embassy-rs/probe-rs
Switch from probe-run to probe-rs-cli.
2023-04-26 18:07:56 +02:00
52decfb16c Add nightly feature specification for lora-phy. 2023-04-26 10:51:02 -05:00
91047c61b9 Correct nightly feature specification. 2023-04-26 10:18:40 -05:00
054ca17f66 Switch from probe-run to probe-rs-cli.
- probe-run screwed up the last release 2 weeks ago and it's still not fixed (issue 391). Doesn't look well maintained.
- Even when it's not broken, it lags behind probe-rs-cli in new chips support because it's slow in updating probe-rs.
2023-04-26 17:00:51 +02:00
0a2d6f0be0 ci: build with DEFMT_LOG=trace to catch all defmt issues. 2023-04-26 16:20:49 +02:00
0c7ce80384 Fix missing defmt impl. 2023-04-26 16:20:23 +02:00
123c110427 Revert "Workaround regex breaking change."
This reverts commit 6a1a3e6877.
2023-04-26 16:19:23 +02:00
0d82ebea29 stm32/rtc: fix datetime and add f4 test 2023-04-25 17:35:01 -05:00
f729d2d060 Deprecate original LoRa drivers. Update rust-lorawan releases. 2023-04-25 13:51:19 -05:00
9e96655757 comment some choices for current event handling 2023-04-25 19:14:00 +02:00
582a15a693 cleanup EventMask 2023-04-25 19:14:00 +02:00
2d7ba44621 rework event handling to allow sending data 2023-04-25 19:14:00 +02:00
73f25093c7 Add lora-phy examples. 2023-04-23 18:32:34 -05:00
a3f727e2e1 Merge branch 'embassy-rs:master' into master 2023-04-23 16:43:45 -05:00
0dea7b02d6 Merge #1387
1387: rp: add PWM api r=Dirbaio a=pennae

add PWM api ~~including interrupts and async support.~~

depends on https://github.com/embassy-rs/rp-pac/pull/1

**TODO**:

- [x] example
- [x] test
- [x] move divmode to typelevel
- [x] deduplicate `new_*` functions

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-23 20:50:57 +00:00
a4866ad278 rp: add PWM api 2023-04-23 22:49:15 +02:00
d78edba0d4 Merge #1392
1392: embassy-rp : Fix for division intrinsics clashing with rp2040-hal r=Dirbaio a=peterkrull

Commit [7a682ec](7a682ec02a (diff-f121955242a67342004444b26214e5d1d591c3182dcd0fedf4329ad472cd1200)) may break compilation if also using `rp2040-hal`. It seems that the rp2040-hal does have a feature flag for [disabling intrinsics](2c9921cdc5/rp2040-hal/src/sio.rs (L323)), but I still cannot seem to compile with that enabled. Adding these flags fixes it for me.

Co-authored-by: Peter Krull <peterkrullpeter@gmail.com>
2023-04-23 18:54:28 +00:00
b283f213d9 embassy-rs : @pennae Fix division intrinsics naming clash with rp2040-hal 2023-04-23 19:05:32 +02:00
ba47fe9c41 embassy-rp : Added feature flag to otherwise unused definitions 2023-04-23 16:37:44 +02:00
8285263fc2 embassy-rp : Added intrinsic feature flag to global_asm macro 2023-04-23 15:59:56 +02:00
cc5bca8e83 Added feature flag to embassy-rp intrinsics to avoid conflicts with rp2040-hal 2023-04-23 15:50:46 +02:00
0a2f7b4661 Use released lora-phy. 2023-04-21 17:41:25 -05:00
6a1a3e6877 Workaround regex breaking change. 2023-04-21 14:37:04 +02:00
02c86bca52 Add external LoRa physical layer functionality. 2023-04-21 01:20:46 -05:00
fb27594b2e Merge #1383
1383: embassy-boot: Add nightly flag r=Dirbaio a=sawi97

This adds "nightly" as a flag to embassy-boot and embassy-boot-nrf which gates features requiring nightly, enabled by default.
Makes it possible to build the bootloader with the stable compiler when setting `default-features=false`.

It should be straight forward to do this for stm32 and rp as well, but I am not been able to test it.

Co-authored-by: sander <sander.wittwer@dengineering.no>
Co-authored-by: sawi97 <34313578+sawi97@users.noreply.github.com>
2023-04-20 09:19:54 +00:00
a73f9474a0 embassy-boot: ensure tests can run on the stable compiler 2023-04-20 10:56:59 +02:00
3bf41e9a06 ci: ad nightly flag to embassy-boot tests 2023-04-20 10:47:40 +02:00
0e01b28d5e embassy-boot: resolve conflicts 2023-04-20 10:40:40 +02:00
8aca324c2d Merge commit '2c1d572cf2e225be5f30435b133e96aa55c9d3af' 2023-04-20 10:38:54 +02:00
7ee9e8322c Merge commit '970a081aab0567a387463610eb204a3b003255f9' 2023-04-20 10:36:15 +02:00
43c20dbe65 Merge branch 'embassy-rs:master' into embassy-boot-stable 2023-04-20 10:29:16 +02:00
8cd117fd5d embassy-boot: update readme MSRV to stable 2023-04-20 10:26:02 +02:00
f64d1131b6 embassy-boot: update ci and examples to use the nightly flag 2023-04-20 10:22:44 +02:00
b153a5b0d7 embassy-boot: add nightly feature to stm32 and rp as well 2023-04-20 10:04:41 +02:00
9b51c8f4d4 Merge #1385
1385: feat: add embassy-boot-rp to the doc builder r=lulf a=elpiel



Co-authored-by: Lachezar Lechev <elpiel93@gmail.com>
2023-04-20 07:12:35 +00:00
510ae7e3dc Merge commit 'eecc41c2e4911c5f1cd232339999424760de9f06' 2023-04-20 08:45:58 +02:00
f67eb84ec7 chore: add embassy-boot-rp to README
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-04-20 09:20:02 +03:00
5de6bb3adf feat: add embassy-boot-rp to the doc builder
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-04-20 09:19:26 +03:00
54fe50c685 Merge #1384
1384: rp: optimize rom-func-cache for runtime r=Dirbaio a=pennae

storing a full function pointer initialized to a resolver trampoline lets us avoid the runtime cost of checking whether we need to do the initialization. this also slightly reduces flash usage due to a slightly more space-efficient initialization procedure.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-19 22:26:59 +00:00
837cdacd16 rp: optimize rom-func-cache for runtime
storing a full function pointer initialized to a resolver trampoline
lets us avoid the runtime cost of checking whether we need to do the
initialization.
2023-04-20 00:07:18 +02:00
41e90e22e2 Merge #1370
1370: stm32/i2c: fix races when using dma. r=Dirbaio a=xoviat

This change addresses two races:

1. It removes the `chunks_transferred` state variable that is modified inside the interrupt. Analysis of the code reveals that the only time the waker can be woken is when `chunks_transferred` is incremented. Therefore, waking is enough to signal the `poll_fn` that the `chunks_transferred` has incremented. Moving to `remaining_len` clarifies the code, since there is no need to track how many chunks are remaining.
2. It moves the start of the transfer until after the waker is registered, which could theoretically occur if the clock speed is very low, but probably never would even if this wasn't fixed.

There is another race that I noticed: between writes the waker may not yet be registered. In that case, the code would simply be stuck and the `poll_fn` would never be woken. There is no way to resolve this without broadening the scope of the analysis, and this will likely never occur. 

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-19 21:36:04 +00:00
64b80c2e4d stm32/i2c: ignore wakes without interrupt 2023-04-19 16:16:44 -05:00
26f4d7d283 Merge #1382
1382: rp: hook up softfloat intrinsics to bootrom r=Dirbaio a=pennae

rp-hal has done this very well already, so we'll just copy their entire impl again. only div.rs needed some massaging because our sio access works a little differently, everything else worked as is.

includes a minor bit of refactoring to make it easier to check which bits we've copied from rp2040-hal and which we haven't.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-19 21:10:35 +00:00
fdd6e08ed6 rp: hook up softfloat rom intrinsics
rp-hal has done this very well already, so we'll just copy their entire
impl again. only div.rs needed some massaging because our sio access
works a little differently, everything else worked as is.
2023-04-19 23:04:47 +02:00
7d64de153f Merge commit 'cbe076d763d97f715605d25d8f8815e299c45d46' 2023-04-19 15:41:00 +02:00
e24421a393 stm32/rtc: impl. functions on trait 2023-04-18 20:38:51 -05:00
4de4039417 stm32/rtc: build more chips 2023-04-18 20:38:28 -05:00
f589247c1f stm32/rtc: cleanup and consolidate 2023-04-18 20:38:18 -05:00
37181c79d9 Merge #1380
1380: Add embassy-net without dhcp to ci.sh r=Dirbaio a=royb3



Co-authored-by: Roy Buitenhuis <roy.buitenhuis94@gmail.com>
2023-04-18 20:28:39 +00:00
a2ac1eed1b Add extra feature flags to fix build without dhcp. 2023-04-18 22:11:15 +02:00
bfa3cbaf30 Add embassy-net without dhcp to ci.sh 2023-04-18 21:47:28 +02:00
216b120f15 Merge #1379
1379: enable inline-asm feature for cortex-m in examples r=Dirbaio a=pennae

inline assembly is supported since rust 1.59, we're way past that. enabling this makes the compiled code more compact, and on rp2040 even decreses memory usage by not needing thunks in sram.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-18 19:25:49 +00:00
08d9e5981e Merge #1345
1345: Added a neopixel constructor to spi, with an example in the stm32g0 d… r=Dirbaio a=smeenka

For Spi I added the possibility to use the Spi device as a Neopixel driver, with very precise timing, and not dependent on software during the transfer. Even without the --release flag, the timing is perfect.
Note that between the bursts of data the Mosi line should stay on low level. A resistor of 10k can guarantee that, as it seems the the pin is floating between the bursts (on the nucleo-G070RB platform I use).
I created an example for the STM32G0 family.
This example  does contain a very simple Neopixel driver, only for one type. But this Neopixel driver can easy be adapted to different types (for example RGBW types).


Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Co-authored-by: anton smeenk <asmeenk@planet.nl>
2023-04-18 19:08:04 +00:00
8a9136e4e4 enable inline-asm feature for cortex-m in examples
inline assembly is supported since rust 1.59, we're way past that.
enabling this makes the compiled code more compact, and on rp2040
even decreses memory usage by not needing thunks in sram.
2023-04-18 21:07:36 +02:00
3260f6b2af stm32/spi: add new_txonly_nosck constructor, for neopixels, with an example in the stm32g0 directory. 2023-04-18 20:59:25 +02:00
2080d8bb6d stm32/spi: add support for all word sizes.
Co-Authored-By: anton smeenk <asmeenk@planet.nl>
2023-04-18 20:56:23 +02:00
a673b9aa29 Merge pull request #1367 from embassy-rs/update-nightly3
Update nightly.
2023-04-18 18:06:46 +02:00
38c5b97df0 Merge #1378
1378: Add ability to invert UART pins, take 2 r=Dirbaio a=jakewins

Same PR as before, except this now works :) 

There was a minor hiccup in the UartRx code where the rx pin got passed as the tx argument, so the invert settings didn't get applied. With this fix, my local setup at least is happily reading inverted uart data.

Co-authored-by: Jacob Davis-Hansson <jake@davis-hansson.com>
2023-04-18 15:48:47 +00:00
21ea98810a Pass rx pin to right init arg 2023-04-18 17:44:19 +02:00
fbd6eeb748 Merge pull request #1348 from embassy-rs/h5-spi
stm32/dma: refactor
2023-04-18 17:03:24 +02:00
dbded7a6ce Update nightly.
Includes this TAIT breaking change. https://github.com/rust-lang/rust/pull/110237
2023-04-18 16:59:09 +02:00
efc70debb3 stm32/dma: add double buffered mode for DMA, update DCMI. 2023-04-18 16:41:24 +02:00
173c65b543 stm32/dma: refactor. 2023-04-18 16:37:35 +02:00
a86a100879 Merge #1377
1377: (embassy-stm32): implement embedded-storage traits for full flash struct r=MathiasKoch a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
2023-04-18 14:05:15 +00:00
bba8b0ded5 Missing semi-colon 2023-04-18 16:03:55 +02:00
095f5ef279 Add MAX_ERASE_SIZE const in build script, and use it in flash-wide implementation of embedded-storage traits 2023-04-18 15:49:33 +02:00
1c68c62ebd Implement embedded-storage traits for full flash struct 2023-04-18 13:48:37 +02:00
f5216624bb stm32/i2c: fix races when using dma.
fixes #1341.
2023-04-17 15:24:24 -05:00
46227bec1e Merge pull request #1375 from embassy-rs/stm32-sdmmc-refactor
stm32/sdmmc: refactor, simplify code, add HIL test
2023-04-17 22:14:19 +02:00
e63a34ba21 stm32/sdmmc: add hil test for f4. 2023-04-17 21:49:34 +02:00
82dd7a5f8c stm32/sdmmc: add init_card retry. 2023-04-17 21:48:47 +02:00
0dfa192992 stm32/sdmmc: remove "inner" layer. 2023-04-17 19:23:18 +02:00
e14fa11fc3 stm32/sdmmc: remove unneeded pointer casts. 2023-04-17 17:52:02 +02:00
df7ef1d98f stm32/sdmmc: remove cfg_if. 2023-04-17 17:52:02 +02:00
9202dbf32a Merge #1369
1369: Lora AFIT r=Dirbaio a=Dirbaio

Extracted out of #1367 

Probably we should wait until `rust-lorawan` is merged+released?

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-04-17 13:50:49 +00:00
4044d728a6 update to released versions 2023-04-17 15:44:58 +02:00
6acc361109 Merge #1371 #1374
1371: RTC r=Dirbaio a=xoviat

This adds RTC for most of the stm32 chips. Nearly all of the work was not done by me, but I took it the last bit by disabling the chips that weren't working. I think it would be easier to enable them in future PRs if requested.

1374: stm32: remove TIMX singleton when used on timer driver r=Dirbaio a=xoviat

After multiple ways of looking at this, this is the best solution I could think of.

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-17 01:29:05 +00:00
27ec29e2c5 stm32/rtc: remove unused import 2023-04-16 19:32:15 -05:00
90c1422381 stm32/rtc: remove chrono datetime and add converters 2023-04-16 19:30:42 -05:00
9e1ddeac86 stm32: fix defective example 2023-04-16 18:32:55 -05:00
99dcbf00c4 Merge #1372
1372: rp: add division intrinsics r=Dirbaio a=pennae

rp2040-hal adds division intrinsics using the hardware divider unit in the SIO, as does the pico-sdk itself. using the hardware is faster than the compiler_rt implementations, and more compact too.

since embassy does not expose the hardware divider in any way (yet?) we could go even further an remove the state-saving code rp2040-hal needs, but that doesn't seem to be worth it.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-16 23:23:47 +00:00
776e001b5b stm32: remove TIMX singleton when used on timer driver
fixes #1316.
2023-04-16 17:47:25 -05:00
6ba2bb1a7f Merge #1373
1373: rp: switch to released rp-pac v1.0 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-16 22:00:07 +00:00
a258e15c23 rp: switch to released rp-pac v1.0 2023-04-16 23:59:26 +02:00
7a682ec02a rp: add division intrinsics
rp2040-hal adds division intrinsics using the hardware divider unit in
the SIO, as does the pico-sdk itself. using the hardware is faster than
the compiler_rt implementations, and more compact too.
2023-04-16 19:45:18 +02:00
e9ede443bc stm32/rtc: disable nonworking versions 2023-04-16 11:14:17 -05:00
bc550cbfda adjust .vscode file 2023-04-16 11:06:24 -05:00
8da9c07a65 stm32/rtc: disable nonworking versions 2023-04-16 11:06:05 -05:00
bd6bb2d248 Merge branch 'embassy-stm32/rtc' of https://github.com/MathiasKoch/embassy into rtc 2023-04-16 10:06:00 -05:00
81f10e136a outover instead of inover 2023-04-15 15:13:44 +02:00
1fdce6e52a Merge #1360 #1361
1360: stm32/rcc: add i2s pll on some f4 micros r=Dirbaio a=xoviat

Adds the i2s pll on some f4 micros. 

1361: Executor: Replace unnecessary atomics in runqueue r=Dirbaio a=GrantM11235

Only the head pointer needs to be atomic. The `RunQueueItem` pointers are only loaded and stored, and never concurrently

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2023-04-15 10:38:28 +00:00
efb67dfc1b Merge pull request #66 from mattiasgronlund/remove_myspi
Remove MySpi from example
2023-04-15 09:54:02 +00:00
f395ec44e8 stm32/rcc: add pllsai clock 2023-04-14 21:28:27 -05:00
63941432e3 Update to rust-lorawan with afit support 2023-04-15 01:00:12 +02:00
be0f93ff37 Merge #1368
1368: AFIT cleanup r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-14 22:59:49 +00:00
224eaaf797 stm32/sdmmc: switch to AFIT. 2023-04-15 00:58:58 +02:00
f681b9d4e5 Remove the _todo_embedded_hal_serial impls. EH will probably not have these serial traits. 2023-04-15 00:58:58 +02:00
650589ab3f stm32/rcc: add plli2s to Clocks and cfg directives 2023-04-14 16:30:36 -05:00
b9fc2a6b33 Add ability to invert UART pins
This is useful in some cases where the surrounding circuit
for some reason inverts the UART signal, for instance if you're talking
to a device via an optocoupler.
2023-04-14 21:08:24 +02:00
3002ee0dcf embassy-boot: add nightly feature gate for async usage 2023-04-14 11:27:23 +02:00
ce0e1a5db3 Merge commit '82f528927b2fde275c2e9b6fd737baf439cb296a' 2023-04-14 10:44:51 +02:00
9ca5bcd576 Update main.rs 2023-04-14 10:27:25 +02:00
4be1e4bd44 Remove MySpi
MySpi was replaced by PioSpi and no longer used.
2023-04-14 09:38:35 +02:00
a3ecf5caf6 Merge pull request #1363 from embassy-rs/embassy-time-released
time: remove embassy-sync dep, release v0.1.1
2023-04-14 00:19:33 +02:00
a7629299f4 Release embassy-time v0.1.1 2023-04-13 23:57:20 +02:00
e7ff759f1c time: remove dependency on embassy-sync. 2023-04-13 23:57:20 +02:00
62ecd97350 Merge pull request #1362 from embassy-rs/embassy-sync-v0.2.0
Release embassy-sync v0.2.0
2023-04-13 23:56:32 +02:00
577f060d24 Release embassy-sync v0.2.0 2023-04-13 23:40:49 +02:00
6a6c673c5f Executor: Replace unnecessary atomics in runqueue 2023-04-13 14:21:41 -05:00
c1d5f86871 stm32/rcc: fix warnings 2023-04-12 18:11:55 -05:00
0289630fe4 stm32/rcc: add i2s pll on some f4 micros 2023-04-12 18:04:44 -05:00
5a03b2e9e8 Merge #1359
1359: Make Hertz constructors `const` r=Dirbaio a=sgoll

This PR makes `Hertz` associated functions `hz()`, `khz()`, `mhz()` and their unassociated variants `const`, allowing `Hertz` to be used more easily in constant values:

```rust
const FREQ1: Hertz = Hertz::khz(120);
const FREQ2: Hertz = mhz(1);
```

This follows the pattern used for similar types such as `Duration` and `Instant`, from `embassy-time/src/duration.rs` and `embassy-time/src/instant.rs`, respectively.

ba8cafb20c/embassy-time/src/duration.rs (L44-L47)

ba8cafb20c/embassy-time/src/instant.rs (L29-L34)

Co-authored-by: Sebastian Goll <sebastian.goll@gmx.de>
2023-04-12 22:13:44 +00:00
4863f88d02 Make Hertz constructors const
This allows them to be used in constant values.
2023-04-13 00:06:14 +02:00
ba8cafb20c Merge #1358
1358: Fix typo in derivation of PLLP divisor for STM32F2 family r=Dirbaio a=sgoll

This PR fixes a typo in the derivation of the PLLP divisor for the STM32F2 family.

Fixes #1357 

Co-authored-by: Sebastian Goll <sebastian.goll@gmx.de>
2023-04-12 01:09:41 +00:00
f3699e67b9 Fix typo in derivation of PLLP divisor 2023-04-12 02:07:31 +02:00
201a038134 Merge pull request #1356 from embassy-rs/peripheralref-no-mut
Do not require mut in PeripheralRef clone_unchecked, make nRF timer `cc()` borrows less strict.
2023-04-12 00:03:46 +02:00
8fd8ef9ca7 nrf/timer: make cc() borrows less strict. 2023-04-11 23:09:02 +02:00
9a677ab618 common/peripheral: do not require mut in PeripheralRef clone_unchecked. 2023-04-11 23:09:02 +02:00
5c42ca13bd Merge #1353
1353: Add empty test binary for riscv r=Dirbaio a=royb3

As discussed with `@Dirbaio,` this empty test binary should cause a build to fail when it is not possible to build or link a riscv binary.

Co-authored-by: Roy Buitenhuis <roy.buitenhuis@technolution.nl>
2023-04-11 16:20:08 +00:00
f426c47747 Remove empty line, causing build issues. 2023-04-11 17:40:05 +02:00
6e947c83b6 Move linker flags to build script. 2023-04-11 17:22:47 +02:00
e183801957 Rustfmt 2023-04-11 17:04:25 +02:00
00258bca43 Add empty test binary for riscv 2023-04-11 16:53:04 +02:00
813bba200f Merge #1352
1352: re-export main_riscv macro as main for riscv arch. r=Dirbaio a=royb3

embassy_executor::main was missing for riscv targets.

Co-authored-by: Roy Buitenhuis <roy.buitenhuis@technolution.nl>
2023-04-11 13:05:31 +00:00
32836129f6 re-export main_riscv macro as main for riscv arch. 2023-04-11 14:59:38 +02:00
f06554cf1d Merge pull request #1351 from embassy-rs/c0-hil
stm32/tests: add C0 hil tests.
2023-04-11 14:53:36 +02:00
f5df567619 stm32/test: add C0 hil tests. 2023-04-11 14:16:32 +02:00
1b86570cfd embassy-boot: readd nightly feature as default 2023-04-11 13:55:19 +02:00
f51cbebffd embassy-boot: add nightly feature gates 2023-04-11 13:49:32 +02:00
c309797488 merge embassy/master 2023-04-11 13:48:34 +02:00
35a34afbc2 Update nightly. 2023-04-11 13:38:36 +02:00
b150b9506b Merge #1350
1350: Fix duplicate package name `embassy-stm32h7-examples` r=lulf a=sgoll

This uses the correct package name for the `stm32h5` example.

Fixes #1349 

Co-authored-by: Sebastian Goll <goll@hmi-project.com>
2023-04-11 10:08:58 +00:00
ab6179fb07 Fix duplicate package name 2023-04-11 12:03:08 +02:00
636a3d05c2 Merge #1331
1331: Let bootloader partition be u32 r=rmja a=rmja

This is probably controversial but hear me out:)

The idea about changing from usize to u32 is to enable support for 16 bit mcu's with large flash, e.g. MSP430F5529. Its usize is only 16 bit, but its flash is larger than 64k. Hence, to address its entire flash, it needs the flash address space to be u32.

Missing from the PR is `update_len` in the verification methods. There is currently [a different PR](https://github.com/embassy-rs/embassy/pull/1323) that contains changes in those methods, and I will align depending on the merge order of the two.

The general distinction between u32 and usize is:
* If it is a size or address that only ever lives in flash, then it is u32.
* If the offset or size is ever representable in memory, then usize.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-04-11 06:17:00 +00:00
d3ce64254a Let update_len be u32 2023-04-11 07:46:05 +02:00
d8c92c53d6 Merge remote-tracking branch 'upstream/master' into u32-partition 2023-04-11 07:36:23 +02:00
1f25d2ba83 Merge pull request #1347 from embassy-rs/h5-spi
stm32h5: add spi support, fix DMA hang, add HIL tests.
2023-04-10 21:27:44 +02:00
cae683cd41 stm32: update pac. 2023-04-10 21:12:48 +02:00
53c60df997 Merge #1346
1346: fix I2C controller problems after NACK r=Dirbaio a=Juravenator

While tinkering with I2C on a NUCLEO-H723ZG, I noticed that when trying to communicate with a non-existent device you do receive a proper NACK error, but afterwards any future communications with any device no longer works as expected.

The use case is auto-detection of devices, in this case a series of Adafruit 24LC32 I2C EEPROM boards.

On closer inspection with a logic analyzer, I observed that after the NACK, any data bytes sent out by the board to the devices are just zeros. Even though the embassy code specifies the correct data in `set_txdata` in `write_internal`. Something seems to be going wrong with the controller or buffers on the board itself.

Then I noticed what seems to be a logic error in `flush_txdr`, which is called when issuing a NACK.

After flipping the if statement, I2C communications keep working as expected after issuing a NACK.

Co-authored-by: Glenn Dirkx <glenn.dirkx@gmail.com>
2023-04-10 14:49:12 +00:00
6760258ec3 fix I2C controller problems after NACK 2023-04-10 16:20:47 +02:00
dbfd28130f stm32/test: add h5 hil tests. 2023-04-10 15:25:11 +02:00
4ef8e008e8 stm32/spi: add v4/v5 support (for H5). 2023-04-10 15:25:11 +02:00
44b7fe45e2 stm32/gpdma: fix race condition when resetting channel when done. 2023-04-10 15:11:07 +02:00
df17a88448 Merge #1342
1342: feat(rp): add `Wait` impl to `OutputOpenDrain` r=Dirbaio a=TheLostLambda

A while ago `OutputOpenDrain` was made to implement `InputPin`, something that allowed drivers for various one-wire protocols to be written, but it's been lacking a `Wait` implementation — something that's needed to write async versions of these drivers.

This commit also adds `get_level()` to `OutputOpenDrain`, since `is_high()` and `is_low()` were already implemented, but `get_level()` itself was missing.

Co-authored-by: Brooks J Rady <b.j.rady@gmail.com>
2023-04-09 20:50:08 +00:00
dee8c71a2d lora: fix embassy docs build. 2023-04-09 22:40:09 +02:00
46efce6ea2 Merge pull request #64 from kbleeke/master
general maintenance commits
2023-04-09 20:07:32 +00:00
1fbb8f0b32 feat(rp): add Wait impl to OutputOpenDrain
A while ago `OutputOpenDrain` was made to implement `InputPin`,
something that allowed drivers for various one-wire protocols to be
written, but it's been lacking a `Wait` implementation — something
that's needed to write async versions of these drivers.

This commit also adds `get_level()` to `OutputOpenDrain`, since
`is_high()` and `is_low()` were already implemented, but `get_level()`
itself was missing.
2023-04-09 09:15:57 +01:00
683ad80479 update embedded-hal 2023-04-07 19:56:05 +02:00
4d2710ed4d pin defmt to 0.3.2. 0.3.4 introduces an undesired wire format upgrade 2023-04-07 19:55:46 +02:00
056b8ab5a2 update nightly to embassy nightly 2023-04-07 19:54:39 +02:00
eb32d8ebbd update embassy 2023-04-07 19:54:05 +02:00
047ea9066f Merge #1335
1335: Misc stm32 fixes r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-07 00:29:18 +00:00
f38899728c stm32: add h5 flavor. 2023-04-07 02:28:36 +02:00
8469a2409c stm32/otg: add U5 support. 2023-04-07 02:28:36 +02:00
dee1d51ad3 stm32: remove subghz feature.
It's available only on WL. if you're using a WL, you want subghz for sure.
2023-04-07 02:28:36 +02:00
da8258b767 Merge #1330
1330: stm32/pwm: add complementary pwm r=Dirbaio a=xoviat

This implements complementary PWM with dead time on many supported targets. The specific dead-time programming functions are passed through directly to the user, which is a bit ugly but the best compromise I could reach for now.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-06 21:33:17 +00:00
cbbfeb23be Merge pull request #62 from kbleeke/parse-events-in-place
Parse event data from device in-place
2023-04-06 21:09:11 +00:00
60809edf2c Merge #1306
1306: Update embedded-hal r=Dirbaio a=Dirbaio

- [x] Wait for merge https://github.com/rust-embedded/embedded-hal/pull/443
- [x] Wait for release
- [x] embassy-embedded-hal
- [x] embassy-nrf
- [x] embassy-stm32
- [x] embassy-rp

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-06 21:06:54 +00:00
be37eee13d Update embedded-hal crates. 2023-04-06 22:41:50 +02:00
c9b7dbc541 Merge #1334
1334: executor: fix doc features. r=Dirbaio a=Dirbaio

Forgot to update them in #1321 

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-06 20:40:17 +00:00
e2516bba09 executor: fix doc features. 2023-04-06 22:39:36 +02:00
f3ec6080bf Merge #1332
1332: executor: Replace unsound critical sections with atomics r=Dirbaio a=GrantM11235

I couldn't figure out the correct orderings, so I just left them as SeqCst for now.

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2023-04-06 18:01:21 +00:00
89279dcdc9 Merge #1333
1333: STM32: Adc V1 r=Dirbaio a=GrantM11235

Based on #947

Co-authored-by: Matthew W. Samsonoff <matt.samsonoff@gmail.com>
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2023-04-06 17:16:50 +00:00
d9696bd212 Merge pull request #1300 from embassy-rs/h5
Add support for STM32H5.
2023-04-06 19:14:02 +02:00
611d023829 stm32: add H5 support. 2023-04-06 18:59:37 +02:00
9f28d80977 stm32/usb: add support for 32bit usbram. 2023-04-06 18:59:37 +02:00
8d7abeb06f Round out the async fns for can 2023-04-06 08:21:44 -06:00
9876571887 Strip out debug messages... oops 2023-04-06 08:21:44 -06:00
289762c0ef Add initial setup of async can for STM32 2023-04-06 08:21:44 -06:00
52cab3a9f4 Merge #1323
1323: Add hash functions to FirmwareUpdater r=Dirbaio a=rmja

This adds support for computing any hash over the update in the dtu area by providing a closure to the hash update function.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-04-05 23:43:24 +00:00
31ef783ac1 stm32/pwm: fix unused import 2023-04-05 18:18:05 -05:00
9f1dac3f5d stm32/pwm: add complementary pwm example 2023-04-05 18:07:07 -05:00
7677268319 stm32/pwm: cleanup and fix complementary pwm 2023-04-05 17:50:23 -05:00
0ef419bee4 Change ADC1 to ADC 2023-04-05 16:52:32 -05:00
92e96bd601 Fix typo 2023-04-05 16:38:06 -05:00
7c53ebd576 Fix example reference voltage 2023-04-05 16:28:28 -05:00
20e7b5e296 InternalChannel 2023-04-05 16:11:21 -05:00
37d8f2e512 Properly enable and reset adc 2023-04-05 15:28:42 -05:00
efd9e18321 Fix example 2023-04-05 15:12:27 -05:00
f588105429 wip 2023-04-05 15:01:31 -05:00
28b8ac4b62 Update STM32F0 ADC example to use read_internal 2023-04-05 14:34:24 -05:00
511a951246 Differentiate between read and read_internal for STM32F0 ADC
The internal channels (vbat, vref, and temperature) are not real pins and do
not have the `set_as_analog` method. They must be read using the
`read_internal` method.
2023-04-05 14:34:24 -05:00
a0b6096610 Put ADC input pin into analog mode 2023-04-05 14:34:24 -05:00
7e9e628eb9 Add ADC example for STM32F0 2023-04-05 14:34:24 -05:00
5d9ae3dbdb Add implementation of STM32 v1 ADC 2023-04-05 14:34:24 -05:00
8290236ed6 executor: Replace unsound critical sections with atomics 2023-04-05 13:23:12 -05:00
eed2b12325 Merge #1297
1297: feat(stm32): Support multiple flash regions r=Dirbaio a=rmja

This depends on https://github.com/embassy-rs/stm32-data/pull/176

This is a general overhaul of the flash module to support multiple erase sizes.
Overall this PR contains:
* Move complex sector computation to embassy-hal-common to allow for tests
* Implement `FlashRegion` trait for each available flash region
* Add Flash::into_regions() to get each region.
* Implement embedded-storage traits for each region to support different erase sizes
* Split family write operations into begin/do/end
* Protection against simultaneous writes/erases for each split region is done through a global mutex

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-05 11:12:40 +00:00
2a49e11cb0 Align flash examples 2023-04-05 10:55:31 +02:00
57d3d4d581 Align stm32 bootloader example 2023-04-05 10:29:45 +02:00
95b31cf2db Remove Drop on Flash and FlashLayout and propage lifetime to region types
This allows the user to "split" the FlashRegions struct into each region
2023-04-05 10:27:13 +02:00
05b2b2fb5f Align platform specific bootloaders 2023-04-05 09:56:40 +02:00
7e5ead78fe Remove firmware_len 2023-04-05 08:28:46 +02:00
2deb2c624c Let Partition range be u32 instead of usize 2023-04-05 08:28:31 +02:00
d8e2f82569 Let update_len be usize for now 2023-04-05 07:11:52 +02:00
043b3072c4 Merge remote-tracking branch 'upstream/master' into incremental-hash 2023-04-05 06:55:38 +02:00
991b22b6a1 stm32/pwm: add complementary pwm 2023-04-04 19:35:25 -05:00
e2e15e436a Merge remote-tracking branch 'upstream/master' into flash-regions 2023-04-04 23:16:58 +02:00
3deb65bc87 Merge branch 'master' into flash-regions 2023-04-04 23:16:01 +02:00
064ec9581e Merge #1329
1329: Reduce bootloader memory usage r=rmja a=rmja

By not requiring that the provided buffer must be able to contain one "erase-size" bytes.

This PR is the successor of #1314 and replaces it entirely.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-04-04 21:00:11 +00:00
84bfe9b8c9 Align examples with bootloader changes 2023-04-04 22:44:21 +02:00
a77ce1088d Align chip specific boot projects with new prepare_boot() signature 2023-04-04 22:22:25 +02:00
e962fe794c Add assertions about the aligned_buf % write sizes 2023-04-04 21:57:28 +02:00
78e6b4d261 Remove comment about equal erase size requirement 2023-04-04 21:43:18 +02:00
53efb02900 Allow different erase sizes for active and dfu 2023-04-04 21:30:49 +02:00
6c93309df4 Remove the Flash trait 2023-04-04 21:18:41 +02:00
25577e0eaf Assert active and dfu have same erase size and copy in smaller chunks
The copy from active to dfu (and vice versa) is now done in smaller portions depending on aligned_buf, which now does not need to be erase_size big.
2023-04-04 21:09:30 +02:00
9242ad89d4 Remove magic buffer argument from prepare_boot
and use the aligned page buffer instead
2023-04-04 20:25:55 +02:00
8256ac1044 Use MemFlash::default() in sha1 verify test 2023-04-04 19:07:45 +02:00
54b82d9966 Merge remote-tracking branch 'upstream/master' into incremental-hash 2023-04-04 19:06:14 +02:00
5923e143e3 Merge #1321
1321: executor: add Pender, rework Cargo features. r=Dirbaio a=Dirbaio

This introduces a `Pender` struct with enum cases for thread-mode, interrupt-mode and
custom callback executors. This avoids calls through function pointers when using only
the thread or interrupt executors. Faster, and friendlier to `cargo-call-stack`.

`embassy-executor` now has `arch-xxx` Cargo features to select the arch and to enable
the builtin executors (thread and interrupt).

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-04 15:50:12 +00:00
143105eeb6 Merge #1313
1313: (embassy-stm32): rework bufferedUart to get rid of PeripheralMutex r=Dirbaio a=MathiasKoch

New implementation is very similar to the implementation of embassy-nrf & embassy-rp. 

Also adds embedded-hal traits to bufferedUart.

**NB**: Still needs testing on actual hardware

Co-authored-by: Mathias <mk@blackbird.online>
2023-04-04 15:14:07 +00:00
3ede5667d4 Merge #1324 #1327
1324: Add MCO support for L4 and F4 families r=Dirbaio a=m-dupont

Add MCO support for L4 and F4 as already done in F7. 

When the 'HSI' source is selected as MCO source, 'HSI' is activated (`set_hsion(true)`) . This is done to operate the MCO in case 'MSI' is chosen as the clock source for the CPU. The same applies to PLL, etc.

1327: Avoid write before erase r=Dirbaio a=rmja

This introduces an additional marker to the state partition right after the magic which indicates whether the current progress is valid or not. Validation in tests that we never write without an erase is added.

There is currently a FIXME in the FirmwareUpdater. Let me know if we should take the erase value as a parameter. I opened a feature request in embedded-storage to get this value in the trait. Before this, the assumption about ERASE_VALUE=0xFF was the same.

I have made some thoughts about whether this is a breaking change between the app and firmware, i.e. whether adding the "Progress valid" field is breaking. My conclusion is that it is not a breaking change. For the case where an app uses this new FirmwareUpdater together with an old bootloader, what it now does, is that it:

1. Writes the progress valid field to all zeros. This field is not known in the old bootloader, so it actually writes a "current progress" index.
2. The entire state partition is erased - effectively removing any trace of 1.
3. Set magic

This should be compatible.


Co-authored-by: Mathieu Dupont <mdupont@cppm.in2p3.fr>
Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-04-04 14:59:10 +00:00
7140e97202 Merge #1328
1328: Expose read/write/erase on partition r=Dirbaio a=rmja

This is needed now where FirmwareWriter is removed.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-04-04 14:47:09 +00:00
803c09c300 Expose read/write/erase on partition 2023-04-04 12:50:53 +02:00
5e19fb6fb9 Fix compile error when verification is enabled 2023-04-04 12:36:50 +02:00
c38eb9660b Merge remote-tracking branch 'upstream/master' into avoid-write-before-erase 2023-04-04 12:29:24 +02:00
7c6936a2e3 Let hash functions take a digest::Digest trait
... and add adapters for current Sha512 implementations that does not inplement the Digest trait
2023-04-04 12:24:30 +02:00
c94f1e1450 Merge remote-tracking branch 'upstream/master' into incremental-hash 2023-04-04 07:58:16 +02:00
df3a1e1b9d Avoid write to not-erased magic
This introduces an additional marker to the state partition right after the magic which indicates whether the current progress is valid or not. Validation in tests that we never write without an erase is added.

There is currently a FIXME in the FirmwareUpdater. Let me know if we should take the erase value as a parameter. I opened a feature request in embedded-storage to get this value in the trait. Before this, the assumption about ERASE_VALUE=0xFF was the same.
2023-04-04 07:18:29 +02:00
36ad82a52b Merge #1322
1322: Remove FirmwareWriter r=Dirbaio a=rmja

FirmwareWriter currently has a "max-write-size" parameter, but this is a limitation that should be handled by chunking inside the NorFlash driver, and not "up here" in user code. In case that the driver (e.g. qspi driver) is unaware of any max-write limitations, one could simply add an intermediate NorFlash adapter providing the chunk'ing capability.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-04-04 00:33:23 +00:00
117fca84ea Merge #1315 #1325
1315: Add HIL test for timer on nrf r=Dirbaio a=lulf



1325: Update Rust nightly. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-03 22:59:33 +00:00
ef361d2e88 Update Rust nightly. 2023-04-03 23:15:19 +02:00
ae26a08026 Add HIL test for timer on nrf 2023-04-03 22:55:21 +02:00
1349dabe1a add compilation time exclusion for stm32f410 2023-04-03 17:55:05 +02:00
932b80ca8a run fmt 2023-04-03 16:52:57 +02:00
4ce1c5f27d Add MCO support for L4 and F4 families 2023-04-03 16:41:25 +02:00
7c11d85e1e Move MemFlash to separate module and add verify_erased_before_write verification 2023-04-03 15:33:20 +02:00
fd5c7acafc Merge pull request #61 from kbleeke/noop-mutex-for-events
event queue mutexs can be noop because we are already !Sync in other …
2023-04-03 13:32:34 +00:00
8aaffe82e7 Add incremental hash to FirmwareUpdater
This adds support for computing any hash over the update in the dtu area by providing a closure to the hash update function.
2023-04-03 14:59:55 +02:00
b1e2195b49 Remove FirmwareWriter
FirmwareWriter currently has a "max-write-size" parameter, but this is a limitation that should be handled by chunking inside the NorFlash driver, and not "up here" in user code. In case that the driver (e.g. qspi driver) is unaware of any max-write limitations, one could simply add an intermediate NorFlash adapter providing the chunk'ing capability.
2023-04-03 14:50:41 +02:00
0909a6cd3f Merge #1312
1312: Let bootloader partition have read/write/erase operations r=Dirbaio a=rmja

This change should not have any breaking changes.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-04-03 11:49:44 +00:00
76ebebd0c5 parse data from device in-place 2023-04-03 12:50:52 +02:00
608eb9b1fd event queue mutexs can be noop because we are already !Sync in other places 2023-04-03 11:57:33 +02:00
bfebf7a436 Fix formatting of sector erase log 2023-04-03 08:02:43 +02:00
5504fc54fe Merge branch 'embassy-rs:master' into flash-regions 2023-04-03 07:57:39 +02:00
d3c4e4a20a executor: add Pender, rework Cargo features.
This introduces a `Pender` struct with enum cases for thread-mode, interrupt-mode and
custom callback executors. This avoids calls through function pointers when using only
the thread or interrupt executors. Faster, and friendlier to `cargo-call-stack`.

`embassy-executor` now has `arch-xxx` Cargo features to select the arch and to enable
the builtin executors (thread and interrupt).
2023-04-03 03:09:11 +02:00
94890e544e Update stm32-metapac. 2023-04-03 02:01:06 +02:00
b41ee47115 executor: unify export mod. 2023-04-03 01:11:42 +02:00
08f911d25e Merge #1318
1318: rp: Allow zero len reads for buffered uart r=Dirbaio a=timokroeger

Prevents the read methods from getting stuck forever.

cc `@MathiasKoch` can you test if this fixes the problem you described in the chat?

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-04-02 18:33:36 +00:00
7ef6a3cfb2 rp: Allow zero len writes for buffered uart
Prevents the write methods from getting stuck forever.
2023-04-02 14:36:32 +02:00
cd2ed065dc Merge #1317
1317: Fix set_baudrate on RP-PICO r=Dirbaio a=TFleury

See [comment](https://github.com/embassy-rs/embassy/pull/1243#issuecomment-1492894626)

Co-authored-by: Thierry Fleury <thierry@codinlab.fr>
2023-04-02 10:03:20 +00:00
dd88775871 Ensure that flash locking is defered to after write 2023-04-01 18:10:20 +02:00
e11eebfa57 Ensure that ranges are validated with the region size 2023-04-01 17:26:32 +02:00
268e29b153 Let the FlashRegion for region types be public 2023-04-01 16:59:21 +02:00
f78aa4f936 rp: Allow zero len reads for buffered uart
Prevents the read methods from getting stuck forever.
2023-04-01 14:31:24 +02:00
0e13fe9925 Fix set_baudrate on RP-PICO 2023-04-01 11:44:49 +02:00
472dc6b7d1 Fix interrupt handling so it is similar to before the rework, and fix examples 2023-03-31 15:57:35 +02:00
50b0fb1a37 Let get_flash_regions be public 2023-03-31 15:47:45 +02:00
cfbe93c280 Rework bufferedUart to get rid of PeripheralMutex in a similar fashion as nrf & rp. Also adds embedded-hal traits to bufferedUart 2023-03-31 10:43:30 +02:00
d9d6fd6d70 Add erase and wipe tests 2023-03-31 10:28:47 +02:00
42931b51f2 Let bootloader partition have read/write/erase operations
This change should not have any breaking changes.
2023-03-31 10:18:19 +02:00
e3efda2249 Merge #1311
1311: Split bootloader implementation into multiple files r=lulf a=rmja

No other change has been made. I think that I have all the types re-exported in lib.rs as before.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-03-31 06:56:26 +00:00
373760a56b Split bootloader implementation into multiple files 2023-03-31 08:05:37 +02:00
5955d81374 Merge pull request #1263 from embassy-rs/turbowakers
Turbo-wakers 🚀
2023-03-30 19:03:03 +02:00
80972f1e0e executor,sync: add support for turbo-wakers.
This is a `core` patch to make wakers 1 word (the task pointer) instead of 2 (task pointer + vtable). It allows having the "waker optimization" we had a while back on `WakerRegistration/AtomicWaker`, but EVERYWHERE, without patching all crates.

Advantages:
- Less memory usage.
- Faster.
- `AtomicWaker` can actually use atomics to load/store the waker, No critical section needed.
- No `dyn` call, which means `cargo-call-stack` can now see through wakes.

Disadvantages:
- You have to patch `core`...
- Breaks all executors and other things that create wakers, unless they opt in to using the new `from_ptr` API.

How to use:

- Run this shell script to patch `core`. https://gist.github.com/Dirbaio/c67da7cf318515181539122c9d32b395
- Enable `build-std`
- Enable `build-std-features = core/turbowakers`
- Enable feature `turbowakers` in `embassy-executor`, `embassy-sync`.
- Make sure you have no other crate creating wakers other than `embassy-executor`. These will panic at runtime.

Note that the patched `core` is equivalent to the unpached one when the `turbowakers` feature is not enabled, so it should be fine to leave it there.
2023-03-30 17:55:55 +02:00
f3dcb5eb22 Wrap write/erase operations in cs 2023-03-30 15:13:44 +02:00
6b2aaacf83 Update embassy
Merge commit '9dd3719f09835f646e3a8f3abaa33726a1e3f9ca'
2023-03-30 14:37:51 +02:00
e6e5685f7c Merge pull request #58 from kbleeke/clear-data-unavailable
clear DATA_UNAVAILABLE irq
2023-03-30 10:30:53 +00:00
69db1535b2 clear DATA_UNAVAILABLE irq 2023-03-30 12:24:37 +02:00
d3fb9ddf33 Merge pull request #57 from kbleeke/faster-pio2
Maximum pio speed
2023-03-30 10:21:51 +00:00
b2d63d851d set INTERRUPT_WITH_STATUS flag in attempt to prevent hangs 2023-03-30 12:04:18 +02:00
a78e10e003 Add defmt support to new flash types 2023-03-30 09:17:14 +02:00
02caec9482 Skip unknown banks 2023-03-30 09:07:23 +02:00
760d4a72cb Ensure that embedded_storage traits are actually implemented 2023-03-30 09:05:13 +02:00
e7129371d0 Let sector computation be shared across families 2023-03-30 08:32:36 +02:00
e3c4e00be0 Align families 2023-03-30 06:01:56 +02:00
91d8afd371 Add AltFlashLayout for supported F4 chips 2023-03-30 05:27:57 +02:00
89129babf9 Merge remote-tracking branch 'upstream/master' into flash-regions 2023-03-30 04:53:07 +02:00
def576ac46 Remove FlashRegion trait and rename Settings to FlashRegion 2023-03-30 04:24:41 +02:00
ef1890e911 Remove flash operations from FlashRegion trait and move to common module 2023-03-29 15:45:18 +02:00
754bb802ba Merge #1294
1294: Add support for `QSPI` in `stm32` r=Dirbaio a=Mirror0

Implemented with help of Tomasz Grześ <tomasz.grzes@gmail.com>.

Tested only on stm32f777zi.

Co-authored-by: Mateusz Butkiewicz <mateusz@github.butkiewicz.dev>
2023-03-29 13:42:29 +00:00
68c260edeb Use stm32-metapac v2 2023-03-29 15:03:48 +02:00
fc8c83e00a Fix h7 compile error 2023-03-29 14:50:19 +02:00
87898501a2 feat(stm32:qspi): convert some u8 to enum variants 2023-03-29 14:28:25 +02:00
a0d089536a Merge branch 'flash-regions' of https://github.com/rmja/embassy into flash-regions 2023-03-29 14:10:33 +02:00
15e1747220 Fix build of not implemented family 2023-03-29 14:10:16 +02:00
0bbc3a3d81 Merge branch 'master' into flash-regions 2023-03-29 13:59:17 +02:00
5a12fd6c75 Add unimplemented family section 2023-03-29 13:57:33 +02:00
b7dfc8de10 Let flash module be conditionally included 2023-03-29 13:52:52 +02:00
ddbd509865 Move as much logic from families to shared module as possible 2023-03-29 13:37:45 +02:00
69944675a3 Expose get_sector in favor of is_eraseable_range 2023-03-29 12:49:13 +02:00
4ee3d15519 Keep peripheral lifetime when calling into_regions() 2023-03-29 12:10:24 +02:00
6806bb9692 Expose flash region settings as an array 2023-03-29 11:52:18 +02:00
d6ce1c4325 Support running tests in embassy-stm32 and move impl from common back to stm32 2023-03-29 11:31:45 +02:00
869b337715 PIO at maximum speed 2023-03-28 16:51:49 +02:00
fe57e4d9f8 Merge pull request #56 from kbleeke/faster-pio
make pio even faster
2023-03-28 14:10:32 +00:00
781c7f978c make pio faster 2023-03-28 15:29:14 +02:00
7a841b58d1 Merge #1307
1307: (embassy-stm32): add embedded-io blocking Read + Write for BufferedUart r=MathiasKoch a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
2023-03-28 12:35:07 +00:00
14f6bc88ea Remove unnecessary lifetime 2023-03-28 14:34:36 +02:00
2d7f35cf57 Add embedded-io blocking Read + Write for BufferedUart 2023-03-28 14:28:44 +02:00
c15f07de4f Merge pull request #55 from kbleeke/master
update readme
2023-03-27 20:39:54 +00:00
983a94a9c5 update readme 2023-03-27 22:37:18 +02:00
e9e2be137f Merge pull request #54 from kbleeke/pio-irq
Move pio driver to separate crate
2023-03-27 17:08:54 +00:00
20ea35fc96 Move pio driver to separate crate 2023-03-27 19:00:20 +02:00
d918919cb2 Merge pull request #53 from kbleeke/send-status
use send status feature of cyw43 instead of manually checking status
2023-03-27 16:54:59 +00:00
cf179f3076 Merge #1303
1303: Add logging and interface for debugging USB buffer usage r=Dirbaio a=jamesmunns



Co-authored-by: James Munns <james@onevariable.com>
2023-03-27 16:31:13 +00:00
20aa86d63e Address review comments 2023-03-27 18:21:11 +02:00
056df98d47 use send status feature of cyw43 instead of manually checking status 2023-03-27 18:19:07 +02:00
273e6f5b83 Merge pull request #47 from kbleeke/pio-irq
Use IRQ instead of polling the status register
2023-03-27 16:08:22 +00:00
a77fdefd7c Correct copy/paste errors 2023-03-27 15:37:12 +02:00
8926397f45 address irq nits 2023-03-27 15:29:01 +02:00
a6cef4baf2 Add logging and interface for debugging buffer usage 2023-03-27 14:19:00 +02:00
07fe37b5ee Merge pull request #52 from kbleeke/cancel-ioctl
cancel ioctl when future is dropped
2023-03-27 11:45:35 +00:00
1c721cb20e cancel ioctl when future is dropped 2023-03-27 13:39:41 +02:00
6a802c4708 feat(stm32:qspi): add support for QSPI in stm32
Implemented with help of Tomasz Grześ <tomasz.grzes@gmail.com>.
2023-03-27 13:20:00 +02:00
b58cc2aa23 use irqs to wait for events 2023-03-27 13:18:59 +02:00
a2272dda08 status and irq flags formatting with defmt 2023-03-27 13:18:59 +02:00
732614579b Merge pull request #1302 from embassy-rs/update-stm32-pac
Update stm32-metapac
2023-03-27 13:09:11 +02:00
cde6f0f862 Merge pull request #50 from kbleeke/async-ioctls
Rework Ioctls to an async state machine
2023-03-27 10:43:53 +00:00
c7646eb699 bring back TODO note about dropping ioctls 2023-03-27 12:40:40 +02:00
4c52104413 simplify ioctl waker code 2023-03-27 12:40:27 +02:00
a33774ec51 Update stm32-metapac 2023-03-27 12:36:31 +02:00
fd3de78b43 Merge pull request #51 from kbleeke/wait-join-open
also wait for join event in join_open
2023-03-27 10:23:06 +00:00
6f547cf05d asyncify outgoing events 2023-03-27 11:48:58 +02:00
4721381225 also wait for join event in join_open 2023-03-27 11:10:29 +02:00
5da6108bec Merge pull request #49 from embassy-rs/ci
Fix build with log, add CI
2023-03-27 05:19:36 +02:00
ed601d439a Add CI. 2023-03-27 03:33:20 +02:00
cffc3fc795 Fix build with log. 2023-03-27 03:33:06 +02:00
bb90bb8c56 Merge pull request #46 from kbleeke/split-lib-rs
split lib.rs into multiple files
2023-03-27 03:17:30 +02:00
8a3a7c65a8 Merge #1291
1291: executor: Allow TaskStorage to auto-implement `Sync` r=Dirbaio a=GrantM11235



Co-authored-by: Grant Miller <GrantM11235@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-26 22:23:00 +00:00
21400da073 executor: Use AtomicPtr for signal_ctx, removes 1 unsafe. 2023-03-27 00:22:00 +02:00
805bca1f5a executor: deduplicate doc comments. 2023-03-27 00:20:24 +02:00
7186e03801 Merge #1299
1299: sync/pipe: update to clarify docs that it is byte-oriented. r=Dirbaio a=Dirbaio

There was some language copypasted from Channel talking about "messages" or "values", that is not really accurate with Pipe.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-26 21:34:01 +00:00
2c45b5c519 sync/pipe: update to clarify docs that it is byte-oriented.
There was some language copypasted from Channel talking about "messages"
or "values", that is not really accurate with Pipe.
2023-03-26 23:32:12 +02:00
9c7b9b7848 Merge #1288
1288: fix(rp): spi transfer r=elpiel a=elpiel

Fixes #1181 

Co-authored-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-26 15:55:58 +00:00
7be63b3468 fix: spi transfer bug and additions to test
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-26 18:14:17 +03:00
e9a5b31fa8 Implement drop for FlashRegions 2023-03-25 17:00:52 +01:00
e8fc7a66a3 Ensure flash module and FlashRegion trait is always defined 2023-03-25 16:32:32 +01:00
bc69eb596e Add is_eraseable_range and split write into consecutive parts 2023-03-25 16:04:45 +01:00
245147634b Add region start to flash sectors 2023-03-25 16:03:06 +01:00
73ccc04231 Change region type name 2023-03-25 13:47:28 +01:00
47d5f127bb Align L family 2023-03-25 13:30:24 +01:00
47e07584ca Align H7 family 2023-03-25 13:03:00 +01:00
c848bd9c9c Align with removal of MemoryRegionKind::Otp 2023-03-25 13:02:42 +01:00
a8567f0617 Align F7 family 2023-03-25 06:26:00 +01:00
99c4346579 Add f7 computation to hal common and add tests 2023-03-25 06:25:12 +01:00
7edd72f8f5 Align F3 family 2023-03-25 06:07:57 +01:00
6c73b23f38 Align F4 family 2023-03-25 05:59:40 +01:00
6b44027eab Add FlashRegion trait and implement embedded_storage traits for each region 2023-03-25 05:58:40 +01:00
cccceb88f2 Generate flash regions during build 2023-03-25 05:57:15 +01:00
d8b265856f Add f4 flash sector computation to hal-common to allow for tests 2023-03-25 05:52:48 +01:00
cd2f28d2ab chore: add spi_async tests for uneven buffers
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-24 12:14:38 +02:00
9939d43800 fix: PR comment
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-24 12:14:23 +02:00
299689dfa2 Merge #1295
1295: (embassy-rp): Add embedded-io blocking Read + Write for BufferedUart r=MathiasKoch a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
2023-03-23 13:27:14 +00:00
88483b5abe Fix return type for EH-nb traits 2023-03-23 14:26:37 +01:00
04f90e3a9d Add embedded-io blocking Read + Write for BufferedUart 2023-03-23 14:18:19 +01:00
ba9afbc26d embassy-boot: add default nightly feature, makes it possible to compile with the stable compiler 2023-03-22 16:49:49 +01:00
20923080e6 split lib.rs into multiple files 2023-03-22 15:35:02 +01:00
8b24fe3df0 Merge pull request #45 from kbleeke/fix-stuck-ioctl
Spawn Wifi Task immediately, Fix #44
2023-03-22 13:56:25 +01:00
369f205962 wifi task needs to be spawned immediately, otherwise ioctls are just stuck (duh). fix #44 2023-03-22 11:33:55 +01:00
33cbc22236 Merge pull request #39 from kbleeke/pio
Use PIO for SPI communication in Pico W example
2023-03-21 19:56:57 +01:00
359b1c7fdb replace inspect() with direct calls to trace!() after awaiting 2023-03-21 19:39:41 +01:00
29494a9296 Merge branch 'master' into pio 2023-03-21 19:32:39 +01:00
f82f931dc2 revert formatting changes in Cargo.toml 2023-03-21 19:30:45 +01:00
3034e8fb45 document response delay quirks in bus code 2023-03-21 19:26:24 +01:00
b4b8d82980 remove use of embedded-hal SPI traits. Instead just call our bus trait directly and push responsibility for implementing CS on the trait implementor 2023-03-21 19:15:54 +01:00
aa77a06d58 Merge #1287
1287: stm32: use stm32-metapac from crates.io, remove stm32-data submodule. r=Dirbaio a=Dirbaio

- `embassy-stm32` uses `stm32-metapac` from `crates.io`.
- Remove `stm32-data` submodule.
- Remove `stm32-metapac`, `stm32-metapac-gen`. These are now in the `stm32-data` repo.
- Remove `stm32-gen-features`, since it used `stm32-data` directly.
  - The feature list in `stm32-metapac` is generated by `stm32-metapac-gen` now.
  - The feature list in `embassy-stm32` can be updated by hand by copypasting from `stm32-metapac`'s `Cargo.toml`. We can add a script to do this automatically later if that's too annoying.
- Remove outdated `xtask` scripts that no longer work. Not needed anymore, you can run CI locally by doing `./ci.sh`.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-21 14:04:10 +00:00
425a35bf8a Merge #1292
1292: perf(pubsub): Skip not needed clone of last message r=Dirbaio a=rmja

... return the pop'd message instead

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-03-21 12:29:29 +00:00
ce7bd6955f perf(pubsub): Skip clone on last message 2023-03-21 13:25:49 +01:00
41d558a5f4 executor: Allow TaskStorage to auto-implement Sync 2023-03-20 17:08:15 -05:00
7a4db1da26 fix(rp): spi transfer
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-20 16:34:30 +02:00
0b49b588a2 stm32: use stm32-metapac from crates.io, remove stm32-data submodule. 2023-03-20 02:38:12 +01:00
b6663a013f Merge #1274
1274: Example using the PIO to drive WS2812 aka Neopixel RGB leds r=Dirbaio a=CBJamo

This example also uses a pio program compiled at runtime, rather than one built at compile time. There's no reason to do that, but it's probably useful to have an example that does this as well.

Co-authored-by: Caleb Jamison <Caleb@hellbender.com>
2023-03-19 23:43:41 +00:00
3e541c43e7 Merge #1282
1282: fix(pubsub): Pop messages with count=0 after unsubscribe r=Dirbaio a=rmja



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-03-19 23:19:23 +00:00
0e946dfb20 Merge pull request #42 from kbleeke/events-join
add event handling to join
2023-03-19 23:20:33 +01:00
fcd24adba9 vscode: recommend extensions, disable toml formatting, update. 2023-03-19 22:38:34 +01:00
b411b7ce63 vscode: recommend extensions, disable toml formatting, update. 2023-03-19 22:36:18 +01:00
ee3d284609 Merge pull request #43 from jakewins/patch-1
Update pre-flashed command to match file name
2023-03-19 21:33:16 +01:00
67743bb122 Update pre-flashed command to match file name
Super minor, just to help the next person avoid the little stumble.
2023-03-19 19:16:26 +01:00
1b410d6f3f add event handling to join 2023-03-19 17:48:41 +01:00
a6a2a035d5 even faster pio speed are possible 2023-03-19 17:00:45 +01:00
0ff606dfc1 Add pio transport to pico w example 2023-03-19 16:58:22 +01:00
d57fe0de86 Custom Bus Trait to support PIO 2023-03-19 16:57:54 +01:00
4bfe624893 Merge #1285
1285: Add must_use to OnDrop r=Dirbaio a=rmja



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-03-17 14:38:19 +00:00
7be385dbb1 Add must_use to OnDrop 2023-03-17 11:40:19 +01:00
f9c0c53e12 Merge #1284
1284: Fix APB clock calculation for several STM32 families r=Dirbaio a=ericyanush

This PR fixes #1283

Co-authored-by: Eric Yanush <eric@yanu.sh>
2023-03-17 07:49:09 +00:00
13f0c64a8c Fix APB clock calculation for several STM32 families 2023-03-16 21:21:39 -06:00
472df3fad6 fix(pubsub): Pop messages which count is 0 after unsubscribe 2023-03-15 16:45:18 +01:00
2c9f289f40 Merge #1281
1281: Wait for waker when no data is available on UDP socket. r=Dirbaio a=royb3



Co-authored-by: Roy Buitenhuis <roy.buitenhuis@technolution.nl>
2023-03-15 12:59:11 +00:00
46b437dea0 Wait for waker when no data is available on UDP socket. 2023-03-15 13:56:40 +01:00
e33b99e9ec Merge pull request #40 from Slushee-a/master
Add from_utf8 for a clearer example
2023-03-14 18:42:27 +01:00
e9a161b462 Merge #1279
1279: stm32: remove unused embedded-storage-async. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-14 16:28:47 +00:00
43462947ed stm32: remove unused embedded-storage-async. 2023-03-14 17:27:40 +01:00
e73c6c9d90 Merge #1277
1277: (embassy-rp): Allow upgrading a blocking uart to a BufferedUart r=MathiasKoch a=MathiasKoch

Also implement blocking embedded-nal serial traits for BufferedUart

Co-authored-by: Mathias <mk@blackbird.online>
2023-03-14 12:08:51 +00:00
89a371d10c Add HIL test for into_buffered uart on embassy-rp 2023-03-14 12:46:58 +01:00
bce1ce7dcb Allow upgrading a blocking uart to a BufferedUart, and implement blocking serial traits for BufferedUart 2023-03-14 10:36:30 +01:00
12d6e37b3f Example using the PIO to drive WS2812 aka Neopixel RGB leds
This example also uses a pio program compiled at runtime, rather than one built at compile time. There's no reason to do that, but it's probably useful to have an example that does this as well.
2023-03-11 02:58:28 -05:00
055597063f Merge #1270
1270: time: add power-of-2 kHz tick rates. r=Dirbaio a=Dirbaio

Fixes #1269

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-09 22:32:51 +00:00
79061021f9 time: add power-of-2 kHz tick rates.
Fixes #1269
2023-03-09 23:32:00 +01:00
c9d89f391b Merge #1264
1264: Add multicast to udp socket r=Dirbaio a=28Smiles

This should make it possible to implement mDNS for embassy-net, which in turn is essential for smart home

Co-authored-by: Leon Camus <leon.c@gmx.de>
Co-authored-by: 28Smiles <Leon.c@gmx.de>
2023-03-08 12:16:23 +00:00
e484cb1b87 refactor: Multicast method modifiers on stack to public
revert: udp.rs
2023-03-08 12:37:00 +01:00
8fd30e407c Merge #1267
1267: macros: better validation of function signatures. r=Dirbaio a=Dirbaio

Fixes #1266

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-08 08:17:44 +00:00
b2c6dc45e3 Fix examples broken by the macro fix. 2023-03-08 09:17:01 +01:00
969e85150c Merge #1262
1262: bump embedded-storage-async to 0.4 r=Dirbaio a=mehmetalianil

I just haven't found a way to revert the altered stm-metapac contents due to building. 

Co-authored-by: Mehmet Ali Anil <mehmet@grusbv.com>
2023-03-08 01:26:45 +00:00
e7a19a9725 macros/main: copy fn return to task.
This prevents this bad code from compiling.

```rust
async fn main(_spawner: Spawner) -> ! {
    // not really noreturn!
}
```
2023-03-08 02:03:39 +01:00
a614e697d0 macros: better validation of function signatures.
Fixes #1266
2023-03-08 01:59:06 +01:00
993875e11f fix: Add qualified imports 2023-03-07 23:52:25 +01:00
2087561003 lint: Remove unused imports 2023-03-07 23:51:10 +01:00
b62e3e1d47 lint: Cargo fmt 2023-03-07 23:40:31 +01:00
468c4266c8 Merge branch 'embassy-rs:master' into master 2023-03-07 23:39:16 +01:00
18646c579c Merge branch 'emb-storage-async-0p4' of https://github.com/Grus-BV/embassy into emb-storage-async-0p4 2023-03-07 23:36:41 +01:00
b1bc034a7e Merge branch 'emb-storage-async-0p4' of https://github.com/Grus-BV/embassy into emb-storage-async-0p4 2023-03-07 23:35:56 +01:00
fded9fa52a Merge branch 'emb-storage-async-0p4' of https://github.com/Grus-BV/embassy into emb-storage-async-0p4 2023-03-07 23:21:39 +01:00
6bf8d090a1 Merge branch 'emb-storage-async-0p4' of https://github.com/Grus-BV/embassy into emb-storage-async-0p4 2023-03-07 23:21:19 +01:00
4054fb8779 Merge branch 'emb-storage-async-0p4' of https://github.com/Grus-BV/embassy into emb-storage-async-0p4 2023-03-07 23:17:28 +01:00
935633c90b Merge upstream 2023-03-07 23:16:54 +01:00
bd4c4209af Merge #1265
1265: nrf/uicr: only check lowest bit. r=Dirbaio a=Dirbaio

This mirrors what nrfx does. Also it won't reboot/warn if NFCPINS is set to either 0xFFFF_FFFE or 0x0000_0000, which are all valid.


bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-07 14:30:22 +00:00
27e989afa9 nrf/uicr: only check lowest bit.
This mirrors what nrfx does. Also it won't reboot/warn if NFCPINS is set to either
0xFFFF_FFFE or 0x0000_0000, which are all valid.
2023-03-07 15:28:27 +01:00
b0e26440ee Merge upstream 2023-03-07 10:47:56 +01:00
bc0cb43307 Bump embedded-storage-async to 0.4 2023-03-06 22:16:36 +01:00
c22218c72e feat: Add multicast to udp socket 2023-03-06 18:43:37 +01:00
18fe398673 Merge pull request #1224 from embassy-rs/interrupt-binding
nrf: new interrupt binding traits/macro
2023-03-06 00:41:47 +01:00
f5e09a8f4a nrf/interrupt: do not reexport take! macro. 2023-03-06 00:17:51 +01:00
5249996d28 nrf/usb: switch to new interrupt binding, fix vbus detect on nrf53. 2023-03-06 00:17:51 +01:00
5913553cb1 nrf/twis: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
36319fc121 nrf/temp: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
9e58d9274c nrf/twim: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
9f5762d365 nrf/spis: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
a32e82029a nrf/spim: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
2dc5608203 nrf/saadc: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
d113fcfe32 nrf/rng: make available on all chips, use Instance trait, switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
96788ac93a nrf/qspi: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
c66b28e759 nrf/qdec: make available on all chips, use Instance trait, switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
f8f1d3bcf0 nrf/pdm: make available on all chips, use Instance trait, switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
34563b74aa nrf/i2s: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
63b75eaf64 nrf/timer: remove awaitable. 2023-03-06 00:17:51 +01:00
9cf000ef4e nrf/uart: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
42c13c8c3d nrf: add new interrupt binding traits and macro. 2023-03-06 00:17:51 +01:00
a054891263 cortex-m: rename Handler to DynHandler.
I want to use the name Handler for the new interrupt binding macro.
2023-03-06 00:17:51 +01:00
403a83e08d Merge #1260
1260: time/ticker: make sure the future for .next() is Unpin. r=Dirbaio a=Dirbaio

It was Unpin before #1248 

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-05 22:15:14 +00:00
c88bbaa5ec time/ticker: make sure the future for .next() is Unpin. 2023-03-05 23:13:22 +01:00
6dfda69cc4 readme: add embassy-rp 2023-03-05 20:19:18 +01:00
bf013be9ba Merge pull request #1232 from embassy-rs/nrf-qspi-fixes
nrf/qspi: nrf53 support, u32 addrs, remove const generic, add raw read/write.
2023-03-05 03:19:11 +01:00
d91efe3e62 Merge pull request #1208 from embassy-rs/nrf-uarte-lockfree
nrf/buffered_uarte: make it work without rts/cts, and lock-free.
2023-03-05 02:56:15 +01:00
f7dfc49c5c nrf/qspi: add _raw variants of methods that don't do bounds checks.
Useful for the nRF7002, which presents as a "fake" QSPI flash, and
the "capacity" concept doesn't really apply to it.
2023-03-05 02:55:00 +01:00
8eb8ea6174 nrf/qspi: remove FLASH_SIZE const generic param. 2023-03-05 02:33:02 +01:00
75f69803af nrf/qspi: always use u32 for addresses. 2023-03-05 02:30:53 +01:00
1955a225e8 nrf/qspi: add nrf53 support. 2023-03-05 02:17:59 +01:00
9eb65b11cb nrf/qspi: remove cfg_if hack 2023-03-05 02:08:29 +01:00
7650fea5f2 nrf/buffered_uarte: add HIL tests. 2023-03-04 15:12:49 +01:00
916f94b366 nrf/buffered_uarte: make available on stable. 2023-03-04 15:12:49 +01:00
ccc224c81f nrf/buffered_uarte: remove PeripheralMutex, make it work without rts/cts.
> dirbaio: so I was checking how zephyr does UARTE RX on nRF
> dirbaio: because currently we have the ugly "restart DMA on line idle to flush it" hack
> dirbaio: because according to the docs "For each byte received over the RXD line, an RXDRDY event will be generated. This event is likely to occur before the corresponding data has been transferred to Data RAM."
> dirbaio: so as I understood it, the only way to guarantee the data is actually transferred to RAM is to stop+restart DMA
> dirbaio: well, guess what?
> dirbaio: they just count RXDRDY's, and process that amount of data without restarting DMA
> dirbaio: with a timer configured as counter https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/serial/uart_nrfx_uarte.c#L650-L692
> dirbaio: 🤔🤷⁉️
> dirbaio: someone saying you can do the "hook up rxdrdy to a counter" trick, someone else saying it's wrong 🤪 https://devzone.nordicsemi.com/f/nordic-q-a/28420/uarte-in-circular-mode

So we're going to do just that!

- BufferedUarte is lock-free now. No PeripheralMutex.
- The "restart DMA on line idle to flush it" hack is GONE. This means
  - It'll work correctly without RTS/CTS now.
  - It'll have better throughput when using RTS/CTS.
2023-03-04 15:12:49 +01:00
bef559307c Merge pull request #1259 from dalegaard/master
embassy_usb: Add split() for cdc_acm
2023-03-04 15:08:02 +01:00
7b9075130e embassy_usb: Add split() for cdc_acm 2023-03-04 10:36:10 +01:00
51478caad8 nrf/timer: add support for counter mode. 2023-03-04 05:37:33 +01:00
4314b823aa nrf: add PPI channel group driver. 2023-03-04 05:37:33 +01:00
78d733fc73 Merge pull request #1258 from CBJamo/rp-gpio-loglevel
Swap debug! for trace! in rp gpio
2023-03-02 22:18:01 +01:00
7bdb3abad7 Swap debug! for trace! in rp gpio
When using gpio pin changes for things like peripheral interrupts these
debug! calls flood defmt, making it difficult to find what you're
actually looking for.
2023-03-02 13:59:52 -05:00
14ed0b90b8 Merge pull request #1257 from MabezDev/docs/add-esp-hal
docs: add esp-hal
2023-03-02 17:57:39 +01:00
64003cdfd6 Add embassy-esp README 2023-03-02 16:56:58 +00:00
8bd8fbd131 Merge pull request #1256 from pattop/hal_common_atomic_ring_buffer_push_slices
hal-common/atomic_ring_buffer: add push_bufs() push_slices()
2023-03-02 17:26:43 +01:00
78974dfeb4 hal-common/atomic_ring_buffer: add push_bufs() push_slices()
This allows a writer to access all of the free space in the buffer, even
when it's wrapping around.
2023-03-02 14:11:49 +11:00
4ac257adb9 Merge #1255
1255: common: allow atomic ringbuf to fill up to N instead of just N-1. r=Dirbaio a=Dirbaio

Extracted out of #1208. Since I don't think that'll end up using the ringbuf in the end, I've separated it.

This allows the ringbuf to be filled up to `N` instead of just `N-1`, using some fun tricks on the indices. 

The advantage is better performance: Before, the first write would fill N-1 bytes, The second would write just the 1 byte left before wrapping, then N-2. Then 2, then N-3, and so on. This would result in more smaller chunks, so worse perf. This problem is gone now.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-03-02 00:01:49 +00:00
f95aafc90e common: allow atomic ringbuf to fill up to N instead of just N-1.
This allows the ringbuf to be filled up to `N` instead of just `N-1`, using some fun tricks on the indices.

The advantage is better performance: Before, the first write would fill N-1 bytes, The second would write just the 1 byte left before wrapping, then N-2. Then 2, then N-3, and so on. This would result in more smaller chunks, so worse perf. This problem is gone now.
2023-03-02 01:01:19 +01:00
c4f4aa10f9 Merge pull request #1244 from embassy-rs/interruptexecutor
cortex-m/executor: don't use the owned interrupts system.
2023-03-01 22:38:27 +01:00
206b4b597e Merge pull request #1254 from davidedellagiustina/fix
FIx `PacketQueue::init()`
2023-03-01 22:23:03 +01:00
c0e40b887b Apply fix 2023-03-01 20:57:13 +00:00
351e4407ef Merge pull request #1252 from pattop/stm32_spi_fifo_fix
stm32/spi: fix occasional data corruption
2023-03-01 03:08:05 +01:00
aabc275186 stm32/spi: fix occasional data corruption
Need to clear the rx fifo before enabling rx dma.
2023-03-01 12:24:22 +11:00
66ca57312f Merge pull request #1251 from embassy-rs/fix-examples
Example fixes.
2023-03-01 01:59:41 +01:00
6dbb631f1e Example fixes. 2023-03-01 01:32:42 +01:00
4dfa32b1e0 cortex-m/executor: don't use the owned interrupts system.
Preparation for #1224.
2023-02-28 23:07:20 +01:00
711ce10145 Merge #1245
1245: fix: rp - disable Pull-down/up resistors for ADC read r=Dirbaio a=elpiel



Co-authored-by: Lachezar Lechev <elpiel93@gmail.com>
2023-02-28 19:31:58 +00:00
b16b3b0dbb Merge #1247
1247: `PacketQueue::init()` r=davidedellagiustina a=davidedellagiustina

`PacketQueue` is pretty big, so I added a method to initialize it without requiring an allocation on the stack (which could in fact overflow). Before this PR, the only solution would be to declare a `PacketQueue` instance as a `static mut`, while now one could for example have a `Box<MaybeUninit<PacketQueue<...>>>` and then use `init()` on it.

Ideally, the same work would need to be done for all those structures that own big arrays which could overflow the stack.

Co-authored-by: Davide Della Giustina <davide@dellagiustina.com>
2023-02-28 18:26:37 +00:00
3c601bf8d2 PacketQueue::init() does not need to be unsafe 2023-02-28 18:04:43 +00:00
485bb76e46 Implemented suggestions from @Dirbaio 2023-02-28 17:39:02 +00:00
d719f8bc03 Merge #1248
1248: embassy-time: add async tick() method to Ticker r=Dirbaio a=kbleeke

Small QOL change so you don't have to add a direct dependency on futures-util to use the Ticker

Co-authored-by: kbleeke <pluth@0t.re>
2023-02-28 17:12:13 +00:00
4e212c7a0b embassy-time: add async tick() method to Ticker 2023-02-28 17:25:42 +01:00
c1e93c0904 PacketQueue::new() uses ::init() when in nightly 2023-02-28 14:34:26 +00:00
90f2939bf6 Added PacketQueue::init() 2023-02-28 14:22:54 +00:00
5cb0c8cc01 fix: rp - disable Pull-down/up resistors for ADC read
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-02-28 09:22:38 +02:00
28b695e7c9 Merge #1243
1243: RP-PICO UART adding set_baudrate r=Dirbaio a=andres-hurtado-lopez

The following PR attepts to bring fuctionality to allow change od UART baudrate changes during runtime.

Changes where created under `@Dirbaio` supervision and discussed on issue:

[https://github.com/embassy-rs/embassy/issues/1241#issuecomment-1445500175]( https://github.com/embassy-rs/embassy/issues/1241#issuecomment-1445500175)

Co-authored-by: Andres Hurtado Lopez <andresh@cultivate-agri.com>
2023-02-27 02:26:20 +00:00
2331d58aa6 RP-PICO UART adding set_baudrate: missing to run rust-fmt 2023-02-26 21:23:51 -05:00
482ba835c4 RP-PICO UART adding set_baudrate: Changing static call from specific type to a Self (requires adding lifetime specifier) 2023-02-26 19:20:08 -05:00
7172dfd083 RP-PICO UART adding set_baudrate: refactoring of methods 2023-02-26 19:14:25 -05:00
8fb380b180 RP-PICO UART adding set_baudrate 2023-02-26 18:40:23 -05:00
bc71230cd0 examples/std: fix net running out of sockets. 2023-02-26 21:50:12 +01:00
5367baa845 Merge #1238
1238: embassy-net: DNS resolver detects when name is just an IP address r=lulf a=kbleeke

fixes #1237 

I am not sure, if this is the right place to put this code. Alternatively, It could be in dns::DnsSocket or reqwless (and all other libraries that need to maybe resolve hostnames).

Are there other DNS query-types where it would make sense to try to parse an IP address?

Co-authored-by: kbleeke <pluth@0t.re>
2023-02-26 08:22:38 +00:00
d5f88e578c embassy-net: DNS resolver detects when name is just an IP address and returns immediately 2023-02-25 21:52:15 +01:00
64247ae456 Merge #1236
1236: Add `#[must_use]` to all futures r=Dirbaio a=GrantM11235

I think that's all of them, I just grep'd for `impl.* Future for`

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2023-02-24 19:20:32 +00:00
7be4337de9 Add #[must_use] to all futures 2023-02-24 13:01:41 -06:00
2209bef4f2 Merge #1231
1231: embassy-time: Implement conversions to/from core::time::Duration for embassy-time::Duration r=Dirbaio a=kbleeke

I chose microseconds for the conversion as the lowest resolution that embassy provides. A new Error-type did not seem that useful but I can add one, if necessary.

Co-authored-by: kbleeke <pluth@0t.re>
2023-02-23 18:33:47 +00:00
43a4409405 embassy-time: Implement conversions to/from core::time::Duration for embassy-time::Duration 2023-02-23 19:25:22 +01:00
3255e0a172 Merge #1228
1228: stm32/sdmmc: Implement proper clock configuration r=chemicstry a=chemicstry

This implements proper clock configuration for sdmmc based on chip family, because `RccPeripheral::frequency()` is almost always incorrect. This can't be fixed in PAC, because sdmmc uses two clock domains, one for memory bus and one for sd card. `RccPeripheral::frequency()` usually returns the memory bus clock, but SDIO clock calculations need sd card domain clock. Moreover, chips have multiple clock source selection bits, which makes this even more complicated. I'm not sure if it's worth implementing all this logic in `RccPeripheral::frequency()` instead of cfg's in sdmmc.

Some chips (Lx, U5, H7) require RCC updates to expose required clocks. I didn't want to mash everything in a single PR so left a TODO comment. I also left a `T::frequency()` fallback, which seemed to work in H7 case even though the clock is most certainly incorrect.

In addition, added support for clock divider bypass for sdmmc_v1, which allows reaching a maximum clock of 48 MHz. The peripheral theoretically supports up to 50 MHz, but for that ST recommends setting pll48 frequency to 50 MHz 🤔

Co-authored-by: chemicstry <chemicstry@gmail.com>
2023-02-23 16:22:31 +00:00
73ef85b765 stm32/sdmmc: Fix compile errors 2023-02-23 18:00:55 +02:00
f0f92909c1 Merge #1227
1227: stm32/dma: fix spurious transfer complete interrupts r=Dirbaio a=pattop

DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
2023-02-23 15:44:43 +00:00
896764bb85 stm32/sdmmc: Refactor TypeId into a macro 2023-02-23 17:38:52 +02:00
42462681bd stm32/sdmmc: Implement proper clock configuration 2023-02-23 16:57:21 +02:00
4e884ee2d2 stm32/dma: fix spurious transfer complete interrupts
DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.
2023-02-23 10:12:48 +11:00
dda5a4cc9d Merge #1225
1225: nrf: rename UARTETWISPIn -> SERIALn r=Dirbaio a=Dirbaio

The UARTETWISPIn naming is quite horrible. With the nRF53, Nordic realized this and renamed the interrupts to SERIALn. Let's copy that for our peripheral names, in nrf53 and nrf91.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-22 14:43:17 +00:00
464faa2a04 Merge #1226
1226: embassy-net: Implement flush for TcpSocket r=Dirbaio a=kbleeke

Implements flush for TcpSocket by checking the send queue. 

Flushing is implemented by checking if smoltcp's send_queue/tx_buffer is empty. The flush is completed when all outstanding octets are acknowledged. Smoltcp wakes the send waker [here](https://docs.rs/smoltcp/latest/src/smoltcp/socket/tcp.rs.html#1712) when ACKs are processed and data is removed from the send buffer. So we can re-check in our flush implementation, if the buffer is now empty.

fixes #1223



Co-authored-by: kbleeke <pluth@0t.re>
2023-02-22 14:27:19 +00:00
035de6f3ff embassy-net: add flush to TcpSocket and TcpWriter as an inherent method 2023-02-22 14:45:17 +01:00
f1a4db44c4 Implement flush for TcpSocket 2023-02-22 13:57:40 +01:00
ada3d5be7c nrf: rename UARTETWISPIn -> SERIALn
The UARTETWISPIn naming is quite horrible. With the nRF53, Nordic realized this
and renamed the interrupts to SERIALn. Let's copy that for our peripheral names, in nrf53 and nrf91.
2023-02-21 22:41:23 +01:00
f6f041b05d Add from_utf8 2023-02-21 08:52:57 +01:00
f34829f534 Add stringify function 2023-02-20 21:03:39 +01:00
b05cd77a62 Merge #1170
1170: nrf: add support for UICR configuration. r=Dirbaio a=Dirbaio

- APPROTECT enable/disable. Notably this fixes issues with nrf52-rev3 and nrf53 from locking itself at reset.
- Use NFC pins as GPIO.
- Use RESET pin as GPIO.

NFC and RESET pins singletons are made available only when usable as GPIO, for compile-time checking.

TODO: test
- [x] nrf52 rev1
- [x] nrf52 rev3
- [x] nrf53
- [x] nrf91

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-20 00:47:15 +00:00
7fa478358a nrf: warn if uicr configuration could not be written.
If the user requests some configuration, but UICR is already programmed
to something else, detect this and warn the user.

We don't do it for the debug port settings, because if they are wrong
then the user will simply not be able to read debug logs.
2023-02-20 01:31:02 +01:00
3f88bf6f9b nrf: add support for UICR configuration.
- APPROTECT enable/disable. Notably this fixes issues with nrf52-rev3 and nrf53 from locking itself at reset.
- Use NFC pins as GPIO.
- Use RESET pin as GPIO.

NFC and RESET pins singletons are made available only when usable as GPIO,
for compile-time checking.
2023-02-20 01:28:45 +01:00
a2bd37be40 Merge #1221
1221: examples/stm32wb: do not reserve words at start of RAM. r=Dirbaio a=Dirbaio

They're used to communicate from the app to ST's OTA bootloader. See AN5247. 

This bootloader is optional, must be flashed by the user, and requires changing the FLASH start address as well, so the current memory regions still require modifications to use it. Therefore there's no point in reserving these words.

Thanks `@adamgreig` for investigating the purpose.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-20 00:01:22 +00:00
13328c58d3 examples/stm32wb: do not reserve words at start of RAM.
They're used to communicate from the app to ST's OTA bootloader. See AN5247. 

This bootloader is optional, must be flashed by the user, and requires changing the FLASH start address as well, so the current memory regions still require modifications to use it. Therefore there's no point in reserving these words.

Thanks @adamgreig for investigating the purpose.
2023-02-20 01:01:01 +01:00
1567e724f9 Merge #1218 #1219
1218: Lora: sx126x: Change timing window to match values found experimentally. r=Dirbaio a=CBJamo

As mentioned in #1188.

1219: stm32/sdmmc: Fix SDIOv1 writes r=Dirbaio a=chemicstry

This fixes writes on sdmmc v1 (SDIO). I'm pretty sure I tested writes in #669, but maybe I was just lucky or I just forgot.

There were two problems:
- Writes require DMA FIFO mode, otherwise SDIO FIFO is under/overrun depending on sdio/pclk2 clock ratio.
- Hardware flow control is broken for sdmmc v1 (I checked F1 and F4 erratas). This causes clock glitches above 12 MHz and results in write CRC errors.

Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
Co-authored-by: chemicstry <chemicstry@gmail.com>
2023-02-19 23:01:44 +00:00
4ad255b34b Merge #1217
1217: Fix a typo in "PioPeripheral" r=Dirbaio a=SekoiaTree

Renames "PioPeripherial" to "PioPeripheral" (without the second i).

Co-authored-by: sekoia <sequoia.1009@gmail.com>
2023-02-19 22:46:57 +00:00
4fd59f26fb Merge #1220
1220: examples/stm32wb: fix linker script. r=Dirbaio a=Dirbaio

cortex-m-rt 0.7.2 now enforces the stack is 8-byte aligned. Stack is placed at `ORIGIN(RAM) + LENGTH(RAM)` by default, which wasn't 8-byte-aligned. See https://github.com/rust-embedded/cortex-m/discussions/469

ST trims 8 bytes from start of RAM, and uses the whole 192kb, so let's just copy that:

bceb1dae09/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/linker/stm32wb55xx_flash_cm4.ld (L48)

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-19 22:03:13 +00:00
272982ee54 examples/stm32wb: fix linker script.
cortex-m-rt 0.7.2 now enforces the stack is 8-byte aligned. Stack is placed
at `ORIGIN(RAM) + LENGTH(RAM)` by default, which wasn't 8-byte-aligned. See https://github.com/rust-embedded/cortex-m/discussions/469

ST trims 8 bytes from start of RAM, and uses the whole 192kb, so let's just
copy that:

bceb1dae09/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/linker/stm32wb55xx_flash_cm4.ld (L48)
2023-02-19 23:02:31 +01:00
a53f525f51 stm32/sdmmc: Fix SDIOv1 writes 2023-02-18 01:37:06 +02:00
7783e0ebb1 Change timing window to match values found experimentally. 2023-02-17 07:43:19 -05:00
e641db1f75 Fix a typo in "PioPeripheral" 2023-02-15 14:10:07 +01:00
e3492862e9 Merge pull request #38 from overheat/master
update embassy dependences
2023-02-15 12:34:45 +01:00
0bcd1b1e10 update embassy dependences 2023-02-15 11:08:27 +08:00
e3f8020c3b Merge #1215
1215: Add clone to embassy_rp::gpio::Level r=Dirbaio a=Slushee-a

Allows you to wite a cleaner state change detector. Example:
```rs
let mut button_state: Level = Level::Low;
let mut prev_button_state: Level = button_state;

loop {
    button_state = button.get_level();

    if prev_button_state != button_state {
        led.set_level(button_state);  // Takes ownership of button_state. 
    }

    prev_button_state = button_state; // Can't be done since the ownership has been moved.
                                      // Adding Clone makes this code possible
}
```

Co-authored-by: Slushee <55996847+Slushee-a@users.noreply.github.com>
2023-02-13 17:31:47 +00:00
dfc58ad3a2 Add copy to Level enum in embassy-rp gpio module 2023-02-13 17:29:35 +00:00
1626a4a74b Add clone to embassy_rp::gpio::Level 2023-02-13 17:12:50 +00:00
5e74926907 feature-gate variants without vals defined 2023-02-13 15:46:49 +01:00
218b44652c Rebase on master 2023-02-13 14:55:15 +01:00
41a563aae3 net: document all features 2023-02-13 03:11:16 +01:00
363054de98 stm32: doc all chips. 2023-02-13 03:02:12 +01:00
06abde8676 Merge #1213
1213: stm32: fix fmc-related build failures on some F4's r=Dirbaio a=Dirbaio

f413vh has a peripheral named `FSMC` but using the `FMC` regs. This might be a mistake? `@rmja`

Fix build for now, we can investigate later if the regs are OK.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-13 01:40:58 +00:00
4e15043fc2 add stm32f413vh to CI 2023-02-13 02:40:29 +01:00
951f208915 Add more crates to docs. 2023-02-13 02:39:03 +01:00
1e36c91bf8 stm32: fix fmc-related build failures on some F4's 2023-02-13 02:22:06 +01:00
80b7c3cf69 Fix doc build. 2023-02-13 01:30:53 +01:00
d159a6c62d Merge #1211
1211: Fix rcc prescaler for wl55 HCLK1 r=lulf a=chrenderle

fix "prescaler none" which incorrectly set "prescaler divided by 3"
Issue: #1168 

Co-authored-by: Christian Enderle <mail@chrenderle.de>
2023-02-12 11:00:22 +00:00
d21643c060 fix "prescaler none" which incorrectly set "prescaler divided by 3" 2023-02-12 11:36:57 +01:00
e1eac15c42 Merge pull request #1185 from embassy-rs/dns-impl
Add DNS socket to embassy-net
2023-02-10 23:53:25 +01:00
76642b3a3c fix h7 examples 2023-02-10 23:35:44 +01:00
20c1dd112c Merge #1210
1210: nrf/qspi: do not panic when canceling futures. r=Dirbaio a=Dirbaio

QSPI can't cancel DMA transfers. Before we'd panic on cancel, now we blocking-wait instead.

Blocking is not great, but it's better than panicking, especially when using code that's hardware-agnostic through the embedded-storage traits.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-10 22:13:56 +00:00
4c4e923e05 nrf/qspi: do not panic when canceling futures. 2023-02-10 23:03:16 +01:00
a509af4bc0 exmaples/dns: don't use the socket. 2023-02-10 23:00:16 +01:00
a2b8921ff3 fix: cfg guard for ipv6 2023-02-10 19:38:17 +01:00
128a453163 remove unneeded features 2023-02-10 19:04:54 +01:00
a7d3ef9122 scope dns operations within a cfged block 2023-02-10 19:00:00 +01:00
32c3725631 add waker for DNS slots 2023-02-10 18:44:51 +01:00
48dff04d64 Bump max queries 2023-02-10 18:34:21 +01:00
472473d8c1 Create slice using ::Owned 2023-02-10 18:32:35 +01:00
6e68353a93 attempt removing option 2023-02-10 18:30:17 +01:00
7ae47cb1d8 Expose api on Stack and add doc
Make it work with smoltcp 0.9
2023-02-10 18:20:50 +01:00
cd440a49d6 Rewrite to use a single socket 2023-02-10 17:46:08 +01:00
614740a1b2 cargo fmt 2023-02-10 17:45:25 +01:00
c203cefe01 Handle cancellation 2023-02-10 17:45:19 +01:00
9cfea693ed Add DNS socket to embassy-net 2023-02-10 17:45:03 +01:00
023b0d5b22 Merge #1209
1209: Time: Add from_hz function for Duration. r=Dirbaio a=CBJamo

I found myself doing things like this

```rust
    let rate_us = 1_000_000 / rate_hz;
    let mut ticker = Ticker::every(Duration::from_micros(rate_us));
```

Several times, and figured it was worth adding a little convenience function to handle that. This also makes the calculation const, which is a nice little upside. The compiler might have been doing that already, but this makes sure. 

Speaking of const, would it be better to give hz as a float? Obviously we'd want to avoid that at runtime since many targets don't have a fpu, but if it's at compile time that doesn't matter and a float may be more ergonomic.

Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
2023-02-10 02:19:31 +00:00
bd7b3bd455 Clamp ticks to 1 and round to nearest. 2023-02-09 20:57:27 -05:00
a4371e9544 Add from_hz function for Duration. 2023-02-09 19:22:06 -05:00
e1a0df7d46 Merge #1205
1205: stm32/rng Fix rng generation lock-up r=Dirbaio a=lucasgranberg

This PR fixes a problem where the device gets locked in case of rng errors.

The PR also includes a hack for stm32wl based devices where the more complicated RNG peripheral can get stuck on seed errors.

Co-authored-by: Lucas Granberg <lukkeg@gmail.com>
2023-02-09 11:39:52 +00:00
2b6654541d rustfmt 2023-02-09 13:01:44 +02:00
43d018b67f Use rng_v2 cfg instead of chip specific for seed error recover hack 2023-02-09 12:44:20 +02:00
ab4b3fa96d update stm32-data to include rng_v2 2023-02-09 12:42:57 +02:00
26474ce6eb Merge pull request #1207 from embassy-rs/net-driver-reexport
net: reexport driver crate.
2023-02-08 18:25:51 +01:00
5edb3052e6 net: reexport driver crate. 2023-02-08 17:52:02 +01:00
13666c9f12 Merge pull request #1206 from embassy-rs/update-nightly
Update Rust nightly.
2023-02-08 17:34:01 +01:00
ac3e225988 Update Rust nightly. 2023-02-08 17:13:19 +01:00
bab4277a86 hack for STM32WL, rcc reset in case of seed error
The STM32WL series has a more complicated rng device that gets stuck
when there is a seed error.
2023-02-08 17:57:37 +02:00
da6b1e8399 Reset rng in case of clock or seed error 2023-02-08 17:52:49 +02:00
9d637070a5 Merge #1203
1203: usb: unify ControlHandler+DeviceStateHandler, route all control requests to all handlers. r=Dirbaio a=Dirbaio

depends on #1202 

- Allows classes to handle vendor requests. (fixes #1078)
- Allows classes to use a single handler for multiple interfaces.
- Allows classes to access the other events (previously only `reset` was available).

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-07 23:31:24 +00:00
86487db5d1 usb: use InterfaceNumber in msos. 2023-02-08 00:30:53 +01:00
3af991ab63 usb: unify ControlHandler+DeviceStateHandler, route all control requests to all handlers.
- Allows classes to handle vendor requests.
- Allows classes to use a single handler for multiple interfaces.
- Allows classes to access the other events (previously only `reset` was available).
2023-02-08 00:17:08 +01:00
1d841cc8ac usb: make max interface count configurable at compile time. 2023-02-08 00:16:04 +01:00
4a224efe75 Merge #1200
1200: feat(stm32): Add 16 data bit fmc ctor r=Dirbaio a=rmja

This has been validated with the Is42s16400j sdram on stm32f429.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-02-07 22:24:15 +00:00
c4a2c62096 Merge #1199
1199: STM32 SPI: Set clk-pin pull-up/-down to match spi clock polarity r=Dirbaio a=jr-oss

Fixes #1094 

There are some proposed solutions in #1094 

> Keep the DMA transaction open across calls to read/write
        This may be problematic if the user changes bus settings between calls, and also the reference manual says the chip should not be placed into low power mode while SPI is enabled

As already described, this is problematic and against reference manual recommendation

>    Set the CLK (and maybe MOSI) pins as pull-down on setup (or pull-up, depending on config - and this would need to be updated if the user modified the config)
        This is less good than driving the pin to the correct value, but may be better than nothing

That is also my preferred solution. See below citation from reference manual.

>    Document this and require users fix it themselves (add a pull-up/down resistor - or configure the pins as pull-up/pull-down before passing them into SPI setup)

Setting internal pull-up/-down won't work, because `sck.set_as_af()` will change the gpio pull mode to none: https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/gpio.rs#L552-L555

>    Dig around in the reference manual and determine if there is a better way to start/stop a DMA transaction while keeping active control of the clock the whole time

I haven't found a better way

------
From ST reference manual RM0394 (L4) 
(Same note in RM0399 (H7) / RM0038 (L1) / RM0316 /F3)):

    40.4.6
    Communication formats
    ...
    The idle state of SCK must correspond to the polarity selected in the SPIx_CR1 register (by
    pulling up SCK if CPOL=1 or pulling down SCK if CPOL=0).


Co-authored-by: Ralf <jr-oss@gmx.net>
2023-02-07 22:06:25 +00:00
366fab5b87 Merge #1189
1189: USB: Add MS OS Descriptors (alternate implementation) r=Dirbaio a=alexmoon

This is an alternate API for #1152 based on the work of `@mattico.` By switching to a writer-style API instead of a builder API some compile-time guarantees are lost, but it integrates better into the usb `Builder` and makes an api that can be used by USB device class implementations.

It also adds a feature flag so there is zero cost to the MS OS descriptors for devices that don't need to use them.

I've added an example based on `usb_serial` which tells Windows to use the generic `WinUSB` driver instead of the serial port driver for the device.

Comments are welcome. It would be nice to see either this or #1152 merged as my project is going to require the MS OS Descriptors soon.

Co-authored-by: Matt Ickstadt <matt@beckenterprises.com>
Co-authored-by: alexmoon <alex@moonspot.org>
2023-02-07 19:31:10 +00:00
aa21aebb0b Lazily encode UTF16 values and add docs 2023-02-07 14:24:35 -05:00
9f9230ae7a Convert MS OS descriptor builder to a writer API
This brings it inline with the other embassy-usb descriptor APIs and allows it to integrate well with the Builder to allow class constructors to add MS OS descriptors.

Also adds a `usb_serial_winusb` example to demonstrate how to use the API.
2023-02-07 14:24:35 -05:00
b9ecdb72bb usb: remove msos dead code 2023-02-07 14:24:35 -05:00
617b0a03b9 usb: fix descriptor set length and DeviceInterfaceGUIDs 2023-02-07 14:24:35 -05:00
f5ff3c4ac3 usb: add support for MS OS Descriptors 2023-02-07 14:24:35 -05:00
a7fa7d0de2 Merge #1201
1201: net: use released smoltcp 0.9.0 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-07 17:16:08 +00:00
102b2e52cb net: use released smoltcp 0.9.0 2023-02-07 18:15:26 +01:00
7b11e339bd feat(fmc): Add 16 data bit ctor 2023-02-07 16:06:59 +01:00
dadd6aafe9 Merge #1197
1197: fix(stm32): Align FMC with new versions from stm32-data r=lulf a=rmja



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-02-07 14:48:26 +00:00
1b6aae9dde Also exclude fsmc_v1x3 2023-02-07 15:06:16 +01:00
e4dc473e04 Update stm32-data 2023-02-07 14:46:36 +01:00
562432ad8b Update stm32-data 2023-02-07 14:16:13 +01:00
494a76a0f1 React to updated fsmc versions 2023-02-07 14:14:47 +01:00
36ca18132d Update stm32-data 2023-02-07 12:35:59 +01:00
218f8e0490 fix(stm32): Align FMC with new versions from stm32-data 2023-02-07 12:17:37 +01:00
ba18656e94 Merge #1177
1177: STD driver needs a reentrant mutex; logic fixed to be reentrancy-safe r=Dirbaio a=ivmarkov

...or to summarize it in another way, the code in the alarm thread loop is written as if - when calling the user-supplied callback - the callback will *never, ever* call `alarm.set_alarm()`.

But this happens of course - at least with the generic timer queue implementation. Not sure if that would happen with `embassy-executor`'s own queue, but probably yes?

The end result on Linux is that the code deadlocks because when calling the user-supplied callback, the mutex of the alarms is locked, yet - the code in `set_alarm` tries to take the lock again leading to UB. (I suspect on Windows this will crash rather than deadlock but that's a bit irrelevant.)

(Note also that calling the user-supplied callback *outside* of the alarms' lock is also NOK, because at that time, the callback and/or context itself might be invalid as well, as the user might had changed it with a new one by calling `set_callback`. Right?)

I also had to fix the logic that computed the next timestamp when the alarm should fire; it was running a simple `for {}` loop, not anticipating that the just-traversed alarm might get a new timestamp.

The new code is slightly less efficient, in that on each `loop {}` iteration it always starts traversing the alarms from the beginning, whereas in reality only the timestamp of the alarm that just-fired could've changed, but given the complexities introduced by `RefCell`, I don't think we should bother with these micro-optimizations, for just 4 alarms in total.


Co-authored-by: ivmarkov <ivan.markov@gmail.com>
2023-02-06 18:05:22 +00:00
c8a7b74bc2 Merge #1192 #1193
1192: stm32/usart: implement stop_bits configuration r=Dirbaio a=pattop



1193: stm32/usart: fix LPUART clock multiplier r=Dirbaio a=pattop

According to RM0351 Rev 9 (L4) and RM0399 Rev 3 (H7):

baud = (256 * clock) / LPUARTDIV


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
2023-02-06 13:39:37 +00:00
e3174d7a99 STM32 SPI: Set clk-pin pull-up/-down to match spi clock polarity
RM0394:

    40.4.6
    Communication formats
    ...
    The idle state of SCK must correspond to the polarity selected in the SPIx_CR1 register (by
    pulling up SCK if CPOL=1 or pulling down SCK if CPOL=0).
2023-02-06 13:23:35 +01:00
fda36fd81b stm32/usart: fix LPUART clock multiplier
According to RM0351 Rev 9 (L4) and RM0399 Rev 3 (H7):

baud = (256 * clock) / LPUARTDIV
2023-02-06 11:22:41 +11:00
64ebb9b7fe stm32/usart: implement stop_bits configuration 2023-02-06 09:44:15 +11:00
7d8e6649b7 Merge #1187
1187: executor: Minor refactoring r=Dirbaio a=GrantM11235

The third commit may be slightly more controversial than the first two. Personally, I think it makes the code more readable and easier to reason about, but I can drop it if you disagree.

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2023-02-03 06:33:22 +00:00
662a02a557 Merge #1191
1191: stm32 gpio implement degrade to AnyPin r=Dirbaio a=JoshMcguigan

This PR implements a `degrade` method on the STM32 GPIO structs `Flex`/`Input`/`Output`/`OutputOpenDrain`. This allows, for example, transforming some `Input<T>` to an `Input<AnyPin>`.

Co-authored-by: Josh Mcguigan <joshmcg88@gmail.com>
2023-02-03 06:00:50 +00:00
0bb6000e5c stm32 gpio implement degrade to AnyPin 2023-02-02 21:42:42 -08:00
a432d91d82 PeripheralRef docs improvements. 2023-02-03 06:36:10 +01:00
9af25c3396 Merge #1188
1188: LoRa timings for SX126x/STM32WL r=lulf a=samueltardieu

Those timings open Rx time windows covering 99.7% of the one expected
by the antenna while allowing 3ms for the Rx subsystem to start listening.


Co-authored-by: Samuel Tardieu <sam@rfc1149.net>
2023-02-02 12:09:22 +00:00
ef4a20f67b LoRa/STM32WL: adjust Rx window offset and duration
Those timings open Rx time windows covering 99.7% of the one expected
by the antenna while allowing 3ms for the Rx subsystem to start listening.
2023-02-02 13:01:18 +01:00
c4cbb89fcd LoRa/SX126x: adjust Rx window offset and duration
Those timings open Rx time windows covering 99.7% of the one expected
by the antenna while allowing 3ms for the Rx subsystem to start listening.
2023-02-02 13:01:18 +01:00
95cff35a91 Merge #1179
1179: LoRa/SX1276: adjust Rx window offset and duration r=lulf a=samueltardieu

After a transmission, two receive windows Rx1 and Rx2 are opened for one second each, one right after the other, after a fixed delay (for example 5s). The Rx window offset is added to the starting date of each window and the Rx window duration represents the maximum delay we will wait for an incoming message before declaring that a timeout occurred.

A value of -500ms for the offset and 800ms for the duration means that instead of having Rx1 = [5000, 6000[ and Rx2 = [6000, 7000[ we get Rx1 = [4500, 5300[ and Rx2 = [5500, 6300[. We only cover 30% of the expected windows.

The maximum time a SX127x can take before the Rx side is ready is TS_HOP + TS_RE = 50µs + 2.33ms. Using 3ms for the offset and 1003ms for the duration will give much better time windows: Rx1 = [4997, 5997[ and Rx2 = [5997, 7000]. Note that the
lorawan-device crate caps Rx1 end date to Rx2 start date.

This change allows a previously failing Murata CMWX1ZZABZ-091 module (STM32L + SX1276) to connect to the TTN LoRa network.


Co-authored-by: Samuel Tardieu <sam@rfc1149.net>
2023-02-02 10:09:33 +00:00
cb88dd285d nrf/twis: FIx doc typo 2023-02-01 20:54:32 +01:00
791fbb3ca0 Make poll_fn lazily initialized again 2023-01-31 21:46:25 -06:00
4a8e9cf4d9 Add internal AvailableTask type 2023-01-31 19:04:41 -06:00
fb1946be7f Replace the pointer in TaskHeader with an Option<&Executor> 2023-01-31 18:59:03 -06:00
a697f1517a Set poll_fn in TaskStorage::new 2023-01-31 18:59:03 -06:00
465e4c8b19 Merge #1151
1151: USB: allow setting the interface string for interface alt settings r=Dirbaio a=mattico

This is a breaking change to embassy-usb's API.

Co-authored-by: Matt Ickstadt <matt@beckenterprises.com>
2023-02-01 00:36:22 +00:00
594969f281 Merge #1186
1186: Add some docs r=Dirbaio a=Dirbaio

This also does some renames of things to more intuitive/consistent names.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-02-01 00:18:01 +00:00
b5cf332cc0 nrf: docs. 2023-02-01 01:17:41 +01:00
ca10fe7135 usb: docs 2023-01-31 22:27:19 +01:00
4c19464548 Merge #1184
1184: Pass the correct buffer when creating TcpSocket r=lulf a=lulf



Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-01-31 18:38:16 +00:00
768fe699cf Pass the correct buffer when creating TcpSocket 2023-01-31 19:36:41 +01:00
c21cc21c62 Merge #1182
1182: executor: Replace `NonNull<TaskHeader>` with `TaskRef` r=Dirbaio a=GrantM11235



Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2023-01-29 22:34:48 +00:00
b6ca6d699a Make wake_task safe 2023-01-29 16:32:12 -06:00
48e1aab762 executor: Replace NonNull<TaskHeader> with TaskRef 2023-01-29 15:52:13 -06:00
7e251a2550 Merge #1180
1180: usb: allow adding isochronous endpoints r=Dirbaio a=nitroxis

This adds (basic) support for isochronous endpoints. In theory, isochronous endpoints have guaranteed bandwidths and are support to adhere to strict timings. But it seems that nothing bad happens if you don't follow the specs closely in this regard. Better handling could also still be added in the future.

Co-authored-by: nitroxis <n@nxs.re>
2023-01-27 15:06:35 +00:00
e453334870 LoRa/SX1276: adjust Rx window offset and duration
After a transmission, two receive windows Rx1 and Rx2 are opened
for one second each, one right after the other, after a fixed delay
(for example 5s). The Rx window offset is added to the starting date
of each window and the Rx window duration represents the maximum
delay we will wait for an incoming message before declaring that
a timeout occurred.

A value of -500ms for the offset and 800ms for the duration means
that instead of having Rx1 = [5000, 6000[ and Rx2 = [6000, 7000[
we get Rx1 = [4500, 5300[ and Rx2 = [5500, 6300[. We only cover
30% of the expected windows.

The maximum time a SX127x can take before the Rx side is ready is
TS_HOP + TS_RE = 50µs + 2.33ms. Using 3ms for the offset and
1003ms for the duration will give much better time windows:
Rx1 = [4997, 5997[ and Rx2 = [5997, 7000]. Note that the
lorawan-device crate caps Rx1 end date to Rx2 start date.

This change allows a previously failing Murata CMWX1ZZABZ-091
module (STM32L + SX1276) to connect to the TTN LoRa network.
2023-01-27 16:01:41 +01:00
c9e2cd6dd4 usb: allow adding isochronous endpoints 2023-01-27 15:53:13 +01:00
7ec15f2def Merge #1178
1178: rp: allow isochronous USB endpoints to be up to 1023 bytes in size r=Dirbaio a=nitroxis

The datasheet allows isochronous USB endpoints to be up to 1023 bytes in size (see "4.1.2.5. DPSRAM"). This PR changes the check to allow this and also changes the length computation to align to 64 bytes (instead of hardcoded 64 bytes).

Embassy does not yet support isochronous USB endpoints, however I'm investigating adding support. This change is simple enough and should be correct according to the datasheet, so maybe future implementers don't run into this issue.

Co-authored-by: nitroxis <n@nxs.re>
2023-01-27 14:44:51 +00:00
1e60c60afd rp: allow isochronous USB endpoints to be up to 1023 in size 2023-01-27 07:24:49 +01:00
34b67fe137 STD driver needs a reentrant mutex; logic fixed to be reentrancy-safe 2023-01-26 20:41:18 +00:00
ffa75e1e39 Merge #1173 #1174
1173: nRF examples crates names r=lulf a=davidedellagiustina

Fixed nRF examples crates' names: they had the same names and they were conflicting during compilation (Cargo warning).

1174: add missing copy of icmpv6 checksum r=lulf a=lulf

add proto-ipv6 feature to stm32h7 example to catch issues in CI

Co-authored-by: Davide Della Giustina <davide@dellagiustina.com>
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-01-24 09:26:21 +00:00
2a0ea52878 add missing copy of icmpv6 checksum
add proto-ipv6 feature to stm32h7 example to catch issues in CI
2023-01-24 10:25:37 +01:00
5ee8626d72 Merge #1172
1172: IPv6 has no checksum r=lulf a=davidedellagiustina

As title says. Fixes `embassy-net` not compiling when feature `proto-ipv6` is enabled.

Co-authored-by: Davide Della Giustina <davide@dellagiustina.com>
2023-01-24 08:56:01 +00:00
32bdc54ccb Changed crates' names for nrf examples since they were conflicting 2023-01-24 08:27:53 +00:00
f38d54a6a6 IPv6 has no checksum 2023-01-24 08:15:22 +00:00
4dadfb41ea Merge #1171
1171: Implement From<gpio::Level> for bool r=Dirbaio a=hulthe

From implies Into, so this won't break anything.

Co-authored-by: Joakim Hulthe <joakim@hulthe.net>
2023-01-23 17:38:05 +00:00
64e610fef7 Replace Level: Into<bool> with From<Level>
This automatically implements Into<bool> for Level
2023-01-23 13:35:24 +01:00
f98ba4ebac Merge #1168
1168: Fix rcc prescaler for wb55 HCLK1 r=lulf a=chrenderle

- fix prescaler not divided which incorrectly set prescaler divided by 3
Issue: #1137 

Co-authored-by: Christian Enderle <mail@chrenderle.de>
2023-01-21 14:10:02 +00:00
5e3c33b777 Fix rcc prescaler for wb55 HCLK1
- fix prescaler not divided which incorrectly set prescaler divided by 3
2023-01-21 14:39:25 +01:00
6ad2bcf97a Merge pull request #1166 from embassy-rs/sdmmc-fix
fix embedded-sdmmc integration.
2023-01-21 01:22:17 +01:00
0412d1922c fix embedded-sdmmc integration.
- Rename feature to `embedded-sdmmc`.
- Move embedded-sdmmc fork repo to the embassy-rs org.
- Remove unused features in the fork
- Fix impl in embassy-stm32
- Add to CI so it doesn't break again.
2023-01-21 00:32:34 +01:00
825b67101b Merge pull request #1164 from embassy-rs/stm32-print-rcc
stm32/rcc: print actual freqs on boot.
2023-01-20 17:08:20 +01:00
f604153f05 stm32/rcc: print actual freqs on boot. 2023-01-20 16:31:04 +01:00
539a8107e2 Merge #1161
1161: WIP: Smoltcp socket config r=Dirbaio a=Czocher

This PR updates the smoltcp version to the newest master one as well as implements the feature specified in #1154 - to allow the dhcpv4 socket to be configured.

Currently it should be considered a WIP PR - requires testing.

`@Dirbaio` can you have a look and check if this is compatible with what we discussed on the matrix channel?

Co-authored-by: Paweł Jan Czochański <pawel@czochanski.pl>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-01-19 13:57:21 +00:00
78c2c1709b net: update smoltcp. 2023-01-19 14:44:01 +01:00
fe15a7beee net: allocate space for 2 sockets, needed for dhcp. 2023-01-19 14:44:01 +01:00
570ffab670 net: poll returning false is not an error. No need to repoll. 2023-01-19 14:44:01 +01:00
8f4fae9b36 Add smoltcp dhcp socket configuration 2023-01-19 14:44:01 +01:00
2eae12b7f1 Update smoltcp to the newest master 2023-01-19 14:44:01 +01:00
65ab714fae Merge #1162
1162: rp gpio: make pin_bank() inline r=Dirbaio a=mkj

This allows set_high() etc to be inlined, toggling pins should be much faster.

Co-authored-by: Matt Johnston <matt@ucc.asn.au>
2023-01-19 10:59:22 +00:00
83af513424 rp gpio: make pin_bank() inline
This allows set_high() etc to be inlined, toggling pins
should be much faster.
2023-01-19 13:36:40 +08:00
f0ae1f9133 Merge #1159
1159: stm32 usb otg bug fixes r=Dirbaio a=chemicstry

This fixes a couple of usb otg bugs that surfaced with `usb_ethernet` example from nrf:
- Properly implemented `Endpoint::wait_enabled()`
- Return `EndpointError::Disabled` when neccessary in `Endpoint::write()`


Co-authored-by: chemicstry <chemicstry@gmail.com>
2023-01-18 11:30:44 +00:00
db8e9efe73 Merge #1160
1160: Stop sampling when exiting the Saadc methods r=huntc a=huntc

Prior to this commit, the onDrop function was being dropped immediately and not on exiting the Saadc sampling methods.

A few other places have been corrected also.

Thanks to Peter Hansen for pointing out this issue.

Co-authored-by: huntc <huntchr@gmail.com>
2023-01-18 04:17:08 +00:00
6ab4ecaf83 Stop sampling when exiting the Saadc methods
Prior to this commit, the onDrop function was being dropped immediately and not on exiting the Saadc sampling methods.
2023-01-18 14:51:46 +11:00
b1203bf036 stm32/usb_otg: fix core formatter 2023-01-18 03:06:32 +02:00
7d34f4f538 stm32/usb_otg: Add F4 usb_ethernet example 2023-01-18 02:37:02 +02:00
f07e59b24a stm32/usb_otg: prevent writes on disabled endpoint 2023-01-18 02:31:28 +02:00
d2f2b451d0 stm32/usb_otg: implement endpoint wait_enabled 2023-01-18 02:29:49 +02:00
15e3f42b7c Merge pull request #1158 from embassy-rs/stm32c0
Add STM32C0 support.
2023-01-17 21:45:36 +01:00
355761fd68 stm32: add stm32c0 examples. 2023-01-17 21:28:16 +01:00
2a349afea7 stm32: add stm32c0 support. 2023-01-17 21:28:16 +01:00
aea5a0fd96 Merge #1140
1140: feat(stm32): Let uart implement embedded-io Write trait r=Dirbaio a=rmja



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-01-14 19:45:28 +00:00
634704bff4 Merge #1153
1153: Documentation on verifying firmware r=lulf a=huntc

The documentation has been enhanced to describe the verification of firmware with the firmware updater. Examples have also been provided that describe how keys can be generated and how firmware can be signed.

Co-authored-by: huntc <huntchr@gmail.com>
2023-01-14 08:26:30 +00:00
868d01889b Documentation on verifying firmware
The documentation has been enhanced to describe the verification of firmware with the firmware updater. Examples have also been provided that describe how keys can be generated and how firmware can be signed.
2023-01-14 17:36:22 +11:00
16590732f8 Update mod.rs 2023-01-14 07:13:29 +01:00
816b214403 Only implement Write 2023-01-14 07:12:43 +01:00
b6c8505697 Merge #1142
1142: More rp2040 BufferedUart fixes r=Dirbaio a=timokroeger

* Refactor init code
* Make it possible to drop RX without breaking TX (or vice versa)
* Correctly handle RX buffer full scenario

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-01-14 00:07:02 +00:00
7ecb05ff77 usb: allow setting the interface string for interface alt settings 2023-01-13 12:10:36 -06:00
b0c8c688c7 Merge #1147
1147: Support codesigning in the firmware updater r=lulf a=huntc

This PR provides a method to verify that firmware has been SHA-512 hashed and signed with a private key given its public key. The implementation provides both [`ed25519-dalek`](https://github.com/dalek-cryptography/ed25519-dalek/blob/main/Cargo.toml) and [`salty`](https://github.com/ycrypto/salty) as the signature verifiers. Either of the `ed25519-dalek` and `ed25519-salty` features is required to enable the functionality from `embassy-boot`.

The `verify_and_mark_updated` method is used in place of `mark_updated` when signing is used via its feature. This avoids the accidental omission of validation where it has been declared as required at compile time. It also keeps the parity of calls at the same number to the previous situation.

The PR permits other types of signature verifiers in the future on the proviso that the [Signature trait](https://github.com/RustCrypto/traits/tree/master/signature) is supported.

Finally, I've updated the CI to include testing `embassy-boot`, which it was doing before. In addition, I've included a unit test for verification based on a `ed25519-dalek` documentation example. This tests both the `dalek` and `salty` implementations.

In terms of code size comparisons, `dalek` adds about 68KiB and `salty` adds about 20KiB. I'm using `salty` myself. I've also tested this out by signing my code with the OpenBSD `signify` utility and then verify it during firmware upload using `salty`.


Co-authored-by: huntc <huntchr@gmail.com>
2023-01-12 20:43:24 +00:00
b0529bc943 Support codesigning in the firmware updater
This commit provides a method to verify that firmware has been signed with a private key given its public key. The implementation uses ed25519-dalek as the signature verifier. An "ed25519" feature is required to enable the functionality. When disabled (the default), calling the firmware updater's verify method will return a failure.
2023-01-12 13:30:58 +11:00
88fd521b01 Merge #1145
1145: STM32 USB OTG #2 r=Dirbaio a=chemicstry

This is a continuation of #799

The usb serial example is already working!

TODO:
- [x] Add critical sections to registers shared with IRQ
- [x] Fix `disable()`
- [x] ~Implement cable disconnect detection~ - postponed
- [x] Fix `endpoint_set_enabled()`
- [x] ~Endpoint `wait_enabled`~ USB OTG does not have enable delay (?)
- [x] HS internal and HS ULPI PHY - untested

Co-authored-by: chemicstry <chemicstry@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-01-11 17:05:59 +00:00
1af102a1aa stm32 otg: add examples. 2023-01-11 17:58:15 +01:00
041531c829 stm32/rcc: fix u5 pll, add hsi48. 2023-01-11 17:57:22 +01:00
0feecd5cde stm32: add USB OTG support.
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-01-11 17:56:47 +01:00
065a0a1ee7 Update stm32-data. 2023-01-11 17:51:30 +01:00
ce842fe28c Refactor embassy-usb address handling to allow reordering of status resoponse 2023-01-11 17:47:12 +01:00
96b97c4711 Update vscode settings for latest RA. 2023-01-11 17:43:12 +01:00
dbf7493708 Merge #1149
1149: Add samples for nrf5340 r=lulf a=Tiwalun

Samples for the nrf5340, copied from the existing nrf samples.

Not sure if copying them is the best way of adding support, or using features in the existing samples would be better?
The code is mostly the same, with some different peripherals and pin mappings for the DK.

Co-authored-by: Dominik Boehi <dominik.boehi@gmail.com>
2023-01-10 11:06:22 +00:00
2baebabf4d Reduce amount of samples for nrf5340 2023-01-09 22:57:40 +01:00
0a27b6cedb Rename examples/nrf to examples/nrf52840 2023-01-09 22:30:02 +01:00
401185b1d9 Change UART pins for nRF5340 DK 2023-01-08 16:25:51 +01:00
f8afc3c882 Add samples for nrf5340 2023-01-08 15:36:35 +01:00
4c4b47f78a feat(stm32): Add embedded-io traits for UartRx and UartTx 2023-01-06 14:24:29 +01:00
539f97da53 rp: Fix formatting string to please CI 2023-01-05 22:00:44 +01:00
1096a9746c rp: Improve BufferedUart interrupt handling
* Only clear interrupt flags that have fired (so that we do not lose any error flags)
* Enable RX interrupt when a read is requested, disable it when the RX buffer is full
* Rework TX interrupt handling: its "edge" triggered by a FIFO threshold
2023-01-05 18:45:58 +01:00
3fbedd7c09 Merge #1141
1141: feat: compile bootloader examples for nRF91 r=lulf a=lulf

* Add nRF91 as target in CI builds
* Add example linker scripts for nrf91
* Make less nRF52 assumptions example config
* Add llvm-tools-preview required for cargo objcopy example

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-01-05 14:06:45 +00:00
3c537a9fae usb/driver: fix STATUS -> SETUP 2023-01-05 14:46:31 +01:00
b72da125eb Merge pull request #1144 from embassy-rs/usb-control-docs
usb/driver: document ControlPipe.
2023-01-05 02:20:05 +01:00
0ecc54f58c usb/driver: document ControlPipe. 2023-01-05 01:46:35 +01:00
f339e8518f Merge #1143
1143: rp2040: add {tx,rx}-only constructors to UART r=Dirbaio a=pferreir

As discussed with `@henrik-alser` on Matrix. I also added an example, feel free to remove it if it's too much.

Co-authored-by: Pedro Ferreira <pedro@dete.st>
2023-01-04 20:18:02 +00:00
6d4c6e0481 rp2040: add {tx,rx}-only constructors to UART 2023-01-04 21:11:19 +01:00
840a75674b rp: Disable RX interrupts when ring buffer is full
When data is in the RX fifo the RX timeout interrupt goes high again even after clearing it.
The result is a deadlock because execution is stuck in the interrupt handler. No other code
can run to clear the receive buffer.
Enable and disable RX interrupts based on the buffer fill level.
Use the same approach for the TX code path.
2023-01-04 16:53:43 +01:00
a24037edf9 rp: Fix BufferedUart drop code
Only unregister the interrupt handler when both parts are inactive
2023-01-04 15:59:03 +01:00
68c186309f rp: Common init function for BufferedUart
BufferedUart, BufferedUartRx and BufferedUartTX can all use the same init code.
2023-01-04 15:58:26 +01:00
2332d8cd23 feat: compile bootloader examples for nRF91
* Add nRF91 as target in CI builds
* Add example linker scripts for nrf91
* Make less nRF52 assumptions example config
* Add llvm-tools-preview required for cargo objcopy example
2023-01-04 13:38:43 +01:00
5aa59e9737 feat(stm32): Let uart implement embedded-io Read/Write 2023-01-04 12:57:19 +01:00
bf4c0de16a Merge #1139
1139: Wdt config changes r=lulf a=huntc

Per commits:

* By passing WDT config around we can control it more easily and promote sharing it between files.

* The memory layout of the s140 crept into a number of memory files, which can cause confusion (well, it did for me!).

* Obtaining the current WDT config is useful so that we do not have to duplicate configurations around the place. A constructor method has been introduced that attempts to return the current running WDT config from the WDT peripheral. The bootloader example has also been updated to show how the watchdog can be obtained and used.

Co-authored-by: huntc <huntchr@gmail.com>
2023-01-04 07:44:23 +00:00
8497f98de2 Provides a means of obtaining the current WDT config
Obtaining the current WDT config is important so that we do not have to duplication configuration around the place. A constructor method has been introduced that returns WDT config in accordance with how the register is presently configured. The bootloader example has also been updated to show the watchdog can be obtained and used.
2023-01-04 12:13:44 +11:00
6e6c3cbebc Cleaned up some doc and memory layout
The memory layout of the s140 crept into a number of memory files, which can cause confusion.
2023-01-04 10:27:16 +11:00
35afb60dd4 Merge #1138
1138: embassy-boot (rp): Add WatchdogFlash r=Dirbaio a=kalkyl



Co-authored-by: kalkyl <henrik.alser@me.com>
2023-01-03 23:25:52 +00:00
651eec0242 Pass WDT config around
By passing WDT config around we can control it more easily and promote sharing it between files.
2023-01-04 10:19:39 +11:00
413f339489 Cleanup 2023-01-03 23:34:50 +01:00
9428c40c8d embassy-boot (rp): Add WatchdogFlash 2023-01-03 22:58:56 +01:00
0aa2a9ac27 Merge #1093 #1127
1093: Add random example r=Dirbaio a=miathedev

Thanks Lulf for the help!

This should be added as example so other people can look it up easily.

With love,
Mia



1127: clean up doc comment generation r=Dirbaio a=Weshnaw

I noticed that when I created doc comments for my tasks that the doc comments got included on the inner function but not the outer functions, I personally prefer keeping the documentation as clean as possible so this PR aims to hide the inner function and then add doc comments to the outer function.

The actual changes include:
* adding #[doc(hidden)] onto the `task_inner` function
  * I flip flopped on this one because I could imagine someone may want this in their docs, but decided to include but I think arguments could be made either way
* copy the attributes from `task_inner` to `task_outer`
  * I don't work with proc_macros often so I am not entirely sure if the way I went about it is correct but it seems to work fine
    * specifically: using `parse_quote` to create the `task_outer` as a `ItemFn` then duplicating the attributes from `task_inner` to `task_outer`
  * I also am not sure if it's a good idea to duplicate all attributes over, but I honestly wasn't sure how to just get the just doc comment attributes

![OLD doc](https://user-images.githubusercontent.com/3748858/209456006-bfa6d40d-d3bf-4c1d-a2de-cf40828b58e5.png)
![NEW doc](https://user-images.githubusercontent.com/3748858/209456011-995363a3-f5b1-4ea3-9db9-1c566643efcb.png)


Co-authored-by: miathedev <mia@metzler.systems>
Co-authored-by: Brendon Fallquist <bfallquist@gmail.com>
2023-01-02 23:13:41 +00:00
a6b52bde58 Merge #1130
1130: USB serial (CDC-ACM) improvements r=Dirbaio a=timokroeger

* Remove unused call management descriptor
* Set flag for supported capabilities

The rp `usb_serial` example still works with windows hosts.

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-01-02 22:51:58 +00:00
9900ac2c9a Merge pull request #29 from metlos/fix-pm
Be able to specify the power management mode at init time.
2023-01-02 21:38:51 +01:00
a2bae33d84 Add separate function to set power management mode. 2023-01-02 21:36:51 +01:00
001610f0d0 Be able to specify the power management mode at init time. 2023-01-02 21:34:13 +01:00
072b8ce035 Merge pull request #34 from mattiasgronlund/wlan_read_fix
Fixed length for wlan_read.
2023-01-02 00:26:37 +01:00
c1fa46bd36 Merge branch 'master' into wlan_read_fix 2022-12-31 16:40:22 +01:00
871700f05d Fixed length for wlan_read.
The length provided in command word for FUNC_WLAN READ, should
describe the actual bytes requested, not the size of the buffer
which is sized in u32.
2022-12-31 16:25:37 +01:00
42f1b3ac74 Merge #1136
1136: Fix a typo r=Dirbaio a=lonesometraveler

Many thanks for maintaining this project. Here is a minor typo fix.

Co-authored-by: Kentaro Okuda <lonesometraveler@mac.com>
2022-12-30 17:54:21 +00:00
72bb4f8798 Fix a typo 2022-12-30 08:53:16 -05:00
3478004b4d Merge #1135
1135: Add Clone & Copy on embassy_nrf::gpio::Level r=Dirbaio a=mdevlamynck

This simply adds the Clone and Copy derive traits on embassy_nrf::gpio::Level.

Co-authored-by: Matthias Devlamynck <matthias.devlamynck@mailoo.org>
2022-12-29 16:31:36 +00:00
2c8080b0ae Add Clone & Copy on embassy_nrf::gpio::Level 2022-12-29 17:26:49 +01:00
7add0eafb8 Merge #1133
1133: rp: Fill and empty FIFOs in buffered uart interrupt r=Dirbaio a=timokroeger

Fixes an issue where only the first byte was transmitted. Should improve throughput aswell.

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2022-12-27 15:55:51 +00:00
e4f457646f rp: Fill and empty FIFOs in buffered uart interrupt
Fixes an issue where only the first byte was transmitted.
Should improve throughput aswell.
2022-12-27 11:28:52 +01:00
2548bbdd65 Update Embassy. 2022-12-27 01:19:26 +01:00
3afb62d8d6 Merge #1132
1132: net: allow changing mac addr at runtime r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-12-27 00:14:16 +00:00
771806be79 net/chan: split state runner. 2022-12-27 01:07:58 +01:00
4a4b593694 net; allow changing MAC addr at runtime. 2022-12-27 01:04:55 +01:00
1b6799d93f split bus, consts into separate mods. 2022-12-26 23:34:27 +01:00
4297eb27ff Merge #1131
1131: rp: switch to released 0.2.1 pio crate. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-12-26 21:31:20 +00:00
41d6316984 rp: switch to released 0.2.1 pio crate. 2022-12-26 22:30:22 +01:00
4e0d563997 usb cdc-acm: Set flag for supported capabilities 2022-12-26 09:36:04 +01:00
97f9f248f4 usb cdc-acm: Remove unused call management descriptor 2022-12-26 09:35:23 +01:00
147609d3bd Merge pull request #1129 from embassy-rs/net-driver
net: driver crate split
2022-12-26 05:06:15 +01:00
007246b160 net: split channel-based driver impl from usb cdc-ncm into a separate crate. 2022-12-26 04:49:08 +01:00
1f033d509a net: split driver trait to a separate crate. 2022-12-26 04:49:08 +01:00
639b3f1d5b usb-driver: remove unused log feature. 2022-12-26 03:34:05 +01:00
5655c6093f net: use atomic-polyfill on tcp client pool, for thumbv6m support. 2022-12-26 03:34:05 +01:00
72bb9b53a2 net: remove unused pool-x features 2022-12-26 03:34:05 +01:00
c29657f95a Merge #1128
1128: Add missing SPI pins r=Dirbaio a=pferreir

The SPI definitions lack the pins which are not accessible on the pico (but are so e.g. on the stamp).

Co-authored-by: Pedro Ferreira <pedro@dete.st>
2022-12-25 23:52:33 +00:00
f2fb9a2ca6 Add missing SPI pins 2022-12-25 23:49:04 +00:00
076ada4c02 Add feature to display console logs from the wifi firmware. 2022-12-25 22:50:59 +01:00
42cc0c6d73 print ioctl error as signed. 2022-12-25 22:50:59 +01:00
56b50f8b62 fix bp_read.
It was broken since the switch from u8 to u32.
2022-12-25 22:50:59 +01:00
056eac998a Hide doc comments from inner function include doc comments on outer function 2022-12-24 21:21:07 -06:00
d1dd66cfca Merge #1126
1126: embassy-rp: Add Watchdog r=kalkyl a=kalkyl



Co-authored-by: kalkyl <henrik.alser@me.com>
2022-12-24 02:23:57 +00:00
e090ab1915 Remove lifetime, use pac fields 2022-12-24 03:22:51 +01:00
eaad0cc1dc embassy-rp: Add Watchdog 2022-12-24 02:51:06 +01:00
67a6e5accf Merge #1122
1122: embassy-rp: Add split() to BufferedUart r=kalkyl a=kalkyl



Co-authored-by: kalkyl <henrik.alser@me.com>
2022-12-23 22:16:58 +00:00
787745188c Change log level to debug 2022-12-23 23:14:58 +01:00
74fdd4c03c Merge pull request #1125 from embassy-rs/remove-atomic-polyfill
Remove unnecessary use of atomic-polyfill.
2022-12-23 21:04:49 +01:00
10c9cc31b1 Remove unnecessary use of atomic-polyfill.
Only use it when CAS is actually needed.
2022-12-23 20:46:49 +01:00
cd9a65ba39 stm32/usb: use separate irq flags.
- Fixes race condition that could cause losing irqs (because `if flags != 0` was clearing all)
- Doesn't need CAS, which is nice for thumbv6.
2022-12-23 20:45:51 +01:00
40ef66cdfb Merge #1124
1124: Fix two SPI bugs for stm32 r=Dirbaio a=rmja

This PR fixes two bugs:
* It fixes #1095 by ensuring that pin speed is VeryHigh for all spi versions. I am on stm32f429 which seems to be spi_v1, and it also needs the VeryHigh pin speed. Otherwise bit errors on the "last bit in every byte" can happen.
* It also fixes a lifetime bug for the tx buffer when sending "write_repeated". The issue can be seen when doing spi.write where the clock byte changes during a transmission because the buffer handled to the dma must live throughout the entire transfer.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2022-12-23 15:53:59 +00:00
47a0769fc2 Let repeated clock byte be singular pointer and not array pointer 2022-12-23 15:49:22 +01:00
e9a2c4a9e3 Let start_write_repeated accept pointer instead of slice 2022-12-23 15:40:09 +01:00
662bb5797f fix(stm32): Ensure that gpio speed is VeryHigh for all spi versions
This fixes #1095
2022-12-23 09:34:42 +01:00
2457fcaa35 fix(stm32): Align with updated dma::write_repeated signature 2022-12-23 09:33:34 +01:00
da9ee83756 fix(stm32): Fix write buffer lifetime for repeated writes 2022-12-23 09:32:18 +01:00
aa92ce6dc7 embassy-rp: Add split() to BufferedUart 2022-12-22 23:03:05 +01:00
1bd6c954c2 Merge #1121
1121: Add examples for stm32f0 r=lulf a=imrank03

Hello `@lulf,`

I added some more examples to stm32f0 and tested on hardware.

With love,
Imran

Co-authored-by: @imrank03 <immu0396@gmail.com>
2022-12-21 14:48:04 +00:00
55d9af71e3 enabled interrupt feature 2022-12-21 11:56:30 +05:30
395b5fed64 added watchdog example 2022-12-21 11:55:09 +05:30
0db3837dcc added priority based example 2022-12-21 11:54:36 +05:30
c0f3610581 added interrupt example 2022-12-21 11:53:55 +05:30
63122f6d7e button controlled example 2022-12-21 11:52:40 +05:30
46fd82d184 Merge #1119
1119: add convert_to_celsius function in the adc module r=lulf a=overheat

    modify RP2040 adc example to get inside biased bipolar diode voltage,
    then convert this temperature sensor data into Celsius degree,
    according to chapter 4.9.5. Temperature Sensor in RP2040 datasheet.

Co-authored-by: Aaron Tsui <aaron.tsui@outlook.com>
2022-12-20 17:25:23 +00:00
5ae91ed3b6 cargo fmt 2022-12-20 14:59:49 +08:00
849a0e174f add convert_to_celsius function in the adc module
modify RP2040 adc example to get inside biased bipolar diode voltage,
    then convert this temperature sensor data into Celsius degree,
    according to chapter 4.9.5. Temperature Sensor in RP2040 datasheet.
2022-12-20 09:12:01 +08:00
e221d91330 Merge #1118
1118: Atomic ringbuf fixes r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-12-19 00:23:46 +00:00
5b72410828 hal-common/atomic_ring_buffer: Add push_slice, pop_slice. 2022-12-19 01:22:41 +01:00
feaeb533fb hal-common/atomic_ring_buffer: fix crashes when len=0 2022-12-19 01:22:41 +01:00
ebc735008f Merge #1114
1114: nrf/uart: do not error on zero length transfers. r=Dirbaio a=Dirbaio

It's a perfectly fine thing to do, should be just a noop. Erroring is really annoying when you're writing a payload to uart that might be zero-length or not.

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-12-15 18:50:21 +00:00
bffa5be2f4 nrf/uart: do not error on zero length transfers.
It's a perfectly fine thing to do, should be just a noop. Erroring is
really annoying when you're writing a payload to uart that might
be zero-length or not.
2022-12-15 19:47:36 +01:00
5b65b0e843 Merge pull request #1096 from embassy-rs/net-refactor2
net: remove packet pool
2022-12-13 17:03:51 +01:00
790e4e1594 examples/std: update to new embassy-net trait. 2022-12-13 16:43:25 +01:00
5eae295c8a stm32: rename feature net to embassy-net.
The eth code is always built and available, but has no own API (other
than the embassy-net Device impl) to rx/tx packets. We could add this
API in the future, so the feature only means "embassy-net support".
2022-12-13 16:43:25 +01:00
3005ee0178 stm32/eth_v2: update to new embassy-net trait, remove PeripheralMutex. 2022-12-13 16:43:25 +01:00
8f30652109 stm32/eth_v1: update to new embassy-net trait, remove PeripheralMutex. 2022-12-13 16:43:25 +01:00
e9219405ca usb/cdc-ncm: add embassy-net Device implementation. 2022-12-13 16:43:25 +01:00
aaaf5f23a8 net: move stack into lib.rs 2022-12-13 16:18:39 +01:00
ac74613b5a net: remove packet pool.
The pool was prone to deadlocks, especially due to having a single pool
for rx+tx. If the pool got full with rx'd packets it would deadlock because
processing a rx packet requires doing another allocation on the pool, for
the possibly tx'd response, before deallocating the rx'd packet.

This also allows Device impls to allocate the packet memory in a particular
RAM kind, if needed for example to do DMA.

The `Device` trait is now token-based, like smoltcp's. In the end, this
is better because it allows callers to manage memory however they want (including
with a pool if they want to).
2022-12-13 16:18:39 +01:00
47747d3b73 Merge #1105
1105: embassy-rp: Add multicore support r=Dirbaio a=kalkyl

This PR adds multicore support + critical-section impl using hardware spinlocks.
Based on the rp2040-hal implementation.

Co-authored-by: kalkyl <henrik.alser@me.com>
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
2022-12-13 14:55:34 +00:00
c4d8f3579e Update usage in docs 2022-12-13 14:15:04 +01:00
731eb3c6e3 fmt 2022-12-13 13:55:23 +01:00
3d68c0400b Merge branch 'master' into multicore 2022-12-13 13:51:48 +01:00
13d9d8fde1 Refactor after review 2022-12-13 13:49:51 +01:00
36639e5262 Merge #1043 #1103
1043: Rpi Pico PIO driver r=Dirbaio a=fluffware

This is a driver for the two PIOs in the Pico. I've tried using the type system to get as much compile time checks as possible. There is asynchronous support for FIFOs an Irqs. No DMA support yet. There's an example that shows how to use the driver asynchronously.

1103: embassy-stm32: add rs485 driver enable to uart r=Dirbaio a=FrozenDroid



Co-authored-by: Simon Berg <ksb@fluffware.se>
Co-authored-by: Vincent Stakenburg <v.stakenburg@sinewave.nl>
2022-12-13 11:47:27 +00:00
4fbd03a908 Merge pull request #1111 from overheat/embassy_net_readme
fix net README.md
2022-12-13 12:27:10 +01:00
aea28c8aa0 Add usage in to docs 2022-12-13 09:45:11 +01:00
95fdc7c552 fix net README.md 2022-12-13 14:06:37 +08:00
eb1d2e1295 Pause CORE1 execution during flash operations 2022-12-13 04:02:28 +01:00
96d6c7243b Cleanup 2022-12-10 13:43:29 +01:00
d8821cfd41 Feature gate critical-section-impl 2022-12-10 12:57:45 +01:00
cc0248d83a Select critical-section in tests 2022-12-10 12:42:08 +01:00
34eaade14f fmt 2022-12-10 08:33:09 +01:00
1ee58492fb embassy-rp: Add multicore support 2022-12-10 08:26:35 +01:00
5d4f09156a nrf: add manually_create_executor example. 2022-12-09 23:33:53 +01:00
488e322478 Clear unused pulls in set_pull. 2022-12-09 20:30:17 +01:00
cd59046e6c Added RelocateProgram class for adjusting PIO-programs for different origins. 2022-12-09 20:18:41 +01:00
35db6e639b PIO support for RPi Pico 2022-12-09 20:18:41 +01:00
e94ca0efd6 Merge #1051
1051: Adapted nvmc so it can be used for all nrf targets r=diondokter a=diondokter

Title says it all pretty much.
It's a bit annoying with the configs though.

I've made this a draft because I haven't really tested this yet.

Co-authored-by: Dion Dokter <dion@tweedegolf.com>
Co-authored-by: Dion Dokter <diondokter@gmail.com>
2022-12-09 16:45:55 +00:00
236d104844 embassy-stm32: add rs485 driver enable to uart 2022-12-09 14:26:09 +01:00
f22297e3d6 Merge branch 'master' into nrf91/53-nvmc 2022-12-09 11:04:55 +01:00
1d2f97b4e2 Fixed erase bug 2022-12-09 11:02:16 +01:00
58ab829049 Merge #1049
1049: embassy-nrf: Add I2S module r=lulf a=chris-zen

This PR adds I2S support for the nrf52 series (`nrf52832`, `nrf52833`, `nrf52840`).

We could only test it in a `nrf52840` in master mode for an output stream (see `i2s_waveform` example), using a clone of the [Adafruit I2S Stereo Decoder - UDA1334A](https://learn.adafruit.com/adafruit-i2s-stereo-decoder-uda1334a/overview).

We were wondering if this could be a welcome addition to embassy, as we are working on this very informally and don't have much free time for it.

<img src="https://user-images.githubusercontent.com/932644/202316127-a8cf90ef-1e1a-4e1d-b796-961b8ad6cef5.png" width="600">

https://user-images.githubusercontent.com/932644/202316609-e53cd912-e463-4e01-839e-0bbdf37020da.mp4


Co-authored-by: `@brainstorm` <brainstorm@nopcode.org>

Co-authored-by: Christian Perez Llamas <932644+chris-zen@users.noreply.github.com>
Co-authored-by: Roman Valls Guimera <brainstorm@users.noreply.github.com>
2022-12-09 07:49:40 +00:00
5fdd521a76 Move the responsibility to manage buffers to the I2S stream 2022-12-08 20:22:50 +01:00
1b8c0733e6 Merge #1098
1098: Reset sdmmc clock on card init r=Dirbaio a=chemicstry

Set clock back to 400kHz in `init_card()`, which allows card reinitialization if it was removed

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-12-07 15:34:49 +00:00
94010d3362 Merge #1100
1100: net: remove unsafe, update smoltcp. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-12-06 23:29:15 +00:00
f7fe0c1441 net: update smoltcp 2022-12-07 00:28:38 +01:00
7bda01ec24 Fix comment 2022-12-06 23:31:58 +02:00
40f0272dd0 Merge #1099
1099: rp: implement input for OutputOpenDrain r=Dirbaio a=Dirbaio

Needed for onewire and similar protocols.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-12-06 20:12:29 +00:00
54c153673d rp: add OutputOpenDrain input test. 2022-12-06 21:09:27 +01:00
7cbc3aefe6 rp: implement input for OutputOpenDrain 2022-12-06 19:54:39 +01:00
ef2b83cc03 Reset sdmmc clock on card init 2022-12-06 16:36:07 +02:00
5e94b8060b Merge #1089
1089: feat: embassy-boot for rp2040 r=Dirbaio a=lulf

Add embassy-boot support for RP2040, with examples for the Raspberry Pi Pico.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-12-04 19:58:57 +00:00
a2712caab1 Add random example 2022-12-04 09:38:57 +01:00
02abe00439 net: don't use UnsafeCell.
The "must not be called reentrantly" invariant is too "global" to
maintain comfortably, and the cost of the RefCell is negligible,
so this was a case of premature optimization.
2022-12-03 00:56:16 +01:00
bb89a2341c feat: embassy-boot for rp2040
Add embassy-boot support for RP2040, with examples for the Raspberry Pi
Pico.

Co-authored-by: Mathias Koch <mk@blackbird.online>
2022-12-02 11:28:33 +01:00
f109e73c6d Merge #1074
1074: Added blinky example for stm32f0 r=lulf a=imrank03

Hi, I have added **blinky** example for `stm32f0` and tested with Nucleo board `STM32F091RC`.

- Can I add more example for stm32f0?

Co-authored-by: @imrank03 <immu0396@gmail.com>
2022-12-02 08:10:12 +00:00
432240162a Merge pull request #30 from embassy-rs/afit
feat: use async fn in trait
2022-12-01 22:58:41 +01:00
f4c9014fe4 feat: use async fn in trait 2022-12-01 22:09:45 +01:00
9f854110f2 Merge #1082 #1083
1082: stm32: Add basic support for DMA priority settings r=lulf a=matoushybl

This adds very basic support for specifying priority for DMA interrupts. Unfortunately, the patch now doesn't allow for specifying different priorities for DMA1/DMA2, or BDMA1/BDMA2, which I didn't know how to support.

1083: stm32: Fix H7 unaligned erase r=lulf a=matoushybl

This PR simplifies erasing sectors on the H7, which was buggy.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-12-01 13:49:59 +00:00
d8ea297d6a Merge #1088
1088: stm32: Enable fifo for buffered uart r=lulf a=matoushybl

This PR enables fifo for buffered uart where it is available. This should hopfully get rid of some overrun errors. I tried it in my application where it worked, but more intensive testing is probably required.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-12-01 13:34:52 +00:00
e1d7d8d841 stm32: Enable fifo for buffered uart 2022-11-30 22:17:51 +01:00
eb010fbe33 Merge #1086
1086: rp: Add an RngCore impl based on ROSC.RANDOMBIT r=Dirbaio a=yodaldevoid

This has the potential to not be random, but it should not be an issue if default clock settings are used.

Co-authored-by: Gabriel Smith <ga29smith@gmail.com>
2022-11-30 19:10:44 +00:00
71df28e269 rp: Add an RngCore impl based on ROSC.RANDOMBIT
This has the potential to not be random, but it should not be an issue
if default clock settings are used.
2022-11-30 14:06:05 -05:00
645fb66a51 Merge #1087
1087: embassy-stm32: Allow SPI with DMA to implement blocking embbeded-hal traits r=Dirbaio a=guillaume-michel

Before this PR, on STM32, SPI with DMA do not implement embedded-hal blocking traits even if it is allowed by the hardware.

This PR fixes this issue.

I could not do the same thing for `embassy_embedded_hal::shared_bus::asynch::SpiDevice` because  I could not figure out how to deal with "non-blocking" mutex in a non async fn. Maybe someone has the answer...

Hope it is still useful as is.

Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
2022-11-30 13:45:26 +00:00
e0ea5dfdb2 embassy-stm32: Allow SPI with DMA to implement blocking embbeded-hal traits 2022-11-30 09:26:16 +01:00
8436c6180f Merge #1085
1085: Bump defmt-rtt to 0.4 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-11-29 20:19:25 +00:00
1dcb0ea1f5 Bump defmt-rtt to 0.4 2022-11-29 21:15:24 +01:00
902586a019 Merge #1084
1084: Bump embedded-nal-async to 0.3.0 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-11-29 11:07:07 +00:00
3135ad016d Bump embedded-nal-async to 0.3.0 2022-11-29 12:05:46 +01:00
199504be56 Optimization to be able to work with only 2 buffers 2022-11-29 01:09:47 +01:00
4cc0463123 stm32: Add basic support for DMA priority settings 2022-11-28 21:22:39 +01:00
2a35a09444 stm32: Fix H7 unaligned erase 2022-11-28 21:15:24 +01:00
cea29d7de3 Merge #1079
1079: Async function in trait cleanup r=Dirbaio a=yodaldevoid

Some issues I ran across after the AFIT stuff was merged.

Co-authored-by: Gabriel Smith <ga29smith@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-11-27 23:13:41 +00:00
787e5d4907 Add -time, -sync to CI with all features. 2022-11-28 00:12:13 +01:00
aedcc472c9 time: Fix nighly feature compilation after upgrade to embedded-hal-async
0.2.0-alpha.0
2022-11-27 17:59:01 -05:00
4d84b5469e Drive-by documentation link fixes 2022-11-27 16:32:18 -05:00
3ca14ba4e9 usb-driver: Remove unncessary lifetime 2022-11-27 16:28:24 -05:00
d438d1b685 sync: Fix nightly feature compilation after upgrade to embedded-io 0.4.0 2022-11-27 16:24:20 -05:00
6b8ab32536 Use &mut self for start methods 2022-11-26 15:22:31 +01:00
805b885de6 Merge pull request #1044 from embassy-rs/buffereduart-atomic
rp/uart: use lockfree ringbuffer.
2022-11-25 23:04:28 +01:00
7b838d0336 rp/uart: use lockfree ringbuffer.
This gets rid of another PeripheralMutex usage.
2022-11-25 22:30:47 +01:00
fa37452359 Merge pull request #974 from embassy-rs/afit
Switch to async-fn-in-trait
2022-11-25 22:09:57 +01:00
1e2fb0459d Switch to async-fn-in-trait 2022-11-25 21:02:06 +01:00
83c2f8f416 Merge #1077
1077: fix: bump embassy-boot version r=lulf a=lulf

bors r+

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-11-25 14:53:35 +00:00
09077f133d fix: bump embassy-boot version 2022-11-25 15:51:31 +01:00
c7be481190 Merge #1075
1075: fix: add required metadata for embassy-boot r=lulf a=lulf



Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-11-25 13:12:24 +00:00
89821846d7 fix: add required metadata for embassy-boot 2022-11-25 11:43:12 +01:00
5aad2129ef added the runner for stm32f091rc 2022-11-23 17:51:43 +05:30
28991d7794 added blinky example for stm32f0 2022-11-23 17:30:58 +05:30
15a93246d6 Buffer management in line with other peripherals. Constructor and config redesign 2022-11-19 19:18:20 +01:00
f5391efe22 Fix fmt 2022-11-19 02:17:58 +01:00
64e8cfef8e Fix build 2022-11-19 01:38:03 +01:00
16838f8a66 Fix format 2022-11-19 00:32:09 +01:00
6b88057aef Add missing parts and Cleanup 2022-11-19 00:29:05 +01:00
1ed260b105 Fix buffer overruns 2022-11-17 00:19:22 +01:00
4fe834db2f Mono channels 2022-11-13 02:48:07 +01:00
17857bc18f Minor changes 2022-11-13 02:12:58 +01:00
d2e8794f29 Investigating discontinuities in the signal 2022-11-13 01:41:32 +01:00
122a31d208 Interrupts, async, sine oscillator 2022-11-12 18:48:57 +01:00
10e3c3f2ec Cargo fmt 2022-11-11 23:49:20 +01:00
4a2e810485 Restrict to pacs supporting i2s 2022-11-10 23:13:01 +01:00
dbe97b4098 Adapted nvmc so it can be used for all nrf targets 2022-11-10 14:37:42 +01:00
f22f36f51b Add input rx 2022-11-10 00:24:49 +01:00
5a64bf651c Buffer trait. Simpler config. 2022-11-10 00:10:42 +01:00
356beabc3b Apply config 2022-11-09 23:08:09 +01:00
3760b60db3 Make bors grin ;) 2022-11-09 22:31:19 +01:00
cecd77938c Draft: Initial support for I2S with a working example.
Co-authored-by: @brainstorm <brainstorm@nopcode.org>
2022-11-09 19:19:01 +01:00
8a81114baf Update Embassy, nightly, deps. 2022-11-07 22:51:58 +01:00
27771e60af Bake the blob into the firmware by default. 2022-11-07 22:44:20 +01:00
86113e199f Remove unused feature gate 2022-10-11 10:35:43 +02:00
9223b67306 Fix RTC for v2l0 & v2l1 2022-10-11 10:28:28 +02:00
aff265a7f5 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/rtc 2022-10-11 09:19:55 +02:00
79cee74151 Fix stm32wl55jc-cm4 RTC 2022-10-11 09:19:47 +02:00
0d84533bcb Use async spi transaction helper macro. 2022-10-02 21:30:43 +02:00
c385bbf07d Update embassy, embedded-hal. 2022-10-02 21:28:34 +02:00
62c0b18f10 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/rtc 2022-09-30 06:15:12 +02:00
a83560c6b1 Implement RTC peripheral for all stm32 families with rtc 2022-09-29 07:49:32 +02:00
cb6d1fc514 Merge pull request #26 from danbev/bdc_version_const
Add constants for BDC_VERSION
2022-09-26 15:07:53 +02:00
3b04ef265c Add constants for BDC_VERSION
This commit adds two constants intended to be used with the
bdc_header.flags field. I believe these are the correct values after
looking at following lines in `whd_cdc_bdc.c`:

40a7ec2273/WiFi_Host_Driver/src/whd_cdc_bdc.c (L34-L35)
40a7ec2273/WiFi_Host_Driver/src/whd_cdc_bdc.c (L447)
2022-09-26 14:53:37 +02:00
7bbd4671d3 Merge pull request #24 from danbev/suppress-warnings
Suppress compiler warnings
2022-09-26 14:12:34 +02:00
9962db4ecf Suppress compiler warnings
This commit adds the allow(unused) attribute to functions and constants
that are not currently used. There is one warning remaining but
https://github.com/embassy-rs/cyw43/pull/23 attempts to address that
one. The constants have been moved into a module to allow the attribute
to be applied to the module as a whole.

The motivation for this is that it will hopefully make it easier to
spot new warnings that might be introduced by new, or updated code.
2022-09-26 14:08:50 +02:00
79a9a4eb98 Merge pull request #20 from danbev/glom_comment
Add comment about bus:txglom iovar
2022-09-25 23:39:08 +02:00
270c4d2476 Merge pull request #21 from danbev/extra-time-waits
Comment out extra Timer:after calls
2022-09-25 23:38:36 +02:00
6b35f654ba Merge pull request #22 from danbev/antdiv-const
Add const for IOCTL ANTDIV
2022-09-25 23:37:54 +02:00
11387c3b03 Merge pull request #23 from danbev/ioctl_set_u32-iface
Update ioctl_set_u32 to pass through iface param
2022-09-25 23:37:35 +02:00
612000aa8f Merge pull request #25 from danbev/cmd_word_constants
Add constants for cmd_word arguments
2022-09-25 23:36:13 +02:00
9aaefa6e71 Add constants for cmd_word arguments
This commit adds constants intended to be used with the `cmd_word`
function.

The motivation for this to (hopefully) improve the readability of the
code.
2022-09-23 15:06:26 +02:00
281cbcb1e8 Update ioctl_set_u32 to pass through iface param
This commit updates ioctl_set_u32 to pass through the `iface` parameter
to self.iotcl.
2022-09-23 09:39:29 +02:00
28bf4b7b6d Add const for IOCTL ANTDIV 2022-09-23 09:35:54 +02:00
3ba0b3ef3b Comment out extra Timer:after calls
This commit comments out two Timer::after calls which look like they
go together with previous instructions, but those instructions are
currently commented out, so it looks like these calls are not
currently needed.
2022-09-23 09:04:59 +02:00
8f21a5b116 Add comment about bus:txglom iovar
This commit adds a comment to the setting of the iovar `bus:txglom`.

The motivation for this is that I had not heard of 'glom/glomming'
before and having a comment might help others that are not familar with
the term.
2022-09-23 08:37:16 +02:00
9db9333d05 Merge pull request #15 from danbev/ioctl-header-type
Introduce IoctlType enum for IOCTL types
2022-09-22 14:17:09 +02:00
483edf694b Introduce IoctlType enum for IOCTL types
This commit introduces an enum to represent the IOCTL command types
available, the direction of the data transfer (Get and Set).
2022-09-22 14:12:07 +02:00
e7d30194e3 Merge pull request #18 from danbev/has_credit
Make self parameter to has_credit non-mutable
2022-09-18 20:57:23 +02:00
520860622b Make self parameter to has_credit non-mutable 2022-09-17 09:06:23 +02:00
e727fe8675 Merge pull request #16 from danbev/alp
Add contants and update comment about ALP
2022-09-15 13:26:31 +02:00
443e275f1f Merge pull request #17 from danbev/channel-headers
Add constants for channel types
2022-09-15 13:26:04 +02:00
96214f9db6 Add constants for channel types 2022-09-15 09:58:44 +02:00
be20512f17 Add contants and update comment about ALP
This commit add two constants and updates the comment about ALP.

It was not easy to find the definition of ALP but after searching I
found what I believe is the correct definition in section 3.3 "Clocks"
in the referenced document below.

Active Low Power (ALP):
Supplied by an internal or external oscillator. This clock is
requested by cores when accessing backplane registers in other cores
or when performing minor computations. When an external crystal is
used to provide reference clock, ALP clock frequency is determined by
the frequency of the external oscillator. A 37.4 MHz reference clock
 is recommended.

Refs:
https://www.infineon.com/dgdl/Infineon-AN214828_Power_Consumption_Measurements-ApplicationNotes-v03_00-EN.pdf?fileId=8ac78c8c7cdc391c017d0d2803a4630d
2022-09-12 11:49:09 +02:00
a19bcb69d1 Merge pull request #14 from danbev/ioctl_set_get_consts
Add constants for ioctl commands
2022-09-09 22:11:55 +02:00
92136d27f6 Merge pull request #13 from danbev/update_credit_seq_max
Use wrapping_sub in update_credit
2022-09-09 22:11:16 +02:00
f0b7f43c41 Use wrapping_sub in update_credit
This commit uses wrapping_sub for subtraction in update_credit.

The motivation for this is that currently the rpi-pico-w example panics
(at least for me) with the following error:

3.825277 INFO  init done
└─ cyw43::{impl#4}::init::{async_fn#0} @ /embassy/cyw43/src/fmt.rs:138
3.825486 INFO  Downloading CLM...
└─ cyw43::{impl#2}::init::{async_fn#0} @ /embassy/cyw43/src/fmt.rs:138
3.841328 WARN  TX stalled
└─ cyw43::{impl#4}::run::{async_fn#0} @ /embassy/cyw43/src/fmt.rs:151
3.845549 ERROR panicked at 'attempt to subtract with overflow', /embassy/cyw43/src/lib.rs:919:16
└─ panic_probe::print_defmt::print @ .cargo/registry/src/github.com-1ecc6299db9ec823/panic-probe-0.3.0/src/lib.rs:91
────────────────────────────────────────────────────────────────────────────────
stack backtrace:
   0: HardFaultTrampoline
      <exception entry>
   1: lib::inline::__udf
        at ./asm/inline.rs:181:5
   2: __udf
        at ./asm/lib.rs:51:17
   3: cortex_m::asm::udf
        at .cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-0.7.6/src/asm.rs:43:5
   4: rust_begin_unwind
        at .cargo/registry/src/github.com-1ecc6299db9ec823/panic-probe-0.3.0/src/lib.rs:72:9
   5: core::panicking::panic_fmt
        at rustc/1c7b36d4db582cb47513a6c7176baaec1c3346ab/library/core/src/panicking.rs:142:14
   6: core::panicking::panic
        at /rustc/1c7b36d4db582cb47513a6c7176baaec1c3346ab/library/core/src/panicking.rs:48:5
   7: cyw43::Runner<PWR,SPI>::update_credit
        at /embassy/cyw43/src/lib.rs:919:16
   8: cyw43::Runner<PWR,SPI>::rx
        at /embassy/cyw43/src/lib.rs:808:9
   9: cyw43::Runner<PWR,SPI>::run::{{closure}}
        at /embassy/cyw43/src/lib.rs:727:21
  10: <core::future::from_generator::GenFuture<T> as core::future::future::Future>::poll
        at /rustc/1c7b36d4db582cb47513a6c7176baaec1c3346ab/library/core/src/future/mod.rs:91:19
  11: cyw43_example_rpi_pico_w::__wifi_task_task::{{closure}}
        at src/main.rs:32:17
2022-09-09 15:09:54 +02:00
fe5229670f Add constants for ioctl commands
This commit adds contants for the IOCTL commands that are currently
used in cyw43::Control.
2022-09-09 14:31:00 +02:00
6b90ab8664 Merge pull request #12 from jannic-dev-forks/gpio
Add gpio_set
2022-09-06 23:11:27 +02:00
ea0738c485 Add gpio_set
Example: Blink LED

```
    loop {
        info!("on");
        control.gpio_set(0, true).await;
        Timer::after(Duration::from_millis(200)).await;

        info!("off");
        control.gpio_set(0, false).await;
        Timer::after(Duration::from_millis(200)).await;
    }
```
2022-09-06 21:08:04 +00:00
29145e5f92 Merge pull request #11 from jannic-dev-forks/minimal_flow_control
Implement minimal tx flow control
2022-09-06 22:56:24 +02:00
5c4d6232ae Fixes after review
- rename tx_seq_max to sdpcm_seq_max
- make sure we have credit for each packet we send
2022-09-06 20:50:27 +00:00
95f3484b87 Implement minimal tx flow control
The credit update code uses constants from
https://github.com/Infineon/wifi-host-driver/blob/master/WiFi_Host_Driver/src/whd_sdpcm.c#L307-L317
2022-09-06 12:40:22 +00:00
2bd7205c79 Merge pull request #9 from jannic-dev-forks/fix-total-len-slice
Fix calculation of slice index
2022-08-31 02:51:15 +02:00
acaa8b3e8b Fix calculation of slice index
total_len is already rounded up, so the `+ 3` is not needed.
And even if it was, the calculation should have been `((total_len + 3) / 4)`.

`(total_len + 3 / 4)` is equivalent to `total_len` and can overflow
the slice, leading to a panic which can easily be triggered by sending
large ICMP ECHO packets to the device.
2022-08-30 20:37:02 +00:00
69e92e5639 Merge pull request #6 from danbev/add-word-length-constants
Add WORD_LENGTH_32 constant
2022-08-25 15:52:10 +02:00
f2ac14b86f Add WORD_LENGTH_32/HIGH_SPEED constants
This commit adds two constants which are intended to be used for setting
the `Word Length` and `High Speed` fields in the gSPR register
(address: 0x0000, bit: 0 and bit 4).

Currently, this field is being set by the following line:
```rust
        // 32bit, little endian.
        self.write32_swapped(REG_BUS_CTRL, 0x00010031).await;
```

Assuming that we are sending these bits using the gSPI write protocol
and using 16-bit word operation in little endian (which I think might
be the default) then the data bytes should be packed like this:
```
  +--+--+--+--+
  |D1|D0|D3|D2|
  +--+--+--+--+

val (hex):   0x00010031
val (bin):   00000000000000010000000000110001
rotated(16): 00000000001100010000000000000001
```

If we split val into bytes and rotated the bits we get:
```
Split into bytes:
   D3      D2        D1       D0
00000000 00000001 00000000 00110001

Rotate 16 and split into bytes:
   D1      D0        D3       D2
00000000 00110001 00000000 00000001
```
Looking at the write procotol it seems to me that the above will
indeed set the `Word Length` to 1 but will also set other values.
```
                                  Status enable (1=default)
   D1      D0        D3       D2  ↓
00000000 00110001 00000000 00000001
           ↑↑  ↑↑                 ↑
           ||  |Word Length (1=32-bit)
           ||  |
           ||  Endianess (0=Little)
           ||
           |High-speed mode (1=High speed (default))
           |
           Interrupt polarity (1=high (default))
```

This commit suggests adding the above mentioned constants for setting
the only the word length field and the high speed field.
2022-08-25 15:40:14 +02:00
193124bed1 Merge pull request #8 from danbev/test-ro-rw-constants
Rename REG_BUS_FEEDBEAD to REG_BUS_TEST_RO
2022-08-25 14:16:16 +02:00
63806022f3 Merge pull request #7 from danbev/ai_comment
Add comment for AI constants
2022-08-25 14:14:48 +02:00
3826b4f713 Rename REG_BUS_FEEDBEAD to REG_BUS_TEST_RO
This commit renames the REG_BUS_FEEDBEAD to REG_BUS_TEST_RO
(Read-Only) which is the name used in the specification, section 4.2.3
Table 6.

It also adds a constant named REG_BUS_TEST_RW (Read-Write) to represent
the dummy register which the host can use to write data and read back
to check that the gSPI interface is working properly.
2022-08-25 09:13:26 +02:00
bb76a29ff1 Add comment for AI constants
This commit adds a comment about the AI_* constants.

The motivation for using this definition is from looking in the
following file:
https://github.com/seemoo-lab/bcm-public/blob/master/firmware_patching/examples/ioctl/bcmdhd/include/aidmp.h#L2
https://github.com/seemoo-lab/bcm-public/blob/master/firmware_patching/examples/ioctl/bcmdhd/include/aidmp.h#L307-L361
2022-08-24 15:58:44 +02:00
9218aff498 Update Embassy. 2022-08-23 01:06:14 +02:00
945449b10f Update Embassy. 2022-08-22 17:26:05 +02:00
79c7be3fc6 Merge pull request #5 from danbev/clm-comments
Add comments about Country Locale Matrix (CLM)
2022-08-22 00:52:21 +02:00
6b4555a6a7 Add comments about Country Locale Matrix (CLM)
This commit add comments about what CLM stands for.

The motivation of this is that I think it helps understanding the code
for users who are new to the codebase (like me).
2022-08-20 10:52:45 +02:00
f76815d642 Update Embassy. 2022-08-13 15:37:30 +02:00
3388b5cecf Improve data checks for VHD events
For some reason I got strange events on channel 1 (ASYNCEVENT_HEADER):

0.647329 WARN  unexpected ehternet type 0x0508, expected Qualcom ether type 0x886c

This patch improves the validation of BCD WHD events to minimize the
risk for panic.
2022-08-13 15:25:34 +02:00
ddfbfa0132 move ioctl_id from State to Runner. 2022-08-13 15:11:17 +02:00
5ef40acd1d Fix set iovar buffer length. 2022-07-22 00:05:39 +02:00
92505f53e2 Get wifi credentials from envvars in example. 2022-07-21 23:50:40 +02:00
726d68a706 Add status and instructions in README. 2022-07-17 00:34:41 +02:00
54269a0761 Switch default log to debug.
Trace is very VRYY verbose.
2022-07-17 00:34:27 +02:00
13c88a9ca3 Obtain the firmware blobs from the user instead of hardcoding magic flash addrs. 2022-07-17 00:33:30 +02:00
4205eef3ec Fix iovar_get, unhardcode MAC addr. 2022-07-16 19:25:35 +02:00
931e3d7ee0 Switch to 32bit SPI. 2022-07-16 18:06:57 +02:00
7dfdea8797 Switch to embedded-hal SPI, GPIO traits. 2022-07-16 08:26:54 +02:00
31410aa5b7 update rust nightly to match embassy. 2022-07-13 21:22:52 +02:00
ce7353fba4 Hook up embassy-net. IT WORKS. 2022-07-12 07:52:16 +02:00
f60407feb3 ITS DOING SOMETHING 2022-07-12 05:06:29 +02:00
e1fd7dfc40 wpa2 join... still nothing. 2022-07-12 04:17:07 +02:00
18b11e7417 check clmload_status. 2022-07-12 03:34:27 +02:00
d96ad248b3 Add LICENSEs 2022-07-11 22:53:57 +02:00
3ffdbd2ca3 stuff 2022-07-11 22:44:42 +02:00
30b7800f9a add event printing, add join but not working yet. 2022-07-11 05:19:31 +02:00
7ddcacac7b clm download, country config. 2022-07-11 03:07:39 +02:00
069a57fcf8 async ioctls working. 2022-07-11 00:25:35 +02:00
e560415fde 🌈 2022-07-10 19:45:26 +02:00
806 changed files with 60592 additions and 31032 deletions

16
.github/ci/build-stable.sh vendored Executable file
View File

@ -0,0 +1,16 @@
#!/bin/bash
## on push branch~=gh-readonly-queue/main/.*
## on pull_request
set -euo pipefail
export RUSTUP_HOME=/ci/cache/rustup
export CARGO_HOME=/ci/cache/cargo
export CARGO_TARGET_DIR=/ci/cache/target
hashtime restore /ci/cache/filetime.json || true
hashtime save /ci/cache/filetime.json
sed -i 's/channel.*/channel = "stable"/g' rust-toolchain.toml
./ci_stable.sh

19
.github/ci/build.sh vendored Executable file
View File

@ -0,0 +1,19 @@
#!/bin/bash
## on push branch~=gh-readonly-queue/main/.*
## on pull_request
set -euo pipefail
export RUSTUP_HOME=/ci/cache/rustup
export CARGO_HOME=/ci/cache/cargo
export CARGO_TARGET_DIR=/ci/cache/target
if [ -f /ci/secrets/teleprobe-token.txt ]; then
echo Got teleprobe token!
export TELEPROBE_HOST=https://teleprobe.embassy.dev
export TELEPROBE_TOKEN=$(cat /ci/secrets/teleprobe-token.txt)
fi
hashtime restore /ci/cache/filetime.json || true
hashtime save /ci/cache/filetime.json
./ci.sh

44
.github/ci/doc.sh vendored Executable file
View File

@ -0,0 +1,44 @@
#!/bin/bash
## on push branch=main
set -euo pipefail
export RUSTUP_HOME=/ci/cache/rustup
export CARGO_HOME=/ci/cache/cargo
export CARGO_TARGET_DIR=/ci/cache/target
export BUILDER_THREADS=6
export BUILDER_COMPRESS=true
# force rustup to download the toolchain before starting building.
# Otherwise, the docs builder is running multiple instances of cargo rustdoc concurrently.
# They all see the toolchain is not installed and try to install it in parallel
# which makes rustup very sad
rustc --version > /dev/null
docserver-builder -i ./embassy-stm32 -o crates/embassy-stm32/git.zup
docserver-builder -i ./embassy-boot/boot -o crates/embassy-boot/git.zup
docserver-builder -i ./embassy-boot/nrf -o crates/embassy-boot-nrf/git.zup
docserver-builder -i ./embassy-boot/rp -o crates/embassy-boot-rp/git.zup
docserver-builder -i ./embassy-boot/stm32 -o crates/embassy-boot-stm32/git.zup
docserver-builder -i ./embassy-embedded-hal -o crates/embassy-embedded-hal/git.zup
docserver-builder -i ./embassy-executor -o crates/embassy-executor/git.zup
docserver-builder -i ./embassy-futures -o crates/embassy-futures/git.zup
docserver-builder -i ./embassy-lora -o crates/embassy-lora/git.zup
docserver-builder -i ./embassy-net -o crates/embassy-net/git.zup
docserver-builder -i ./embassy-net-driver -o crates/embassy-net-driver/git.zup
docserver-builder -i ./embassy-net-driver-channel -o crates/embassy-net-driver-channel/git.zup
docserver-builder -i ./embassy-nrf -o crates/embassy-nrf/git.zup
docserver-builder -i ./embassy-rp -o crates/embassy-rp/git.zup
docserver-builder -i ./embassy-sync -o crates/embassy-sync/git.zup
docserver-builder -i ./embassy-time -o crates/embassy-time/git.zup
docserver-builder -i ./embassy-usb -o crates/embassy-usb/git.zup
docserver-builder -i ./embassy-usb-driver -o crates/embassy-usb-driver/git.zup
docserver-builder -i ./embassy-usb-logger -o crates/embassy-usb-logger/git.zup
docserver-builder -i ./cyw43 -o crates/cyw43/git.zup
docserver-builder -i ./cyw43-pio -o crates/cyw43-pio/git.zup
docserver-builder -i ./embassy-net-w5500 -o crates/embassy-net-w5500/git.zup
docserver-builder -i ./embassy-stm32-wpan -o crates/embassy-stm32-wpan/git.zup
export KUBECONFIG=/ci/secrets/kubeconfig.yml
POD=$(kubectl -n embassy get po -l app=docserver -o jsonpath={.items[0].metadata.name})
kubectl cp crates $POD:/data

30
.github/ci/test.sh vendored Executable file
View File

@ -0,0 +1,30 @@
#!/bin/bash
## on push branch~=gh-readonly-queue/main/.*
## on pull_request
set -euo pipefail
export RUSTUP_HOME=/ci/cache/rustup
export CARGO_HOME=/ci/cache/cargo
export CARGO_TARGET_DIR=/ci/cache/target
hashtime restore /ci/cache/filetime.json || true
hashtime save /ci/cache/filetime.json
cargo test --manifest-path ./embassy-sync/Cargo.toml
cargo test --manifest-path ./embassy-embedded-hal/Cargo.toml
cargo test --manifest-path ./embassy-hal-common/Cargo.toml
cargo test --manifest-path ./embassy-time/Cargo.toml --features generic-queue
cargo test --manifest-path ./embassy-boot/boot/Cargo.toml
cargo test --manifest-path ./embassy-boot/boot/Cargo.toml --features nightly
cargo test --manifest-path ./embassy-boot/boot/Cargo.toml --features nightly,ed25519-dalek
cargo test --manifest-path ./embassy-boot/boot/Cargo.toml --features nightly,ed25519-salty
cargo test --manifest-path ./embassy-nrf/Cargo.toml --no-default-features --features nightly,nrf52840,time-driver-rtc1,gpiote
cargo test --manifest-path ./embassy-rp/Cargo.toml --no-default-features --features nightly,time-driver
cargo test --manifest-path ./embassy-stm32/Cargo.toml --no-default-features --features nightly,stm32f429vg,exti,time-driver-any,exti
cargo test --manifest-path ./embassy-stm32/Cargo.toml --no-default-features --features nightly,stm32f732ze,exti,time-driver-any,exti
cargo test --manifest-path ./embassy-stm32/Cargo.toml --no-default-features --features nightly,stm32f769ni,exti,time-driver-any,exti

View File

@ -1,86 +0,0 @@
name: Docs
on:
push:
branches: [master]
env:
BUILDER_THREADS: '1'
jobs:
doc:
runs-on: ubuntu-latest
# Since stm32 crates take SO LONG to build, we split them
# into a separate job. This way it doesn't slow down updating
# the rest.
strategy:
matrix:
crates:
- stm32
- rest
# This will ensure at most one doc build job is running at a time
# (for stm32 and non-stm32 independently).
# If another job is already running, the new job will wait.
# If another job is already waiting, it'll be canceled.
# This means some commits will be skipped, but that's fine because
# we only care that the latest gets built.
concurrency: doc-${{ matrix.crates }}
steps:
- uses: actions/checkout@v2
with:
submodules: true
- name: Install Rust targets
run: |
rustup target add x86_64-unknown-linux-gnu
rustup target add wasm32-unknown-unknown
rustup target add thumbv6m-none-eabi
rustup target add thumbv7m-none-eabi
rustup target add thumbv7em-none-eabi
rustup target add thumbv7em-none-eabihf
rustup target add thumbv8m.base-none-eabi
rustup target add thumbv8m.main-none-eabi
rustup target add thumbv8m.main-none-eabihf
- name: Install docserver
run: |
wget -q -O /usr/local/bin/builder "https://github.com/embassy-rs/docserver/releases/download/v0.3/builder"
chmod +x /usr/local/bin/builder
- name: build-stm32
if: ${{ matrix.crates=='stm32' }}
run: |
mkdir crates
builder ./embassy-stm32 crates/embassy-stm32/git.zup
builder ./stm32-metapac crates/stm32-metapac/git.zup
- name: build-rest
if: ${{ matrix.crates=='rest' }}
run: |
mkdir crates
builder ./embassy-boot/boot crates/embassy-boot/git.zup
builder ./embassy-boot/nrf crates/embassy-boot-nrf/git.zup
builder ./embassy-boot/stm32 crates/embassy-boot-stm32/git.zup
builder ./embassy-cortex-m crates/embassy-cortex-m/git.zup
builder ./embassy-embedded-hal crates/embassy-embedded-hal/git.zup
builder ./embassy-executor crates/embassy-executor/git.zup
builder ./embassy-futures crates/embassy-futures/git.zup
builder ./embassy-lora crates/embassy-lora/git.zup
builder ./embassy-net crates/embassy-net/git.zup
builder ./embassy-nrf crates/embassy-nrf/git.zup
builder ./embassy-rp crates/embassy-rp/git.zup
builder ./embassy-sync crates/embassy-sync/git.zup
builder ./embassy-time crates/embassy-time/git.zup
builder ./embassy-usb crates/embassy-usb/git.zup
builder ./embassy-usb-driver crates/embassy-usb-driver/git.zup
- name: upload
run: |
mkdir -p ~/.kube
echo "${{secrets.KUBECONFIG}}" > ~/.kube/config
POD=$(kubectl -n embassy get po -l app=docserver -o jsonpath={.items[0].metadata.name})
kubectl cp crates $POD:/data

View File

@ -1,72 +0,0 @@
name: Rust
on:
push:
branches: [staging, trying, master]
pull_request:
branches: [master]
env:
CARGO_TERM_COLOR: always
jobs:
all:
runs-on: ubuntu-latest
needs: [build-nightly, build-stable, test]
steps:
- name: Done
run: exit 0
build-nightly:
runs-on: ubuntu-latest
permissions:
id-token: write
contents: read
steps:
- uses: actions/checkout@v2
with:
submodules: true
- name: Cache multiple paths
uses: actions/cache@v2
with:
path: |
~/.cargo/bin/
~/.cargo/registry/index/
~/.cargo/registry/cache/
~/.cargo/git/db/
target_ci
key: rust3-${{ runner.os }}-${{ hashFiles('rust-toolchain.toml') }}
- name: build
run: |
curl -L -o /usr/local/bin/cargo-batch https://github.com/embassy-rs/cargo-batch/releases/download/batch-0.3.0/cargo-batch
chmod +x /usr/local/bin/cargo-batch
./ci.sh
rm -rf target_ci/*{,/release}/{build,deps,.fingerprint}/{lib,}{embassy,stm32}*
build-stable:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2
with:
submodules: true
- name: Cache multiple paths
uses: actions/cache@v2
with:
path: |
~/.cargo/bin/
~/.cargo/registry/index/
~/.cargo/registry/cache/
~/.cargo/git/db/
target_ci_stable
key: rust-stable-${{ runner.os }}-${{ hashFiles('rust-toolchain.toml') }}
- name: build
run: |
curl -L -o /usr/local/bin/cargo-batch https://github.com/embassy-rs/cargo-batch/releases/download/batch-0.3.0/cargo-batch
chmod +x /usr/local/bin/cargo-batch
./ci_stable.sh
rm -rf target_ci_stable/*{,/release}/{build,deps,.fingerprint}/{lib,}{embassy,stm32}*
test:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2
- name: Test
run: cd embassy-sync && cargo test

4
.gitignore vendored
View File

@ -4,8 +4,4 @@ target_ci_stable
Cargo.lock
third_party
/Cargo.toml
stm32-metapac-gen/out/
stm32-metapac-backup
stm32-metapac/src/chips
stm32-metapac/src/peripherals
out/

3
.gitmodules vendored
View File

@ -1,3 +0,0 @@
[submodule "stm32-data"]
path = stm32-data
url = https://github.com/embassy-rs/stm32-data.git

4
.vscode/.gitignore vendored Normal file
View File

@ -0,0 +1,4 @@
*.cortex-debug.*.json
launch.json
tasks.json
*.cfg

11
.vscode/extensions.json vendored Normal file
View File

@ -0,0 +1,11 @@
{
// See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations.
// Extension identifier format: ${publisher}.${name}. Example: vscode.csharp
// List of extensions which should be recommended for users of this workspace.
"recommendations": [
"rust-lang.rust-analyzer",
"tamasfe.even-better-toml",
],
// List of extensions recommended by VS Code that should not be recommended for users of this workspace.
"unwantedRecommendations": []
}

35
.vscode/settings.json vendored
View File

@ -1,28 +1,26 @@
{
"editor.formatOnSave": true,
"rust-analyzer.checkOnSave.allTargets": false,
"rust-analyzer.checkOnSave.noDefaultFeatures": true,
"[toml]": {
"editor.formatOnSave": false
},
"rust-analyzer.check.allTargets": false,
"rust-analyzer.check.noDefaultFeatures": true,
"rust-analyzer.cargo.noDefaultFeatures": true,
"rust-analyzer.procMacro.enable": true,
"rust-analyzer.cargo.target": "thumbv7em-none-eabi",
"rust-analyzer.cargo.target": "thumbv7m-none-eabi",
//"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf",
"rust-analyzer.cargo.features": [
// These are needed to prevent embassy-net from failing to build
//"embassy-net/medium-ethernet",
//"embassy-net/tcp",
//"embassy-net/pool-16",
//"time-tick-16mhz",
//"defmt-timestamp-uptime",
"nightly",
//"unstable-traits",
///"nightly",
],
"rust-analyzer.linkedProjects": [
// Declare for the target you wish to develop
//"embassy-executor/Cargo.toml",
//"embassy-sync/Cargo.toml",
"examples/nrf/Cargo.toml",
// "embassy-executor/Cargo.toml",
// "embassy-sync/Cargo.toml",
"examples/stm32wl/Cargo.toml",
// "examples/nrf5340/Cargo.toml",
// "examples/nrf-rtos-trace/Cargo.toml",
// "examples/rp/Cargo.toml",
// "examples/std/Cargo.toml",
// "examples/stm32c0/Cargo.toml",
// "examples/stm32f0/Cargo.toml",
// "examples/stm32f1/Cargo.toml",
// "examples/stm32f2/Cargo.toml",
@ -31,6 +29,7 @@
// "examples/stm32f7/Cargo.toml",
// "examples/stm32g0/Cargo.toml",
// "examples/stm32g4/Cargo.toml",
// "examples/stm32h5/Cargo.toml",
// "examples/stm32h7/Cargo.toml",
// "examples/stm32l0/Cargo.toml",
// "examples/stm32l1/Cargo.toml",
@ -38,13 +37,7 @@
// "examples/stm32l5/Cargo.toml",
// "examples/stm32u5/Cargo.toml",
// "examples/stm32wb/Cargo.toml",
// "examples/stm32wb55/Cargo.toml",
// "examples/stm32wl/Cargo.toml",
// "examples/stm32wl55/Cargo.toml",
// "examples/wasm/Cargo.toml",
],
"rust-analyzer.imports.granularity.enforce": true,
"rust-analyzer.imports.granularity.group": "module",
"rust-analyzer.cargo.buildScripts.enable": true,
"rust-analyzer.procMacro.attributes.enable": false,
}

View File

@ -14,12 +14,16 @@ Rust's <a href="https://rust-lang.github.io/async-book/">async/await</a> allows
- **Hardware Abstraction Layers** - HALs implement safe, idiomatic Rust APIs to use the hardware capabilities, so raw register manipulation is not needed. The Embassy project maintains HALs for select hardware, but you can still use HALs from other projects with Embassy.
- <a href="https://docs.embassy.dev/embassy-stm32/">embassy-stm32</a>, for all STM32 microcontroller families.
- <a href="https://docs.embassy.dev/embassy-nrf/">embassy-nrf</a>, for the Nordic Semiconductor nRF52, nRF53, nRF91 series.
- <a href="https://docs.embassy.dev/embassy-rp/">embassy-rp</a>, for the Raspberry Pi RP2040 microcontroller.
- <a href="https://github.com/esp-rs">esp-rs</a>, for the Espressif Systems ESP32 series of chips.
- Embassy HAL support for Espressif chips is being developed in the [esp-rs/esp-hal](https://github.com/esp-rs/esp-hal) repository.
- Async WiFi, Bluetooth and ESP-NOW is being developed in the [esp-rs/esp-wifi](https://github.com/esp-rs/esp-wifi) repository.
- **Time that Just Works** -
No more messing with hardware timers. <a href="https://docs.embassy.dev/embassy-time">embassy_time</a> provides Instant, Duration and Timer types that are globally available and never overflow.
- **Real-time ready** -
Tasks on the same async executor run cooperatively, but you can create multiple executors with different priorities, so that higher priority tasks preempt lower priority ones. See the <a href="https://github.com/embassy-rs/embassy/blob/master/examples/nrf/src/bin/multiprio.rs">example</a>.
Tasks on the same async executor run cooperatively, but you can create multiple executors with different priorities, so that higher priority tasks preempt lower priority ones. See the <a href="https://github.com/embassy-rs/embassy/blob/master/examples/nrf52840/src/bin/multiprio.rs">example</a>.
- **Low-power ready** -
Easily build devices with years of battery life. The async executor automatically puts the core to sleep when there's no work to do. Tasks are woken by interrupts, there is no busy-loop polling while waiting.
@ -31,7 +35,7 @@ The <a href="https://docs.embassy.dev/embassy-net/">embassy-net</a> network stac
The <a href="https://github.com/embassy-rs/nrf-softdevice">nrf-softdevice</a> crate provides Bluetooth Low Energy 4.x and 5.x support for nRF52 microcontrollers.
- **LoRa** -
<a href="https://docs.embassy.dev/embassy-lora/">embassy-lora</a> supports LoRa networking on STM32WL wireless microcontrollers and Semtech SX126x and SX127x transceivers.
<a href="https://docs.embassy.dev/embassy-lora/">embassy-lora</a> supports LoRa networking.
- **USB** -
<a href="https://docs.embassy.dev/embassy-usb/">embassy-usb</a> implements a device-side USB stack. Implementations for common classes such as USB serial (CDC ACM) and USB HID are available, and a rich builder API allows building your own.
@ -87,30 +91,24 @@ async fn main(spawner: Spawner) {
Examples are found in the `examples/` folder seperated by the chip manufacturer they are designed to run on. For example:
* `examples/nrf` run on the `nrf52840-dk` board (PCA10056) but should be easily adaptable to other nRF52 chips and boards.
* `examples/nrf52840` run on the `nrf52840-dk` board (PCA10056) but should be easily adaptable to other nRF52 chips and boards.
* `examples/nrf5340` run on the `nrf5340-dk` board (PCA10095).
* `examples/stm32xx` for the various STM32 families.
* `examples/rp` are for the RP2040 chip.
* `examples/std` are designed to run locally on your PC.
### Running examples
- Setup git submodules (needed for STM32 examples)
- Install `probe-rs`.
```bash
git submodule init
git submodule update
```
- Install `probe-run` with defmt support.
```bash
cargo install probe-run
cargo install probe-rs --features cli
```
- Change directory to the sample's base directory. For example:
```bash
cd examples/nrf
cd examples/nrf52840
```
- Run the example
@ -118,7 +116,7 @@ cd examples/nrf
For example:
```bash
cargo run --bin blinky
cargo run --release --bin blinky
```
## Developing Embassy with Rust Analyzer based editors

160
ci.sh
View File

@ -2,50 +2,48 @@
set -euo pipefail
export CARGO_TARGET_DIR=$PWD/target_ci
export RUSTFLAGS=-Dwarnings
export DEFMT_LOG=trace
export DEFMT_LOG=trace,embassy_net_esp_hosted=debug,cyw43=info,cyw43_pio=info,smoltcp=info
# needed by wifi examples
export WIFI_NETWORK=x
export WIFI_PASSWORD=x
TARGET=$(rustc -vV | sed -n 's|host: ||p')
BUILD_EXTRA=""
if [ $TARGET = "x86_64-unknown-linux-gnu" ]; then
BUILD_EXTRA="--- build --release --manifest-path examples/std/Cargo.toml --target $TARGET --out-dir out/examples/std"
else
BUILD_EXTRA=""
fi
find . -name '*.rs' -not -path '*target*' -not -path '*stm32-metapac-gen/out/*' -not -path '*stm32-metapac/src/*' | xargs rustfmt --check --skip-children --unstable-features --edition 2018
# Generate stm32-metapac
if [ ! -d "stm32-metapac-backup" ]
then
cp -r stm32-metapac stm32-metapac-backup
fi
rm -rf stm32-metapac
cp -r stm32-metapac-backup stm32-metapac
# for some reason Cargo stomps the cache if we don't specify --target.
# This happens with vanilla Cargo, not just cargo-batch. Bug?
(cd stm32-metapac-gen; cargo run --release --target $TARGET)
rm -rf stm32-metapac
mv stm32-metapac-gen/out stm32-metapac
find . -name '*.rs' -not -path '*target*' | xargs rustfmt --check --skip-children --unstable-features --edition 2021
cargo batch \
--- build --release --manifest-path embassy-executor/Cargo.toml --target thumbv7em-none-eabi --features nightly \
--- build --release --manifest-path embassy-executor/Cargo.toml --target thumbv7em-none-eabi --features nightly,log \
--- build --release --manifest-path embassy-executor/Cargo.toml --target thumbv7em-none-eabi --features nightly,defmt \
--- build --release --manifest-path embassy-executor/Cargo.toml --target thumbv6m-none-eabi --features nightly,defmt \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,pool-16 \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,pool-16,unstable-traits \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,pool-16,nightly \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,pool-16,unstable-traits,nightly \
--- build --release --manifest-path embassy-sync/Cargo.toml --target thumbv6m-none-eabi --features nightly,defmt \
--- build --release --manifest-path embassy-time/Cargo.toml --target thumbv6m-none-eabi --features nightly,unstable-traits,defmt,defmt-timestamp-uptime,tick-hz-32_768,generic-queue-8 \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv4,medium-ethernet \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,unstable-traits \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,nightly \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,unstable-traits,nightly \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ethernet \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ethernet,unstable-traits \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ethernet,nightly \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ethernet,unstable-traits,nightly \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv4,proto-ipv6,medium-ethernet \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv4,proto-ipv6,medium-ethernet,unstable-traits \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv4,proto-ipv6,medium-ethernet,nightly \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv4,proto-ipv6,medium-ethernet,unstable-traits,nightly \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nightly,nrf52805,gpiote,time-driver-rtc1 \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nightly,nrf52810,gpiote,time-driver-rtc1 \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nightly,nrf52811,gpiote,time-driver-rtc1 \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nightly,nrf52820,gpiote,time-driver-rtc1 \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nightly,nrf52832,gpiote,time-driver-rtc1 \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nightly,nrf52833,gpiote,time-driver-rtc1,unstable-traits \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nightly,nrf52832,gpiote,time-driver-rtc1,reset-pin-as-gpio \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nightly,nrf52833,gpiote,time-driver-rtc1,unstable-traits,nfc-pins-as-gpio \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features nightly,nrf9160-s,gpiote,time-driver-rtc1 \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features nightly,nrf9160-ns,gpiote,time-driver-rtc1,unstable-traits \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features nightly,nrf5340-app-s,gpiote,time-driver-rtc1,unstable-traits \
@ -59,12 +57,29 @@ cargo batch \
--- build --release --manifest-path embassy-rp/Cargo.toml --target thumbv6m-none-eabi --features nightly,unstable-traits \
--- build --release --manifest-path embassy-rp/Cargo.toml --target thumbv6m-none-eabi --features nightly \
--- build --release --manifest-path embassy-rp/Cargo.toml --target thumbv6m-none-eabi --features nightly,intrinsics \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,time-driver-any \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,time-driver-any \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt,exti,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,defmt \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,time-driver-any \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,time-driver-any \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt,exti,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,nightly,defmt \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f410tb,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f411ce,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f429zi,log,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f413vh,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f429zi,log,exti,time-driver-any,unstable-traits,embedded-sdmmc \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32f730i8,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h755zi-cm7,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32h7b3ai,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l476vg,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32l422cb,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wb15cc,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l072cz,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32l041f6,defmt,exti,time-driver-any,unstable-traits \
@ -74,18 +89,31 @@ cargo batch \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f217zg,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features nightly,stm32l552ze,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features nightly,stm32wl54jc-cm0p,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wle5ub,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features nightly,stm32wle5jb,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f107vc,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f103re,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32f100c4,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-boot/nrf/Cargo.toml --target thumbv7em-none-eabi --features embassy-nrf/nrf52840 \
--- build --release --manifest-path embassy-boot/stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32wl55jc-cm4 \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32h503rb,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features nightly,stm32h562ag,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features ''\
--- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'log' \
--- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'defmt' \
--- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'log,firmware-logs' \
--- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'defmt,firmware-logs' \
--- build --release --manifest-path cyw43-pio/Cargo.toml --target thumbv6m-none-eabi --features '' \
--- build --release --manifest-path cyw43-pio/Cargo.toml --target thumbv6m-none-eabi --features 'overclock' \
--- build --release --manifest-path embassy-boot/nrf/Cargo.toml --target thumbv7em-none-eabi --features embassy-nrf/nrf52840,nightly \
--- build --release --manifest-path embassy-boot/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9160-ns,nightly \
--- build --release --manifest-path embassy-boot/rp/Cargo.toml --target thumbv6m-none-eabi --features nightly \
--- build --release --manifest-path embassy-boot/stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32wl55jc-cm4,nightly \
--- build --release --manifest-path docs/modules/ROOT/examples/basic/Cargo.toml --target thumbv7em-none-eabi \
--- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-pac/Cargo.toml --target thumbv7em-none-eabi \
--- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-hal/Cargo.toml --target thumbv7em-none-eabi \
--- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-irq/Cargo.toml --target thumbv7em-none-eabi \
--- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-async/Cargo.toml --target thumbv7em-none-eabi \
--- build --release --manifest-path examples/nrf/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/nrf \
--- build --release --manifest-path examples/nrf52840/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/nrf52840 \
--- build --release --manifest-path examples/nrf52840-rtic/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/nrf52840-rtic \
--- build --release --manifest-path examples/nrf5340/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/nrf5340 \
--- build --release --manifest-path examples/rp/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/rp \
--- build --release --manifest-path examples/stm32f0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32f0 \
--- build --release --manifest-path examples/stm32f1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/stm32f1 \
@ -93,8 +121,10 @@ cargo batch \
--- build --release --manifest-path examples/stm32f3/Cargo.toml --target thumbv7em-none-eabihf --out-dir out/examples/stm32f3 \
--- build --release --manifest-path examples/stm32f4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32f4 \
--- build --release --manifest-path examples/stm32f7/Cargo.toml --target thumbv7em-none-eabihf --out-dir out/examples/stm32f7 \
--- build --release --manifest-path examples/stm32c0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32c0 \
--- build --release --manifest-path examples/stm32g0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32g0 \
--- build --release --manifest-path examples/stm32g4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32g4 \
--- build --release --manifest-path examples/stm32h5/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h5 \
--- build --release --manifest-path examples/stm32h7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7 \
--- build --release --manifest-path examples/stm32l0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32l0 \
--- build --release --manifest-path examples/stm32l1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/stm32l1 \
@ -103,55 +133,39 @@ cargo batch \
--- build --release --manifest-path examples/stm32u5/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/stm32u5 \
--- build --release --manifest-path examples/stm32wb/Cargo.toml --target thumbv7em-none-eabihf --out-dir out/examples/stm32wb \
--- build --release --manifest-path examples/stm32wl/Cargo.toml --target thumbv7em-none-eabihf --out-dir out/examples/stm32wl \
--- build --release --manifest-path examples/boot/application/nrf/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/boot/nrf --bin b \
--- build --release --manifest-path examples/boot/application/stm32f3/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/boot/stm32f3 --bin b \
--- build --release --manifest-path examples/boot/application/stm32f7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/boot/stm32f7 --bin b \
--- build --release --manifest-path examples/boot/application/stm32h7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/boot/stm32h7 --bin b \
--- build --release --manifest-path examples/boot/application/stm32l0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/boot/stm32l0 --bin b \
--- build --release --manifest-path examples/boot/application/stm32l1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/boot/stm32l1 --bin b \
--- build --release --manifest-path examples/boot/application/stm32l4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/boot/stm32l4 --bin b \
--- build --release --manifest-path examples/boot/application/stm32wl/Cargo.toml --target thumbv7em-none-eabihf --out-dir out/examples/boot/stm32wl --bin b \
--- build --release --manifest-path examples/boot/application/nrf/Cargo.toml --target thumbv7em-none-eabi --features embassy-nrf/nrf52840,skip-include --out-dir out/examples/boot/nrf \
--- build --release --manifest-path examples/boot/application/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9160-ns,skip-include --out-dir out/examples/boot/nrf \
--- build --release --manifest-path examples/boot/application/rp/Cargo.toml --target thumbv6m-none-eabi --features skip-include --out-dir out/examples/boot/rp \
--- build --release --manifest-path examples/boot/application/stm32f3/Cargo.toml --target thumbv7em-none-eabi --features skip-include --out-dir out/examples/boot/stm32f3 \
--- build --release --manifest-path examples/boot/application/stm32f7/Cargo.toml --target thumbv7em-none-eabi --features skip-include --out-dir out/examples/boot/stm32f7 \
--- build --release --manifest-path examples/boot/application/stm32h7/Cargo.toml --target thumbv7em-none-eabi --features skip-include --out-dir out/examples/boot/stm32h7 \
--- build --release --manifest-path examples/boot/application/stm32l0/Cargo.toml --target thumbv6m-none-eabi --features skip-include --out-dir out/examples/boot/stm32l0 \
--- build --release --manifest-path examples/boot/application/stm32l1/Cargo.toml --target thumbv7m-none-eabi --features skip-include --out-dir out/examples/boot/stm32l1 \
--- build --release --manifest-path examples/boot/application/stm32l4/Cargo.toml --target thumbv7em-none-eabi --features skip-include --out-dir out/examples/boot/stm32l4 \
--- build --release --manifest-path examples/boot/application/stm32wl/Cargo.toml --target thumbv7em-none-eabihf --features skip-include --out-dir out/examples/boot/stm32wl \
--- build --release --manifest-path examples/boot/bootloader/nrf/Cargo.toml --target thumbv7em-none-eabi --features embassy-nrf/nrf52840 \
--- build --release --manifest-path examples/boot/bootloader/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9160-ns \
--- build --release --manifest-path examples/boot/bootloader/rp/Cargo.toml --target thumbv6m-none-eabi \
--- build --release --manifest-path examples/boot/bootloader/stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32wl55jc-cm4 \
--- build --release --manifest-path examples/wasm/Cargo.toml --target wasm32-unknown-unknown --out-dir out/examples/wasm \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f103c8 --out-dir out/tests/bluepill-stm32f103c8 \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi --out-dir out/tests/nucleo-stm32f429zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --out-dir out/tests/nucleo-stm32g491re \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --out-dir out/tests/nucleo-stm32g071rb \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --out-dir out/tests/nucleo-stm32h755zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55rg --out-dir out/tests/nucleo-stm32wb55rg \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585ai --out-dir out/tests/iot-stm32u585ai \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f103c8 --out-dir out/tests/stm32f103c8 \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi --out-dir out/tests/stm32f429zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --out-dir out/tests/stm32g491re \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --out-dir out/tests/stm32g071rb \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c031c6 --out-dir out/tests/stm32c031c6 \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --out-dir out/tests/stm32h755zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55rg --out-dir out/tests/stm32wb55rg \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h563zi --out-dir out/tests/stm32h563zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585ai --out-dir out/tests/stm32u585ai \
--- build --release --manifest-path tests/rp/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/rpi-pico \
--- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv7em-none-eabi --out-dir out/tests/nrf52840-dk \
--- build --release --manifest-path tests/riscv32/Cargo.toml --target riscv32imac-unknown-none-elf \
$BUILD_EXTRA
function run_elf {
echo Running target=$1 elf=$2
STATUSCODE=$(
curl \
-sS \
--output /dev/stderr \
--write-out "%{http_code}" \
-H "Authorization: Bearer $TELEPROBE_TOKEN" \
https://teleprobe.embassy.dev/targets/$1/run --data-binary @$2
)
echo
echo HTTP Status code: $STATUSCODE
test "$STATUSCODE" -eq 200
}
if [[ -z "${TELEPROBE_TOKEN-}" ]]; then
if [[ -z "${ACTIONS_ID_TOKEN_REQUEST_TOKEN-}" ]]; then
echo No teleprobe token found, skipping running HIL tests
exit
fi
export TELEPROBE_TOKEN=$(curl -sS -H "Authorization: Bearer $ACTIONS_ID_TOKEN_REQUEST_TOKEN" "$ACTIONS_ID_TOKEN_REQUEST_URL" | jq -r '.value')
echo No teleprobe token found, skipping running HIL tests
exit
fi
for board in $(ls out/tests); do
echo Running tests for board: $board
for elf in $(ls out/tests/$board); do
run_elf $board out/tests/$board/$elf
done
done
teleprobe client run -r out/tests

View File

@ -2,19 +2,23 @@
set -euo pipefail
export CARGO_TARGET_DIR=$PWD/target_ci_stable
export RUSTFLAGS=-Dwarnings
export DEFMT_LOG=trace
sed -i 's/channel.*/channel = "stable"/g' rust-toolchain.toml
cargo batch \
--- build --release --manifest-path embassy-boot/nrf/Cargo.toml --target thumbv7em-none-eabi --features embassy-nrf/nrf52840 \
--- build --release --manifest-path embassy-boot/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9160-ns \
--- build --release --manifest-path embassy-boot/rp/Cargo.toml --target thumbv6m-none-eabi \
--- build --release --manifest-path embassy-boot/stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32wl55jc-cm4 \
--- build --release --manifest-path embassy-executor/Cargo.toml --target thumbv7em-none-eabi \
--- build --release --manifest-path embassy-executor/Cargo.toml --target thumbv7em-none-eabi --features log \
--- build --release --manifest-path embassy-executor/Cargo.toml --target thumbv7em-none-eabi --features defmt \
--- build --release --manifest-path embassy-executor/Cargo.toml --target thumbv6m-none-eabi --features defmt \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,pool-16 \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,pool-16,unstable-traits \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv4,medium-ethernet \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,dhcpv4,medium-ethernet,unstable-traits \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ethernet \
--- build --release --manifest-path embassy-net/Cargo.toml --target thumbv7em-none-eabi --features defmt,tcp,udp,dns,proto-ipv6,medium-ethernet,unstable-traits \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nrf52805,gpiote,time-driver-rtc1 \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nrf52810,gpiote,time-driver-rtc1 \
--- build --release --manifest-path embassy-nrf/Cargo.toml --target thumbv7em-none-eabi --features nrf52811,gpiote,time-driver-rtc1 \
@ -36,7 +40,7 @@ cargo batch \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32u585zi,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb55vy,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wl55uc-cm4,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wl55cc-cm4,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l4r9zi,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f303vc,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f411ce,defmt,time-driver-any \
@ -65,5 +69,5 @@ cargo batch \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f217zg,defmt,exti,time-driver-any \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f217zg,defmt,exti,time-driver-any,unstable-traits \
--- build --release --manifest-path examples/nrf/Cargo.toml --target thumbv7em-none-eabi --no-default-features --out-dir out/examples/nrf --bin raw_spawn \
--- build --release --manifest-path examples/nrf52840/Cargo.toml --target thumbv7em-none-eabi --no-default-features --out-dir out/examples/nrf52840 --bin raw_spawn \
--- build --release --manifest-path examples/stm32l0/Cargo.toml --target thumbv6m-none-eabi --no-default-features --out-dir out/examples/stm32l0 --bin raw_spawn \

BIN
cyw43-firmware/43439A0.bin Executable file

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Permissive Binary License
Version 1.0, July 2019
Redistribution. Redistribution and use in binary form, without
modification, are permitted provided that the following conditions are
met:
1) Redistributions must reproduce the above copyright notice and the
following disclaimer in the documentation and/or other materials
provided with the distribution.
2) Unless to the extent explicitly permitted by law, no reverse
engineering, decompilation, or disassembly of this software is
permitted.
3) Redistribution as part of a software development kit must include the
accompanying file named <20>DEPENDENCIES<45> and any dependencies listed in
that file.
4) Neither the name of the copyright holder nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
Limited patent license. The copyright holders (and contributors) grant a
worldwide, non-exclusive, no-charge, royalty-free patent license to
make, have made, use, offer to sell, sell, import, and otherwise
transfer this software, where such license applies only to those patent
claims licensable by the copyright holders (and contributors) that are
necessarily infringed by this software. This patent license shall not
apply to any combinations that include this software. No hardware is
licensed hereunder.
If you institute patent litigation against any entity (including a
cross-claim or counterclaim in a lawsuit) alleging that the software
itself infringes your patent(s), then your rights granted under this
license shall terminate as of the date such litigation is filed.
DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT
NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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# WiFi firmware
Firmware obtained from https://github.com/Infineon/wifi-host-driver/tree/master/WiFi_Host_Driver/resources/firmware/COMPONENT_43439
Licensed under the [Infineon Permissive Binary License](./LICENSE-permissive-binary-license-1.0.txt)

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[package]
name = "cyw43-pio"
version = "0.1.0"
edition = "2021"
[features]
# If disabled, SPI runs at 31.25MHz
# If enabled, SPI runs at 62.5MHz, which is 25% higher than 50Mhz which is the maximum according to the CYW43439 datasheet.
overclock = []
[dependencies]
cyw43 = { version = "0.1.0", path = "../cyw43" }
embassy-rp = { version = "0.1.0", path = "../embassy-rp" }
pio-proc = "0.2"
pio = "0.2.1"
fixed = "1.23.1"
defmt = { version = "0.3", optional = true }
[package.metadata.embassy_docs]
src_base = "https://github.com/embassy-rs/embassy/blob/cyw43-pio-v$VERSION/cyw43-pio/src/"
src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/cyw43-pio/src/"
target = "thumbv6m-none-eabi"

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#![no_std]
#![allow(incomplete_features)]
#![feature(async_fn_in_trait)]
use core::slice;
use cyw43::SpiBusCyw43;
use embassy_rp::dma::Channel;
use embassy_rp::gpio::{Drive, Level, Output, Pin, Pull, SlewRate};
use embassy_rp::pio::{Common, Config, Direction, Instance, Irq, PioPin, ShiftDirection, StateMachine};
use embassy_rp::relocate::RelocatedProgram;
use embassy_rp::{pio_instr_util, Peripheral, PeripheralRef};
use fixed::FixedU32;
use pio_proc::pio_asm;
pub struct PioSpi<'d, CS: Pin, PIO: Instance, const SM: usize, DMA> {
cs: Output<'d, CS>,
sm: StateMachine<'d, PIO, SM>,
irq: Irq<'d, PIO, 0>,
dma: PeripheralRef<'d, DMA>,
wrap_target: u8,
}
impl<'d, CS, PIO, const SM: usize, DMA> PioSpi<'d, CS, PIO, SM, DMA>
where
DMA: Channel,
CS: Pin,
PIO: Instance,
{
pub fn new<DIO, CLK>(
common: &mut Common<'d, PIO>,
mut sm: StateMachine<'d, PIO, SM>,
irq: Irq<'d, PIO, 0>,
cs: Output<'d, CS>,
dio: DIO,
clk: CLK,
dma: impl Peripheral<P = DMA> + 'd,
) -> Self
where
DIO: PioPin,
CLK: PioPin,
{
#[cfg(feature = "overclock")]
let program = pio_asm!(
".side_set 1"
".wrap_target"
// write out x-1 bits
"lp:"
"out pins, 1 side 0"
"jmp x-- lp side 1"
// switch directions
"set pindirs, 0 side 0"
"nop side 1" // necessary for clkdiv=1.
"nop side 0"
// read in y-1 bits
"lp2:"
"in pins, 1 side 1"
"jmp y-- lp2 side 0"
// wait for event and irq host
"wait 1 pin 0 side 0"
"irq 0 side 0"
".wrap"
);
#[cfg(not(feature = "overclock"))]
let program = pio_asm!(
".side_set 1"
".wrap_target"
// write out x-1 bits
"lp:"
"out pins, 1 side 0"
"jmp x-- lp side 1"
// switch directions
"set pindirs, 0 side 0"
"nop side 0"
// read in y-1 bits
"lp2:"
"in pins, 1 side 1"
"jmp y-- lp2 side 0"
// wait for event and irq host
"wait 1 pin 0 side 0"
"irq 0 side 0"
".wrap"
);
let relocated = RelocatedProgram::new(&program.program);
let mut pin_io: embassy_rp::pio::Pin<PIO> = common.make_pio_pin(dio);
pin_io.set_pull(Pull::None);
pin_io.set_schmitt(true);
pin_io.set_input_sync_bypass(true);
pin_io.set_drive_strength(Drive::_12mA);
pin_io.set_slew_rate(SlewRate::Fast);
let mut pin_clk = common.make_pio_pin(clk);
pin_clk.set_drive_strength(Drive::_12mA);
pin_clk.set_slew_rate(SlewRate::Fast);
let mut cfg = Config::default();
cfg.use_program(&common.load_program(&relocated), &[&pin_clk]);
cfg.set_out_pins(&[&pin_io]);
cfg.set_in_pins(&[&pin_io]);
cfg.set_set_pins(&[&pin_io]);
cfg.shift_out.direction = ShiftDirection::Left;
cfg.shift_out.auto_fill = true;
//cfg.shift_out.threshold = 32;
cfg.shift_in.direction = ShiftDirection::Left;
cfg.shift_in.auto_fill = true;
//cfg.shift_in.threshold = 32;
#[cfg(feature = "overclock")]
{
// 125mhz Pio => 62.5Mhz SPI Freq. 25% higher than theoretical maximum according to
// data sheet, but seems to work fine.
cfg.clock_divider = FixedU32::from_bits(0x0100);
}
#[cfg(not(feature = "overclock"))]
{
// same speed as pico-sdk, 62.5Mhz
// This is actually the fastest we can go without overclocking.
// According to data sheet, the theoretical maximum is 100Mhz Pio => 50Mhz SPI Freq.
// However, the PIO uses a fractional divider, which works by introducing jitter when
// the divider is not an integer. It does some clocks at 125mhz and others at 62.5mhz
// so that it averages out to the desired frequency of 100mhz. The 125mhz clock cycles
// violate the maximum from the data sheet.
cfg.clock_divider = FixedU32::from_bits(0x0200);
}
sm.set_config(&cfg);
sm.set_pin_dirs(Direction::Out, &[&pin_clk, &pin_io]);
sm.set_pins(Level::Low, &[&pin_clk, &pin_io]);
Self {
cs,
sm,
irq,
dma: dma.into_ref(),
wrap_target: relocated.wrap().target,
}
}
pub async fn write(&mut self, write: &[u32]) -> u32 {
self.sm.set_enable(false);
let write_bits = write.len() * 32 - 1;
let read_bits = 31;
#[cfg(feature = "defmt")]
defmt::trace!("write={} read={}", write_bits, read_bits);
unsafe {
pio_instr_util::set_x(&mut self.sm, write_bits as u32);
pio_instr_util::set_y(&mut self.sm, read_bits as u32);
pio_instr_util::set_pindir(&mut self.sm, 0b1);
pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
}
self.sm.set_enable(true);
self.sm.tx().dma_push(self.dma.reborrow(), write).await;
let mut status = 0;
self.sm
.rx()
.dma_pull(self.dma.reborrow(), slice::from_mut(&mut status))
.await;
status
}
pub async fn cmd_read(&mut self, cmd: u32, read: &mut [u32]) -> u32 {
self.sm.set_enable(false);
let write_bits = 31;
let read_bits = read.len() * 32 + 32 - 1;
#[cfg(feature = "defmt")]
defmt::trace!("write={} read={}", write_bits, read_bits);
unsafe {
pio_instr_util::set_y(&mut self.sm, read_bits as u32);
pio_instr_util::set_x(&mut self.sm, write_bits as u32);
pio_instr_util::set_pindir(&mut self.sm, 0b1);
pio_instr_util::exec_jmp(&mut self.sm, self.wrap_target);
}
// self.cs.set_low();
self.sm.set_enable(true);
self.sm.tx().dma_push(self.dma.reborrow(), slice::from_ref(&cmd)).await;
self.sm.rx().dma_pull(self.dma.reborrow(), read).await;
let mut status = 0;
self.sm
.rx()
.dma_pull(self.dma.reborrow(), slice::from_mut(&mut status))
.await;
status
}
}
impl<'d, CS, PIO, const SM: usize, DMA> SpiBusCyw43 for PioSpi<'d, CS, PIO, SM, DMA>
where
CS: Pin,
PIO: Instance,
DMA: Channel,
{
async fn cmd_write(&mut self, write: &[u32]) -> u32 {
self.cs.set_low();
let status = self.write(write).await;
self.cs.set_high();
status
}
async fn cmd_read(&mut self, write: u32, read: &mut [u32]) -> u32 {
self.cs.set_low();
let status = self.cmd_read(write, read).await;
self.cs.set_high();
status
}
async fn wait_for_event(&mut self) {
self.irq.wait().await;
}
}

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[package]
name = "cyw43"
version = "0.1.0"
edition = "2021"
[features]
defmt = ["dep:defmt"]
log = ["dep:log"]
# Fetch console logs from the WiFi firmware and forward them to `log` or `defmt`.
firmware-logs = []
[dependencies]
embassy-time = { version = "0.1.0", path = "../embassy-time"}
embassy-sync = { version = "0.2.0", path = "../embassy-sync"}
embassy-futures = { version = "0.1.0", path = "../embassy-futures"}
embassy-net-driver-channel = { version = "0.1.0", path = "../embassy-net-driver-channel"}
atomic-polyfill = "0.1.5"
defmt = { version = "0.3", optional = true }
log = { version = "0.4.17", optional = true }
cortex-m = "0.7.6"
cortex-m-rt = "0.7.0"
futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] }
embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.10" }
num_enum = { version = "0.5.7", default-features = false }
[package.metadata.embassy_docs]
src_base = "https://github.com/embassy-rs/embassy/blob/cyw43-v$VERSION/cyw43/src/"
src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/cyw43/src/"
target = "thumbv6m-none-eabi"
features = ["defmt", "firmware-logs"]

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# cyw43
Rust driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implementation based on [Infineon/wifi-host-driver](https://github.com/Infineon/wifi-host-driver).
## Current status
Working:
- Station mode (joining an AP).
- AP mode (creating an AP)
- Scanning
- Sending and receiving Ethernet frames.
- Using the default MAC address.
- [`embassy-net`](https://embassy.dev) integration.
- RP2040 PIO driver for the nonstandard half-duplex SPI used in the Pico W.
- Using IRQ for device events
- GPIO support (for LED on the Pico W)
TODO:
- Setting a custom MAC address.
- Bus sleep (for power consumption optimization)
## Running the examples
- `cargo install probe-rs --features cli`
- `cd examples/rp`
### Example 1: Scan the wifi stations
- `cargo run --release --bin wifi_scan`
### Example 2: Create an access point (IP and credentials in the code)
- `cargo run --release --bin wifi_ap_tcp_server`
### Example 3: Connect to an existing network and create a server
- `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release --bin wifi_tcp_server`
After a few seconds, you should see that DHCP picks up an IP address like this
```
11.944489 DEBUG Acquired IP configuration:
11.944517 DEBUG IP address: 192.168.0.250/24
11.944620 DEBUG Default gateway: 192.168.0.33
11.944722 DEBUG DNS server 0: 192.168.0.33
```
This example implements a TCP echo server on port 1234. You can try connecting to it with:
```
nc 192.168.0.250 1234
```
Send it some data, you should see it echoed back and printed in the firmware's logs.
## License
This work is licensed under either of
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
<http://www.apache.org/licenses/LICENSE-2.0>)
- MIT license ([LICENSE-MIT](LICENSE-MIT) or <http://opensource.org/licenses/MIT>)
at your option.

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use embassy_futures::yield_now;
use embassy_time::{Duration, Timer};
use embedded_hal_1::digital::OutputPin;
use futures::FutureExt;
use crate::consts::*;
use crate::slice8_mut;
/// Custom Spi Trait that _only_ supports the bus operation of the cyw43
/// Implementors are expected to hold the CS pin low during an operation.
pub trait SpiBusCyw43 {
/// Issues a write command on the bus
/// First 32 bits of `word` are expected to be a cmd word
async fn cmd_write(&mut self, write: &[u32]) -> u32;
/// Issues a read command on the bus
/// `write` is expected to be a 32 bit cmd word
/// `read` will contain the response of the device
/// Backplane reads have a response delay that produces one extra unspecified word at the beginning of `read`.
/// Callers that want to read `n` word from the backplane, have to provide a slice that is `n+1` words long.
async fn cmd_read(&mut self, write: u32, read: &mut [u32]) -> u32;
/// Wait for events from the Device. A typical implementation would wait for the IRQ pin to be high.
/// The default implementation always reports ready, resulting in active polling of the device.
async fn wait_for_event(&mut self) {
yield_now().await;
}
}
pub(crate) struct Bus<PWR, SPI> {
backplane_window: u32,
pwr: PWR,
spi: SPI,
status: u32,
}
impl<PWR, SPI> Bus<PWR, SPI>
where
PWR: OutputPin,
SPI: SpiBusCyw43,
{
pub(crate) fn new(pwr: PWR, spi: SPI) -> Self {
Self {
backplane_window: 0xAAAA_AAAA,
pwr,
spi,
status: 0,
}
}
pub async fn init(&mut self) {
// Reset
self.pwr.set_low().unwrap();
Timer::after(Duration::from_millis(20)).await;
self.pwr.set_high().unwrap();
Timer::after(Duration::from_millis(250)).await;
while self
.read32_swapped(REG_BUS_TEST_RO)
.inspect(|v| trace!("{:#x}", v))
.await
!= FEEDBEAD
{}
self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await;
let val = self.read32_swapped(REG_BUS_TEST_RW).await;
trace!("{:#x}", val);
assert_eq!(val, TEST_PATTERN);
let val = self.read32_swapped(REG_BUS_CTRL).await;
trace!("{:#010b}", (val & 0xff));
// 32-bit word length, little endian (which is the default endianess).
self.write32_swapped(
REG_BUS_CTRL,
WORD_LENGTH_32 | HIGH_SPEED | INTERRUPT_HIGH | WAKE_UP | STATUS_ENABLE | INTERRUPT_WITH_STATUS,
)
.await;
let val = self.read8(FUNC_BUS, REG_BUS_CTRL).await;
trace!("{:#b}", val);
let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await;
trace!("{:#x}", val);
assert_eq!(val, FEEDBEAD);
let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await;
trace!("{:#x}", val);
assert_eq!(val, TEST_PATTERN);
}
pub async fn wlan_read(&mut self, buf: &mut [u32], len_in_u8: u32) {
let cmd = cmd_word(READ, INC_ADDR, FUNC_WLAN, 0, len_in_u8);
let len_in_u32 = (len_in_u8 as usize + 3) / 4;
self.status = self.spi.cmd_read(cmd, &mut buf[..len_in_u32]).await;
}
pub async fn wlan_write(&mut self, buf: &[u32]) {
let cmd = cmd_word(WRITE, INC_ADDR, FUNC_WLAN, 0, buf.len() as u32 * 4);
//TODO try to remove copy?
let mut cmd_buf = [0_u32; 513];
cmd_buf[0] = cmd;
cmd_buf[1..][..buf.len()].copy_from_slice(buf);
self.status = self.spi.cmd_write(&cmd_buf).await;
}
#[allow(unused)]
pub async fn bp_read(&mut self, mut addr: u32, mut data: &mut [u8]) {
// It seems the HW force-aligns the addr
// to 2 if data.len() >= 2
// to 4 if data.len() >= 4
// To simplify, enforce 4-align for now.
assert!(addr % 4 == 0);
// Backplane read buffer has one extra word for the response delay.
let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4 + 1];
while !data.is_empty() {
// Ensure transfer doesn't cross a window boundary.
let window_offs = addr & BACKPLANE_ADDRESS_MASK;
let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize;
let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining);
self.backplane_set_window(addr).await;
let cmd = cmd_word(READ, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32);
// round `buf` to word boundary, add one extra word for the response delay
self.status = self.spi.cmd_read(cmd, &mut buf[..(len + 3) / 4 + 1]).await;
// when writing out the data, we skip the response-delay byte
data[..len].copy_from_slice(&slice8_mut(&mut buf[1..])[..len]);
// Advance ptr.
addr += len as u32;
data = &mut data[len..];
}
}
pub async fn bp_write(&mut self, mut addr: u32, mut data: &[u8]) {
// It seems the HW force-aligns the addr
// to 2 if data.len() >= 2
// to 4 if data.len() >= 4
// To simplify, enforce 4-align for now.
assert!(addr % 4 == 0);
let mut buf = [0u32; BACKPLANE_MAX_TRANSFER_SIZE / 4 + 1];
while !data.is_empty() {
// Ensure transfer doesn't cross a window boundary.
let window_offs = addr & BACKPLANE_ADDRESS_MASK;
let window_remaining = BACKPLANE_WINDOW_SIZE - window_offs as usize;
let len = data.len().min(BACKPLANE_MAX_TRANSFER_SIZE).min(window_remaining);
slice8_mut(&mut buf[1..])[..len].copy_from_slice(&data[..len]);
self.backplane_set_window(addr).await;
let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BACKPLANE, window_offs, len as u32);
buf[0] = cmd;
self.status = self.spi.cmd_write(&buf[..(len + 3) / 4 + 1]).await;
// Advance ptr.
addr += len as u32;
data = &data[len..];
}
}
pub async fn bp_read8(&mut self, addr: u32) -> u8 {
self.backplane_readn(addr, 1).await as u8
}
pub async fn bp_write8(&mut self, addr: u32, val: u8) {
self.backplane_writen(addr, val as u32, 1).await
}
pub async fn bp_read16(&mut self, addr: u32) -> u16 {
self.backplane_readn(addr, 2).await as u16
}
#[allow(unused)]
pub async fn bp_write16(&mut self, addr: u32, val: u16) {
self.backplane_writen(addr, val as u32, 2).await
}
#[allow(unused)]
pub async fn bp_read32(&mut self, addr: u32) -> u32 {
self.backplane_readn(addr, 4).await
}
pub async fn bp_write32(&mut self, addr: u32, val: u32) {
self.backplane_writen(addr, val, 4).await
}
async fn backplane_readn(&mut self, addr: u32, len: u32) -> u32 {
self.backplane_set_window(addr).await;
let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK;
if len == 4 {
bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG
}
self.readn(FUNC_BACKPLANE, bus_addr, len).await
}
async fn backplane_writen(&mut self, addr: u32, val: u32, len: u32) {
self.backplane_set_window(addr).await;
let mut bus_addr = addr & BACKPLANE_ADDRESS_MASK;
if len == 4 {
bus_addr |= BACKPLANE_ADDRESS_32BIT_FLAG
}
self.writen(FUNC_BACKPLANE, bus_addr, val, len).await
}
async fn backplane_set_window(&mut self, addr: u32) {
let new_window = addr & !BACKPLANE_ADDRESS_MASK;
if (new_window >> 24) as u8 != (self.backplane_window >> 24) as u8 {
self.write8(
FUNC_BACKPLANE,
REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH,
(new_window >> 24) as u8,
)
.await;
}
if (new_window >> 16) as u8 != (self.backplane_window >> 16) as u8 {
self.write8(
FUNC_BACKPLANE,
REG_BACKPLANE_BACKPLANE_ADDRESS_MID,
(new_window >> 16) as u8,
)
.await;
}
if (new_window >> 8) as u8 != (self.backplane_window >> 8) as u8 {
self.write8(
FUNC_BACKPLANE,
REG_BACKPLANE_BACKPLANE_ADDRESS_LOW,
(new_window >> 8) as u8,
)
.await;
}
self.backplane_window = new_window;
}
pub async fn read8(&mut self, func: u32, addr: u32) -> u8 {
self.readn(func, addr, 1).await as u8
}
pub async fn write8(&mut self, func: u32, addr: u32, val: u8) {
self.writen(func, addr, val as u32, 1).await
}
pub async fn read16(&mut self, func: u32, addr: u32) -> u16 {
self.readn(func, addr, 2).await as u16
}
#[allow(unused)]
pub async fn write16(&mut self, func: u32, addr: u32, val: u16) {
self.writen(func, addr, val as u32, 2).await
}
pub async fn read32(&mut self, func: u32, addr: u32) -> u32 {
self.readn(func, addr, 4).await
}
#[allow(unused)]
pub async fn write32(&mut self, func: u32, addr: u32, val: u32) {
self.writen(func, addr, val, 4).await
}
async fn readn(&mut self, func: u32, addr: u32, len: u32) -> u32 {
let cmd = cmd_word(READ, INC_ADDR, func, addr, len);
let mut buf = [0; 2];
// if we are reading from the backplane, we need an extra word for the response delay
let len = if func == FUNC_BACKPLANE { 2 } else { 1 };
self.status = self.spi.cmd_read(cmd, &mut buf[..len]).await;
// if we read from the backplane, the result is in the second word, after the response delay
if func == FUNC_BACKPLANE {
buf[1]
} else {
buf[0]
}
}
async fn writen(&mut self, func: u32, addr: u32, val: u32, len: u32) {
let cmd = cmd_word(WRITE, INC_ADDR, func, addr, len);
self.status = self.spi.cmd_write(&[cmd, val]).await;
}
async fn read32_swapped(&mut self, addr: u32) -> u32 {
let cmd = cmd_word(READ, INC_ADDR, FUNC_BUS, addr, 4);
let cmd = swap16(cmd);
let mut buf = [0; 1];
self.status = self.spi.cmd_read(cmd, &mut buf).await;
swap16(buf[0])
}
async fn write32_swapped(&mut self, addr: u32, val: u32) {
let cmd = cmd_word(WRITE, INC_ADDR, FUNC_BUS, addr, 4);
let buf = [swap16(cmd), swap16(val)];
self.status = self.spi.cmd_write(&buf).await;
}
pub async fn wait_for_event(&mut self) {
self.spi.wait_for_event().await;
}
pub fn status(&self) -> u32 {
self.status
}
}
fn swap16(x: u32) -> u32 {
x.rotate_left(16)
}
fn cmd_word(write: bool, incr: bool, func: u32, addr: u32, len: u32) -> u32 {
(write as u32) << 31 | (incr as u32) << 30 | (func & 0b11) << 28 | (addr & 0x1FFFF) << 11 | (len & 0x7FF)
}

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#![allow(unused)]
pub(crate) const FUNC_BUS: u32 = 0;
pub(crate) const FUNC_BACKPLANE: u32 = 1;
pub(crate) const FUNC_WLAN: u32 = 2;
pub(crate) const FUNC_BT: u32 = 3;
pub(crate) const REG_BUS_CTRL: u32 = 0x0;
pub(crate) const REG_BUS_INTERRUPT: u32 = 0x04; // 16 bits - Interrupt status
pub(crate) const REG_BUS_INTERRUPT_ENABLE: u32 = 0x06; // 16 bits - Interrupt mask
pub(crate) const REG_BUS_STATUS: u32 = 0x8;
pub(crate) const REG_BUS_TEST_RO: u32 = 0x14;
pub(crate) const REG_BUS_TEST_RW: u32 = 0x18;
pub(crate) const REG_BUS_RESP_DELAY: u32 = 0x1c;
pub(crate) const WORD_LENGTH_32: u32 = 0x1;
pub(crate) const HIGH_SPEED: u32 = 0x10;
pub(crate) const INTERRUPT_HIGH: u32 = 1 << 5;
pub(crate) const WAKE_UP: u32 = 1 << 7;
pub(crate) const STATUS_ENABLE: u32 = 1 << 16;
pub(crate) const INTERRUPT_WITH_STATUS: u32 = 1 << 17;
// SPI_STATUS_REGISTER bits
pub(crate) const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001;
pub(crate) const STATUS_UNDERFLOW: u32 = 0x00000002;
pub(crate) const STATUS_OVERFLOW: u32 = 0x00000004;
pub(crate) const STATUS_F2_INTR: u32 = 0x00000008;
pub(crate) const STATUS_F3_INTR: u32 = 0x00000010;
pub(crate) const STATUS_F2_RX_READY: u32 = 0x00000020;
pub(crate) const STATUS_F3_RX_READY: u32 = 0x00000040;
pub(crate) const STATUS_HOST_CMD_DATA_ERR: u32 = 0x00000080;
pub(crate) const STATUS_F2_PKT_AVAILABLE: u32 = 0x00000100;
pub(crate) const STATUS_F2_PKT_LEN_MASK: u32 = 0x000FFE00;
pub(crate) const STATUS_F2_PKT_LEN_SHIFT: u32 = 9;
pub(crate) const STATUS_F3_PKT_AVAILABLE: u32 = 0x00100000;
pub(crate) const STATUS_F3_PKT_LEN_MASK: u32 = 0xFFE00000;
pub(crate) const STATUS_F3_PKT_LEN_SHIFT: u32 = 21;
pub(crate) const REG_BACKPLANE_GPIO_SELECT: u32 = 0x10005;
pub(crate) const REG_BACKPLANE_GPIO_OUTPUT: u32 = 0x10006;
pub(crate) const REG_BACKPLANE_GPIO_ENABLE: u32 = 0x10007;
pub(crate) const REG_BACKPLANE_FUNCTION2_WATERMARK: u32 = 0x10008;
pub(crate) const REG_BACKPLANE_DEVICE_CONTROL: u32 = 0x10009;
pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_LOW: u32 = 0x1000A;
pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_MID: u32 = 0x1000B;
pub(crate) const REG_BACKPLANE_BACKPLANE_ADDRESS_HIGH: u32 = 0x1000C;
pub(crate) const REG_BACKPLANE_FRAME_CONTROL: u32 = 0x1000D;
pub(crate) const REG_BACKPLANE_CHIP_CLOCK_CSR: u32 = 0x1000E;
pub(crate) const REG_BACKPLANE_PULL_UP: u32 = 0x1000F;
pub(crate) const REG_BACKPLANE_READ_FRAME_BC_LOW: u32 = 0x1001B;
pub(crate) const REG_BACKPLANE_READ_FRAME_BC_HIGH: u32 = 0x1001C;
pub(crate) const REG_BACKPLANE_WAKEUP_CTRL: u32 = 0x1001E;
pub(crate) const REG_BACKPLANE_SLEEP_CSR: u32 = 0x1001F;
pub(crate) const BACKPLANE_WINDOW_SIZE: usize = 0x8000;
pub(crate) const BACKPLANE_ADDRESS_MASK: u32 = 0x7FFF;
pub(crate) const BACKPLANE_ADDRESS_32BIT_FLAG: u32 = 0x08000;
pub(crate) const BACKPLANE_MAX_TRANSFER_SIZE: usize = 64;
// Active Low Power (ALP) clock constants
pub(crate) const BACKPLANE_ALP_AVAIL_REQ: u8 = 0x08;
pub(crate) const BACKPLANE_ALP_AVAIL: u8 = 0x40;
// Broadcom AMBA (Advanced Microcontroller Bus Architecture) Interconnect
// (AI) pub (crate) constants
pub(crate) const AI_IOCTRL_OFFSET: u32 = 0x408;
pub(crate) const AI_IOCTRL_BIT_FGC: u8 = 0x0002;
pub(crate) const AI_IOCTRL_BIT_CLOCK_EN: u8 = 0x0001;
pub(crate) const AI_IOCTRL_BIT_CPUHALT: u8 = 0x0020;
pub(crate) const AI_RESETCTRL_OFFSET: u32 = 0x800;
pub(crate) const AI_RESETCTRL_BIT_RESET: u8 = 1;
pub(crate) const AI_RESETSTATUS_OFFSET: u32 = 0x804;
pub(crate) const TEST_PATTERN: u32 = 0x12345678;
pub(crate) const FEEDBEAD: u32 = 0xFEEDBEAD;
// SPI_INTERRUPT_REGISTER and SPI_INTERRUPT_ENABLE_REGISTER Bits
pub(crate) const IRQ_DATA_UNAVAILABLE: u16 = 0x0001; // Requested data not available; Clear by writing a "1"
pub(crate) const IRQ_F2_F3_FIFO_RD_UNDERFLOW: u16 = 0x0002;
pub(crate) const IRQ_F2_F3_FIFO_WR_OVERFLOW: u16 = 0x0004;
pub(crate) const IRQ_COMMAND_ERROR: u16 = 0x0008; // Cleared by writing 1
pub(crate) const IRQ_DATA_ERROR: u16 = 0x0010; // Cleared by writing 1
pub(crate) const IRQ_F2_PACKET_AVAILABLE: u16 = 0x0020;
pub(crate) const IRQ_F3_PACKET_AVAILABLE: u16 = 0x0040;
pub(crate) const IRQ_F1_OVERFLOW: u16 = 0x0080; // Due to last write. Bkplane has pending write requests
pub(crate) const IRQ_MISC_INTR0: u16 = 0x0100;
pub(crate) const IRQ_MISC_INTR1: u16 = 0x0200;
pub(crate) const IRQ_MISC_INTR2: u16 = 0x0400;
pub(crate) const IRQ_MISC_INTR3: u16 = 0x0800;
pub(crate) const IRQ_MISC_INTR4: u16 = 0x1000;
pub(crate) const IRQ_F1_INTR: u16 = 0x2000;
pub(crate) const IRQ_F2_INTR: u16 = 0x4000;
pub(crate) const IRQ_F3_INTR: u16 = 0x8000;
pub(crate) const IOCTL_CMD_UP: u32 = 2;
pub(crate) const IOCTL_CMD_DOWN: u32 = 3;
pub(crate) const IOCTL_CMD_SET_SSID: u32 = 26;
pub(crate) const IOCTL_CMD_SET_CHANNEL: u32 = 30;
pub(crate) const IOCTL_CMD_ANTDIV: u32 = 64;
pub(crate) const IOCTL_CMD_SET_AP: u32 = 118;
pub(crate) const IOCTL_CMD_SET_VAR: u32 = 263;
pub(crate) const IOCTL_CMD_GET_VAR: u32 = 262;
pub(crate) const IOCTL_CMD_SET_PASSPHRASE: u32 = 268;
pub(crate) const CHANNEL_TYPE_CONTROL: u8 = 0;
pub(crate) const CHANNEL_TYPE_EVENT: u8 = 1;
pub(crate) const CHANNEL_TYPE_DATA: u8 = 2;
// CYW_SPID command structure constants.
pub(crate) const WRITE: bool = true;
pub(crate) const READ: bool = false;
pub(crate) const INC_ADDR: bool = true;
pub(crate) const FIXED_ADDR: bool = false;
pub(crate) const AES_ENABLED: u32 = 0x0004;
pub(crate) const WPA2_SECURITY: u32 = 0x00400000;
pub(crate) const MIN_PSK_LEN: usize = 8;
pub(crate) const MAX_PSK_LEN: usize = 64;
// Security type (authentication and encryption types are combined using bit mask)
#[allow(non_camel_case_types)]
#[derive(Copy, Clone, PartialEq)]
#[repr(u32)]
pub(crate) enum Security {
OPEN = 0,
WPA2_AES_PSK = WPA2_SECURITY | AES_ENABLED,
}
#[allow(non_camel_case_types)]
#[derive(Copy, Clone)]
#[repr(u8)]
pub enum EStatus {
/// operation was successful
SUCCESS = 0,
/// operation failed
FAIL = 1,
/// operation timed out
TIMEOUT = 2,
/// failed due to no matching network found
NO_NETWORKS = 3,
/// operation was aborted
ABORT = 4,
/// protocol failure: packet not ack'd
NO_ACK = 5,
/// AUTH or ASSOC packet was unsolicited
UNSOLICITED = 6,
/// attempt to assoc to an auto auth configuration
ATTEMPT = 7,
/// scan results are incomplete
PARTIAL = 8,
/// scan aborted by another scan
NEWSCAN = 9,
/// scan aborted due to assoc in progress
NEWASSOC = 10,
/// 802.11h quiet period started
_11HQUIET = 11,
/// user disabled scanning (WLC_SET_SCANSUPPRESS)
SUPPRESS = 12,
/// no allowable channels to scan
NOCHANS = 13,
/// scan aborted due to CCX fast roam
CCXFASTRM = 14,
/// abort channel select
CS_ABORT = 15,
}
impl PartialEq<EStatus> for u32 {
fn eq(&self, other: &EStatus) -> bool {
*self == *other as Self
}
}
#[allow(dead_code)]
pub(crate) struct FormatStatus(pub u32);
#[cfg(feature = "defmt")]
impl defmt::Format for FormatStatus {
fn format(&self, fmt: defmt::Formatter) {
macro_rules! implm {
($($name:ident),*) => {
$(
if self.0 & $name > 0 {
defmt::write!(fmt, " | {}", &stringify!($name)[7..]);
}
)*
};
}
implm!(
STATUS_DATA_NOT_AVAILABLE,
STATUS_UNDERFLOW,
STATUS_OVERFLOW,
STATUS_F2_INTR,
STATUS_F3_INTR,
STATUS_F2_RX_READY,
STATUS_F3_RX_READY,
STATUS_HOST_CMD_DATA_ERR,
STATUS_F2_PKT_AVAILABLE,
STATUS_F3_PKT_AVAILABLE
);
}
}
#[cfg(feature = "log")]
impl core::fmt::Debug for FormatStatus {
fn fmt(&self, fmt: &mut core::fmt::Formatter) -> core::fmt::Result {
macro_rules! implm {
($($name:ident),*) => {
$(
if self.0 & $name > 0 {
core::write!(fmt, " | {}", &stringify!($name)[7..])?;
}
)*
};
}
implm!(
STATUS_DATA_NOT_AVAILABLE,
STATUS_UNDERFLOW,
STATUS_OVERFLOW,
STATUS_F2_INTR,
STATUS_F3_INTR,
STATUS_F2_RX_READY,
STATUS_F3_RX_READY,
STATUS_HOST_CMD_DATA_ERR,
STATUS_F2_PKT_AVAILABLE,
STATUS_F3_PKT_AVAILABLE
);
Ok(())
}
}
#[cfg(feature = "log")]
impl core::fmt::Display for FormatStatus {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
core::fmt::Debug::fmt(self, f)
}
}
#[allow(dead_code)]
pub(crate) struct FormatInterrupt(pub u16);
#[cfg(feature = "defmt")]
impl defmt::Format for FormatInterrupt {
fn format(&self, fmt: defmt::Formatter) {
macro_rules! implm {
($($name:ident),*) => {
$(
if self.0 & $name > 0 {
defmt::write!(fmt, " | {}", &stringify!($name)[4..]);
}
)*
};
}
implm!(
IRQ_DATA_UNAVAILABLE,
IRQ_F2_F3_FIFO_RD_UNDERFLOW,
IRQ_F2_F3_FIFO_WR_OVERFLOW,
IRQ_COMMAND_ERROR,
IRQ_DATA_ERROR,
IRQ_F2_PACKET_AVAILABLE,
IRQ_F3_PACKET_AVAILABLE,
IRQ_F1_OVERFLOW,
IRQ_MISC_INTR0,
IRQ_MISC_INTR1,
IRQ_MISC_INTR2,
IRQ_MISC_INTR3,
IRQ_MISC_INTR4,
IRQ_F1_INTR,
IRQ_F2_INTR,
IRQ_F3_INTR
);
}
}
#[cfg(feature = "log")]
impl core::fmt::Debug for FormatInterrupt {
fn fmt(&self, fmt: &mut core::fmt::Formatter) -> core::fmt::Result {
macro_rules! implm {
($($name:ident),*) => {
$(
if self.0 & $name > 0 {
core::write!(fmt, " | {}", &stringify!($name)[7..])?;
}
)*
};
}
implm!(
IRQ_DATA_UNAVAILABLE,
IRQ_F2_F3_FIFO_RD_UNDERFLOW,
IRQ_F2_F3_FIFO_WR_OVERFLOW,
IRQ_COMMAND_ERROR,
IRQ_DATA_ERROR,
IRQ_F2_PACKET_AVAILABLE,
IRQ_F3_PACKET_AVAILABLE,
IRQ_F1_OVERFLOW,
IRQ_MISC_INTR0,
IRQ_MISC_INTR1,
IRQ_MISC_INTR2,
IRQ_MISC_INTR3,
IRQ_MISC_INTR4,
IRQ_F1_INTR,
IRQ_F2_INTR,
IRQ_F3_INTR
);
Ok(())
}
}
#[cfg(feature = "log")]
impl core::fmt::Display for FormatInterrupt {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
core::fmt::Debug::fmt(self, f)
}
}

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use core::cmp::{max, min};
use ch::driver::LinkState;
use embassy_net_driver_channel as ch;
use embassy_time::{Duration, Timer};
pub use crate::bus::SpiBusCyw43;
use crate::consts::*;
use crate::events::{Event, EventSubscriber, Events};
use crate::fmt::Bytes;
use crate::ioctl::{IoctlState, IoctlType};
use crate::structs::*;
use crate::{countries, events, PowerManagementMode};
#[derive(Debug)]
pub struct Error {
pub status: u32,
}
pub struct Control<'a> {
state_ch: ch::StateRunner<'a>,
events: &'a Events,
ioctl_state: &'a IoctlState,
}
impl<'a> Control<'a> {
pub(crate) fn new(state_ch: ch::StateRunner<'a>, event_sub: &'a Events, ioctl_state: &'a IoctlState) -> Self {
Self {
state_ch,
events: event_sub,
ioctl_state,
}
}
pub async fn init(&mut self, clm: &[u8]) {
const CHUNK_SIZE: usize = 1024;
debug!("Downloading CLM...");
let mut offs = 0;
for chunk in clm.chunks(CHUNK_SIZE) {
let mut flag = DOWNLOAD_FLAG_HANDLER_VER;
if offs == 0 {
flag |= DOWNLOAD_FLAG_BEGIN;
}
offs += chunk.len();
if offs == clm.len() {
flag |= DOWNLOAD_FLAG_END;
}
let header = DownloadHeader {
flag,
dload_type: DOWNLOAD_TYPE_CLM,
len: chunk.len() as _,
crc: 0,
};
let mut buf = [0; 8 + 12 + CHUNK_SIZE];
buf[0..8].copy_from_slice(b"clmload\x00");
buf[8..20].copy_from_slice(&header.to_bytes());
buf[20..][..chunk.len()].copy_from_slice(&chunk);
self.ioctl(IoctlType::Set, IOCTL_CMD_SET_VAR, 0, &mut buf[..8 + 12 + chunk.len()])
.await;
}
// check clmload ok
assert_eq!(self.get_iovar_u32("clmload_status").await, 0);
debug!("Configuring misc stuff...");
// Disable tx gloming which transfers multiple packets in one request.
// 'glom' is short for "conglomerate" which means "gather together into
// a compact mass".
self.set_iovar_u32("bus:txglom", 0).await;
self.set_iovar_u32("apsta", 1).await;
// read MAC addr.
let mut mac_addr = [0; 6];
assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6);
debug!("mac addr: {:02x}", Bytes(&mac_addr));
let country = countries::WORLD_WIDE_XX;
let country_info = CountryInfo {
country_abbrev: [country.code[0], country.code[1], 0, 0],
country_code: [country.code[0], country.code[1], 0, 0],
rev: if country.rev == 0 { -1 } else { country.rev as _ },
};
self.set_iovar("country", &country_info.to_bytes()).await;
// set country takes some time, next ioctls fail if we don't wait.
Timer::after(Duration::from_millis(100)).await;
// Set antenna to chip antenna
self.ioctl_set_u32(IOCTL_CMD_ANTDIV, 0, 0).await;
self.set_iovar_u32("bus:txglom", 0).await;
Timer::after(Duration::from_millis(100)).await;
//self.set_iovar_u32("apsta", 1).await; // this crashes, also we already did it before...??
//Timer::after(Duration::from_millis(100)).await;
self.set_iovar_u32("ampdu_ba_wsize", 8).await;
Timer::after(Duration::from_millis(100)).await;
self.set_iovar_u32("ampdu_mpdu", 4).await;
Timer::after(Duration::from_millis(100)).await;
//self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes
//Timer::after(Duration::from_millis(100)).await;
// evts
let mut evts = EventMask {
iface: 0,
events: [0xFF; 24],
};
// Disable spammy uninteresting events.
evts.unset(Event::RADIO);
evts.unset(Event::IF);
evts.unset(Event::PROBREQ_MSG);
evts.unset(Event::PROBREQ_MSG_RX);
evts.unset(Event::PROBRESP_MSG);
evts.unset(Event::PROBRESP_MSG);
evts.unset(Event::ROAM);
self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await;
Timer::after(Duration::from_millis(100)).await;
// set wifi up
self.ioctl(IoctlType::Set, IOCTL_CMD_UP, 0, &mut []).await;
Timer::after(Duration::from_millis(100)).await;
self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto
self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any
Timer::after(Duration::from_millis(100)).await;
self.state_ch.set_ethernet_address(mac_addr);
debug!("INIT DONE");
}
pub async fn set_power_management(&mut self, mode: PowerManagementMode) {
// power save mode
let mode_num = mode.mode();
if mode_num == 2 {
self.set_iovar_u32("pm2_sleep_ret", mode.sleep_ret_ms() as u32).await;
self.set_iovar_u32("bcn_li_bcn", mode.beacon_period() as u32).await;
self.set_iovar_u32("bcn_li_dtim", mode.dtim_period() as u32).await;
self.set_iovar_u32("assoc_listen", mode.assoc() as u32).await;
}
self.ioctl_set_u32(86, 0, mode_num).await;
}
pub async fn join_open(&mut self, ssid: &str) -> Result<(), Error> {
self.set_iovar_u32("ampdu_ba_wsize", 8).await;
self.ioctl_set_u32(134, 0, 0).await; // wsec = open
self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 0).await;
self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1
self.ioctl_set_u32(22, 0, 0).await; // set_auth = open (0)
let mut i = SsidInfo {
len: ssid.len() as _,
ssid: [0; 32],
};
i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes());
self.wait_for_join(i).await
}
pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) -> Result<(), Error> {
self.set_iovar_u32("ampdu_ba_wsize", 8).await;
self.ioctl_set_u32(134, 0, 4).await; // wsec = wpa2
self.set_iovar_u32x2("bsscfg:sup_wpa", 0, 1).await;
self.set_iovar_u32x2("bsscfg:sup_wpa2_eapver", 0, 0xFFFF_FFFF).await;
self.set_iovar_u32x2("bsscfg:sup_wpa_tmo", 0, 2500).await;
Timer::after(Duration::from_millis(100)).await;
let mut pfi = PassphraseInfo {
len: passphrase.len() as _,
flags: 1,
passphrase: [0; 64],
};
pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes());
self.ioctl(IoctlType::Set, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes())
.await; // WLC_SET_WSEC_PMK
self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1
self.ioctl_set_u32(22, 0, 0).await; // set_auth = 0 (open)
self.ioctl_set_u32(165, 0, 0x80).await; // set_wpa_auth
let mut i = SsidInfo {
len: ssid.len() as _,
ssid: [0; 32],
};
i.ssid[..ssid.len()].copy_from_slice(ssid.as_bytes());
self.wait_for_join(i).await
}
async fn wait_for_join(&mut self, i: SsidInfo) -> Result<(), Error> {
self.events.mask.enable(&[Event::SET_SSID, Event::AUTH]);
let mut subscriber = self.events.queue.subscriber().unwrap();
// the actual join operation starts here
// we make sure to enable events before so we don't miss any
// set_ssid
self.ioctl(IoctlType::Set, IOCTL_CMD_SET_SSID, 0, &mut i.to_bytes())
.await;
// to complete the join, we wait for a SET_SSID event
// we also save the AUTH status for the user, it may be interesting
let mut auth_status = 0;
let status = loop {
let msg = subscriber.next_message_pure().await;
if msg.header.event_type == Event::AUTH && msg.header.status != EStatus::SUCCESS {
auth_status = msg.header.status;
} else if msg.header.event_type == Event::SET_SSID {
// join operation ends with SET_SSID event
break msg.header.status;
}
};
self.events.mask.disable_all();
if status == EStatus::SUCCESS {
// successful join
self.state_ch.set_link_state(LinkState::Up);
debug!("JOINED");
Ok(())
} else {
warn!("JOIN failed with status={} auth={}", status, auth_status);
Err(Error { status })
}
}
pub async fn gpio_set(&mut self, gpio_n: u8, gpio_en: bool) {
assert!(gpio_n < 3);
self.set_iovar_u32x2("gpioout", 1 << gpio_n, if gpio_en { 1 << gpio_n } else { 0 })
.await
}
pub async fn start_ap_open(&mut self, ssid: &str, channel: u8) {
self.start_ap(ssid, "", Security::OPEN, channel).await;
}
pub async fn start_ap_wpa2(&mut self, ssid: &str, passphrase: &str, channel: u8) {
self.start_ap(ssid, passphrase, Security::WPA2_AES_PSK, channel).await;
}
async fn start_ap(&mut self, ssid: &str, passphrase: &str, security: Security, channel: u8) {
if security != Security::OPEN
&& (passphrase.as_bytes().len() < MIN_PSK_LEN || passphrase.as_bytes().len() > MAX_PSK_LEN)
{
panic!("Passphrase is too short or too long");
}
// Temporarily set wifi down
self.ioctl(IoctlType::Set, IOCTL_CMD_DOWN, 0, &mut []).await;
// Turn off APSTA mode
self.set_iovar_u32("apsta", 0).await;
// Set wifi up again
self.ioctl(IoctlType::Set, IOCTL_CMD_UP, 0, &mut []).await;
// Turn on AP mode
self.ioctl_set_u32(IOCTL_CMD_SET_AP, 0, 1).await;
// Set SSID
let mut i = SsidInfoWithIndex {
index: 0,
ssid_info: SsidInfo {
len: ssid.as_bytes().len() as _,
ssid: [0; 32],
},
};
i.ssid_info.ssid[..ssid.as_bytes().len()].copy_from_slice(ssid.as_bytes());
self.set_iovar("bsscfg:ssid", &i.to_bytes()).await;
// Set channel number
self.ioctl_set_u32(IOCTL_CMD_SET_CHANNEL, 0, channel as u32).await;
// Set security
self.set_iovar_u32x2("bsscfg:wsec", 0, (security as u32) & 0xFF).await;
if security != Security::OPEN {
self.set_iovar_u32x2("bsscfg:wpa_auth", 0, 0x0084).await; // wpa_auth = WPA2_AUTH_PSK | WPA_AUTH_PSK
Timer::after(Duration::from_millis(100)).await;
// Set passphrase
let mut pfi = PassphraseInfo {
len: passphrase.as_bytes().len() as _,
flags: 1, // WSEC_PASSPHRASE
passphrase: [0; 64],
};
pfi.passphrase[..passphrase.as_bytes().len()].copy_from_slice(passphrase.as_bytes());
self.ioctl(IoctlType::Set, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes())
.await;
}
// Change mutlicast rate from 1 Mbps to 11 Mbps
self.set_iovar_u32("2g_mrate", 11000000 / 500000).await;
// Start AP
self.set_iovar_u32x2("bss", 0, 1).await; // bss = BSS_UP
}
async fn set_iovar_u32x2(&mut self, name: &str, val1: u32, val2: u32) {
let mut buf = [0; 8];
buf[0..4].copy_from_slice(&val1.to_le_bytes());
buf[4..8].copy_from_slice(&val2.to_le_bytes());
self.set_iovar(name, &buf).await
}
async fn set_iovar_u32(&mut self, name: &str, val: u32) {
self.set_iovar(name, &val.to_le_bytes()).await
}
async fn get_iovar_u32(&mut self, name: &str) -> u32 {
let mut buf = [0; 4];
let len = self.get_iovar(name, &mut buf).await;
assert_eq!(len, 4);
u32::from_le_bytes(buf)
}
async fn set_iovar(&mut self, name: &str, val: &[u8]) {
self.set_iovar_v::<64>(name, val).await
}
async fn set_iovar_v<const BUFSIZE: usize>(&mut self, name: &str, val: &[u8]) {
debug!("set {} = {:02x}", name, Bytes(val));
let mut buf = [0; BUFSIZE];
buf[..name.len()].copy_from_slice(name.as_bytes());
buf[name.len()] = 0;
buf[name.len() + 1..][..val.len()].copy_from_slice(val);
let total_len = name.len() + 1 + val.len();
self.ioctl(IoctlType::Set, IOCTL_CMD_SET_VAR, 0, &mut buf[..total_len])
.await;
}
// TODO this is not really working, it always returns all zeros.
async fn get_iovar(&mut self, name: &str, res: &mut [u8]) -> usize {
debug!("get {}", name);
let mut buf = [0; 64];
buf[..name.len()].copy_from_slice(name.as_bytes());
buf[name.len()] = 0;
let total_len = max(name.len() + 1, res.len());
let res_len = self
.ioctl(IoctlType::Get, IOCTL_CMD_GET_VAR, 0, &mut buf[..total_len])
.await;
let out_len = min(res.len(), res_len);
res[..out_len].copy_from_slice(&buf[..out_len]);
out_len
}
async fn ioctl_set_u32(&mut self, cmd: u32, iface: u32, val: u32) {
let mut buf = val.to_le_bytes();
self.ioctl(IoctlType::Set, cmd, iface, &mut buf).await;
}
async fn ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize {
struct CancelOnDrop<'a>(&'a IoctlState);
impl CancelOnDrop<'_> {
fn defuse(self) {
core::mem::forget(self);
}
}
impl Drop for CancelOnDrop<'_> {
fn drop(&mut self) {
self.0.cancel_ioctl();
}
}
let ioctl = CancelOnDrop(self.ioctl_state);
let resp_len = ioctl.0.do_ioctl(kind, cmd, iface, buf).await;
ioctl.defuse();
resp_len
}
/// Start a wifi scan
///
/// Returns a `Stream` of networks found by the device
///
/// # Note
/// Device events are currently implemented using a bounded queue.
/// To not miss any events, you should make sure to always await the stream.
pub async fn scan(&mut self) -> Scanner<'_> {
const SCANTYPE_PASSIVE: u8 = 1;
let scan_params = ScanParams {
version: 1,
action: 1,
sync_id: 1,
ssid_len: 0,
ssid: [0; 32],
bssid: [0xff; 6],
bss_type: 2,
scan_type: SCANTYPE_PASSIVE,
nprobes: !0,
active_time: !0,
passive_time: !0,
home_time: !0,
channel_num: 0,
channel_list: [0; 1],
};
self.events.mask.enable(&[Event::ESCAN_RESULT]);
let subscriber = self.events.queue.subscriber().unwrap();
self.set_iovar_v::<256>("escan", &scan_params.to_bytes()).await;
Scanner {
subscriber,
events: &self.events,
}
}
}
pub struct Scanner<'a> {
subscriber: EventSubscriber<'a>,
events: &'a Events,
}
impl Scanner<'_> {
/// wait for the next found network
pub async fn next(&mut self) -> Option<BssInfo> {
let event = self.subscriber.next_message_pure().await;
if event.header.status != EStatus::PARTIAL {
self.events.mask.disable_all();
return None;
}
if let events::Payload::BssInfo(bss) = event.payload {
Some(bss)
} else {
None
}
}
}
impl Drop for Scanner<'_> {
fn drop(&mut self) {
self.events.mask.disable_all();
}
}

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cyw43/src/countries.rs Normal file
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@ -0,0 +1,481 @@
#![allow(unused)]
pub struct Country {
pub code: [u8; 2],
pub rev: u16,
}
/// AF Afghanistan
pub const AFGHANISTAN: Country = Country { code: *b"AF", rev: 0 };
/// AL Albania
pub const ALBANIA: Country = Country { code: *b"AL", rev: 0 };
/// DZ Algeria
pub const ALGERIA: Country = Country { code: *b"DZ", rev: 0 };
/// AS American_Samoa
pub const AMERICAN_SAMOA: Country = Country { code: *b"AS", rev: 0 };
/// AO Angola
pub const ANGOLA: Country = Country { code: *b"AO", rev: 0 };
/// AI Anguilla
pub const ANGUILLA: Country = Country { code: *b"AI", rev: 0 };
/// AG Antigua_and_Barbuda
pub const ANTIGUA_AND_BARBUDA: Country = Country { code: *b"AG", rev: 0 };
/// AR Argentina
pub const ARGENTINA: Country = Country { code: *b"AR", rev: 0 };
/// AM Armenia
pub const ARMENIA: Country = Country { code: *b"AM", rev: 0 };
/// AW Aruba
pub const ARUBA: Country = Country { code: *b"AW", rev: 0 };
/// AU Australia
pub const AUSTRALIA: Country = Country { code: *b"AU", rev: 0 };
/// AT Austria
pub const AUSTRIA: Country = Country { code: *b"AT", rev: 0 };
/// AZ Azerbaijan
pub const AZERBAIJAN: Country = Country { code: *b"AZ", rev: 0 };
/// BS Bahamas
pub const BAHAMAS: Country = Country { code: *b"BS", rev: 0 };
/// BH Bahrain
pub const BAHRAIN: Country = Country { code: *b"BH", rev: 0 };
/// 0B Baker_Island
pub const BAKER_ISLAND: Country = Country { code: *b"0B", rev: 0 };
/// BD Bangladesh
pub const BANGLADESH: Country = Country { code: *b"BD", rev: 0 };
/// BB Barbados
pub const BARBADOS: Country = Country { code: *b"BB", rev: 0 };
/// BY Belarus
pub const BELARUS: Country = Country { code: *b"BY", rev: 0 };
/// BE Belgium
pub const BELGIUM: Country = Country { code: *b"BE", rev: 0 };
/// BZ Belize
pub const BELIZE: Country = Country { code: *b"BZ", rev: 0 };
/// BJ Benin
pub const BENIN: Country = Country { code: *b"BJ", rev: 0 };
/// BM Bermuda
pub const BERMUDA: Country = Country { code: *b"BM", rev: 0 };
/// BT Bhutan
pub const BHUTAN: Country = Country { code: *b"BT", rev: 0 };
/// BO Bolivia
pub const BOLIVIA: Country = Country { code: *b"BO", rev: 0 };
/// BA Bosnia_and_Herzegovina
pub const BOSNIA_AND_HERZEGOVINA: Country = Country { code: *b"BA", rev: 0 };
/// BW Botswana
pub const BOTSWANA: Country = Country { code: *b"BW", rev: 0 };
/// BR Brazil
pub const BRAZIL: Country = Country { code: *b"BR", rev: 0 };
/// IO British_Indian_Ocean_Territory
pub const BRITISH_INDIAN_OCEAN_TERRITORY: Country = Country { code: *b"IO", rev: 0 };
/// BN Brunei_Darussalam
pub const BRUNEI_DARUSSALAM: Country = Country { code: *b"BN", rev: 0 };
/// BG Bulgaria
pub const BULGARIA: Country = Country { code: *b"BG", rev: 0 };
/// BF Burkina_Faso
pub const BURKINA_FASO: Country = Country { code: *b"BF", rev: 0 };
/// BI Burundi
pub const BURUNDI: Country = Country { code: *b"BI", rev: 0 };
/// KH Cambodia
pub const CAMBODIA: Country = Country { code: *b"KH", rev: 0 };
/// CM Cameroon
pub const CAMEROON: Country = Country { code: *b"CM", rev: 0 };
/// CA Canada
pub const CANADA: Country = Country { code: *b"CA", rev: 0 };
/// CA Canada Revision 950
pub const CANADA_REV950: Country = Country { code: *b"CA", rev: 950 };
/// CV Cape_Verde
pub const CAPE_VERDE: Country = Country { code: *b"CV", rev: 0 };
/// KY Cayman_Islands
pub const CAYMAN_ISLANDS: Country = Country { code: *b"KY", rev: 0 };
/// CF Central_African_Republic
pub const CENTRAL_AFRICAN_REPUBLIC: Country = Country { code: *b"CF", rev: 0 };
/// TD Chad
pub const CHAD: Country = Country { code: *b"TD", rev: 0 };
/// CL Chile
pub const CHILE: Country = Country { code: *b"CL", rev: 0 };
/// CN China
pub const CHINA: Country = Country { code: *b"CN", rev: 0 };
/// CX Christmas_Island
pub const CHRISTMAS_ISLAND: Country = Country { code: *b"CX", rev: 0 };
/// CO Colombia
pub const COLOMBIA: Country = Country { code: *b"CO", rev: 0 };
/// KM Comoros
pub const COMOROS: Country = Country { code: *b"KM", rev: 0 };
/// CG Congo
pub const CONGO: Country = Country { code: *b"CG", rev: 0 };
/// CD Congo,_The_Democratic_Republic_Of_The
pub const CONGO_THE_DEMOCRATIC_REPUBLIC_OF_THE: Country = Country { code: *b"CD", rev: 0 };
/// CR Costa_Rica
pub const COSTA_RICA: Country = Country { code: *b"CR", rev: 0 };
/// CI Cote_D'ivoire
pub const COTE_DIVOIRE: Country = Country { code: *b"CI", rev: 0 };
/// HR Croatia
pub const CROATIA: Country = Country { code: *b"HR", rev: 0 };
/// CU Cuba
pub const CUBA: Country = Country { code: *b"CU", rev: 0 };
/// CY Cyprus
pub const CYPRUS: Country = Country { code: *b"CY", rev: 0 };
/// CZ Czech_Republic
pub const CZECH_REPUBLIC: Country = Country { code: *b"CZ", rev: 0 };
/// DK Denmark
pub const DENMARK: Country = Country { code: *b"DK", rev: 0 };
/// DJ Djibouti
pub const DJIBOUTI: Country = Country { code: *b"DJ", rev: 0 };
/// DM Dominica
pub const DOMINICA: Country = Country { code: *b"DM", rev: 0 };
/// DO Dominican_Republic
pub const DOMINICAN_REPUBLIC: Country = Country { code: *b"DO", rev: 0 };
/// AU G'Day mate!
pub const DOWN_UNDER: Country = Country { code: *b"AU", rev: 0 };
/// EC Ecuador
pub const ECUADOR: Country = Country { code: *b"EC", rev: 0 };
/// EG Egypt
pub const EGYPT: Country = Country { code: *b"EG", rev: 0 };
/// SV El_Salvador
pub const EL_SALVADOR: Country = Country { code: *b"SV", rev: 0 };
/// GQ Equatorial_Guinea
pub const EQUATORIAL_GUINEA: Country = Country { code: *b"GQ", rev: 0 };
/// ER Eritrea
pub const ERITREA: Country = Country { code: *b"ER", rev: 0 };
/// EE Estonia
pub const ESTONIA: Country = Country { code: *b"EE", rev: 0 };
/// ET Ethiopia
pub const ETHIOPIA: Country = Country { code: *b"ET", rev: 0 };
/// FK Falkland_Islands_(Malvinas)
pub const FALKLAND_ISLANDS_MALVINAS: Country = Country { code: *b"FK", rev: 0 };
/// FO Faroe_Islands
pub const FAROE_ISLANDS: Country = Country { code: *b"FO", rev: 0 };
/// FJ Fiji
pub const FIJI: Country = Country { code: *b"FJ", rev: 0 };
/// FI Finland
pub const FINLAND: Country = Country { code: *b"FI", rev: 0 };
/// FR France
pub const FRANCE: Country = Country { code: *b"FR", rev: 0 };
/// GF French_Guina
pub const FRENCH_GUINA: Country = Country { code: *b"GF", rev: 0 };
/// PF French_Polynesia
pub const FRENCH_POLYNESIA: Country = Country { code: *b"PF", rev: 0 };
/// TF French_Southern_Territories
pub const FRENCH_SOUTHERN_TERRITORIES: Country = Country { code: *b"TF", rev: 0 };
/// GA Gabon
pub const GABON: Country = Country { code: *b"GA", rev: 0 };
/// GM Gambia
pub const GAMBIA: Country = Country { code: *b"GM", rev: 0 };
/// GE Georgia
pub const GEORGIA: Country = Country { code: *b"GE", rev: 0 };
/// DE Germany
pub const GERMANY: Country = Country { code: *b"DE", rev: 0 };
/// E0 European_Wide Revision 895
pub const EUROPEAN_WIDE_REV895: Country = Country { code: *b"E0", rev: 895 };
/// GH Ghana
pub const GHANA: Country = Country { code: *b"GH", rev: 0 };
/// GI Gibraltar
pub const GIBRALTAR: Country = Country { code: *b"GI", rev: 0 };
/// GR Greece
pub const GREECE: Country = Country { code: *b"GR", rev: 0 };
/// GD Grenada
pub const GRENADA: Country = Country { code: *b"GD", rev: 0 };
/// GP Guadeloupe
pub const GUADELOUPE: Country = Country { code: *b"GP", rev: 0 };
/// GU Guam
pub const GUAM: Country = Country { code: *b"GU", rev: 0 };
/// GT Guatemala
pub const GUATEMALA: Country = Country { code: *b"GT", rev: 0 };
/// GG Guernsey
pub const GUERNSEY: Country = Country { code: *b"GG", rev: 0 };
/// GN Guinea
pub const GUINEA: Country = Country { code: *b"GN", rev: 0 };
/// GW Guinea-bissau
pub const GUINEA_BISSAU: Country = Country { code: *b"GW", rev: 0 };
/// GY Guyana
pub const GUYANA: Country = Country { code: *b"GY", rev: 0 };
/// HT Haiti
pub const HAITI: Country = Country { code: *b"HT", rev: 0 };
/// VA Holy_See_(Vatican_City_State)
pub const HOLY_SEE_VATICAN_CITY_STATE: Country = Country { code: *b"VA", rev: 0 };
/// HN Honduras
pub const HONDURAS: Country = Country { code: *b"HN", rev: 0 };
/// HK Hong_Kong
pub const HONG_KONG: Country = Country { code: *b"HK", rev: 0 };
/// HU Hungary
pub const HUNGARY: Country = Country { code: *b"HU", rev: 0 };
/// IS Iceland
pub const ICELAND: Country = Country { code: *b"IS", rev: 0 };
/// IN India
pub const INDIA: Country = Country { code: *b"IN", rev: 0 };
/// ID Indonesia
pub const INDONESIA: Country = Country { code: *b"ID", rev: 0 };
/// IR Iran,_Islamic_Republic_Of
pub const IRAN_ISLAMIC_REPUBLIC_OF: Country = Country { code: *b"IR", rev: 0 };
/// IQ Iraq
pub const IRAQ: Country = Country { code: *b"IQ", rev: 0 };
/// IE Ireland
pub const IRELAND: Country = Country { code: *b"IE", rev: 0 };
/// IL Israel
pub const ISRAEL: Country = Country { code: *b"IL", rev: 0 };
/// IT Italy
pub const ITALY: Country = Country { code: *b"IT", rev: 0 };
/// JM Jamaica
pub const JAMAICA: Country = Country { code: *b"JM", rev: 0 };
/// JP Japan
pub const JAPAN: Country = Country { code: *b"JP", rev: 0 };
/// JE Jersey
pub const JERSEY: Country = Country { code: *b"JE", rev: 0 };
/// JO Jordan
pub const JORDAN: Country = Country { code: *b"JO", rev: 0 };
/// KZ Kazakhstan
pub const KAZAKHSTAN: Country = Country { code: *b"KZ", rev: 0 };
/// KE Kenya
pub const KENYA: Country = Country { code: *b"KE", rev: 0 };
/// KI Kiribati
pub const KIRIBATI: Country = Country { code: *b"KI", rev: 0 };
/// KR Korea,_Republic_Of
pub const KOREA_REPUBLIC_OF: Country = Country { code: *b"KR", rev: 1 };
/// 0A Kosovo
pub const KOSOVO: Country = Country { code: *b"0A", rev: 0 };
/// KW Kuwait
pub const KUWAIT: Country = Country { code: *b"KW", rev: 0 };
/// KG Kyrgyzstan
pub const KYRGYZSTAN: Country = Country { code: *b"KG", rev: 0 };
/// LA Lao_People's_Democratic_Repubic
pub const LAO_PEOPLES_DEMOCRATIC_REPUBIC: Country = Country { code: *b"LA", rev: 0 };
/// LV Latvia
pub const LATVIA: Country = Country { code: *b"LV", rev: 0 };
/// LB Lebanon
pub const LEBANON: Country = Country { code: *b"LB", rev: 0 };
/// LS Lesotho
pub const LESOTHO: Country = Country { code: *b"LS", rev: 0 };
/// LR Liberia
pub const LIBERIA: Country = Country { code: *b"LR", rev: 0 };
/// LY Libyan_Arab_Jamahiriya
pub const LIBYAN_ARAB_JAMAHIRIYA: Country = Country { code: *b"LY", rev: 0 };
/// LI Liechtenstein
pub const LIECHTENSTEIN: Country = Country { code: *b"LI", rev: 0 };
/// LT Lithuania
pub const LITHUANIA: Country = Country { code: *b"LT", rev: 0 };
/// LU Luxembourg
pub const LUXEMBOURG: Country = Country { code: *b"LU", rev: 0 };
/// MO Macao
pub const MACAO: Country = Country { code: *b"MO", rev: 0 };
/// MK Macedonia,_Former_Yugoslav_Republic_Of
pub const MACEDONIA_FORMER_YUGOSLAV_REPUBLIC_OF: Country = Country { code: *b"MK", rev: 0 };
/// MG Madagascar
pub const MADAGASCAR: Country = Country { code: *b"MG", rev: 0 };
/// MW Malawi
pub const MALAWI: Country = Country { code: *b"MW", rev: 0 };
/// MY Malaysia
pub const MALAYSIA: Country = Country { code: *b"MY", rev: 0 };
/// MV Maldives
pub const MALDIVES: Country = Country { code: *b"MV", rev: 0 };
/// ML Mali
pub const MALI: Country = Country { code: *b"ML", rev: 0 };
/// MT Malta
pub const MALTA: Country = Country { code: *b"MT", rev: 0 };
/// IM Man,_Isle_Of
pub const MAN_ISLE_OF: Country = Country { code: *b"IM", rev: 0 };
/// MQ Martinique
pub const MARTINIQUE: Country = Country { code: *b"MQ", rev: 0 };
/// MR Mauritania
pub const MAURITANIA: Country = Country { code: *b"MR", rev: 0 };
/// MU Mauritius
pub const MAURITIUS: Country = Country { code: *b"MU", rev: 0 };
/// YT Mayotte
pub const MAYOTTE: Country = Country { code: *b"YT", rev: 0 };
/// MX Mexico
pub const MEXICO: Country = Country { code: *b"MX", rev: 0 };
/// FM Micronesia,_Federated_States_Of
pub const MICRONESIA_FEDERATED_STATES_OF: Country = Country { code: *b"FM", rev: 0 };
/// MD Moldova,_Republic_Of
pub const MOLDOVA_REPUBLIC_OF: Country = Country { code: *b"MD", rev: 0 };
/// MC Monaco
pub const MONACO: Country = Country { code: *b"MC", rev: 0 };
/// MN Mongolia
pub const MONGOLIA: Country = Country { code: *b"MN", rev: 0 };
/// ME Montenegro
pub const MONTENEGRO: Country = Country { code: *b"ME", rev: 0 };
/// MS Montserrat
pub const MONTSERRAT: Country = Country { code: *b"MS", rev: 0 };
/// MA Morocco
pub const MOROCCO: Country = Country { code: *b"MA", rev: 0 };
/// MZ Mozambique
pub const MOZAMBIQUE: Country = Country { code: *b"MZ", rev: 0 };
/// MM Myanmar
pub const MYANMAR: Country = Country { code: *b"MM", rev: 0 };
/// NA Namibia
pub const NAMIBIA: Country = Country { code: *b"NA", rev: 0 };
/// NR Nauru
pub const NAURU: Country = Country { code: *b"NR", rev: 0 };
/// NP Nepal
pub const NEPAL: Country = Country { code: *b"NP", rev: 0 };
/// NL Netherlands
pub const NETHERLANDS: Country = Country { code: *b"NL", rev: 0 };
/// AN Netherlands_Antilles
pub const NETHERLANDS_ANTILLES: Country = Country { code: *b"AN", rev: 0 };
/// NC New_Caledonia
pub const NEW_CALEDONIA: Country = Country { code: *b"NC", rev: 0 };
/// NZ New_Zealand
pub const NEW_ZEALAND: Country = Country { code: *b"NZ", rev: 0 };
/// NI Nicaragua
pub const NICARAGUA: Country = Country { code: *b"NI", rev: 0 };
/// NE Niger
pub const NIGER: Country = Country { code: *b"NE", rev: 0 };
/// NG Nigeria
pub const NIGERIA: Country = Country { code: *b"NG", rev: 0 };
/// NF Norfolk_Island
pub const NORFOLK_ISLAND: Country = Country { code: *b"NF", rev: 0 };
/// MP Northern_Mariana_Islands
pub const NORTHERN_MARIANA_ISLANDS: Country = Country { code: *b"MP", rev: 0 };
/// NO Norway
pub const NORWAY: Country = Country { code: *b"NO", rev: 0 };
/// OM Oman
pub const OMAN: Country = Country { code: *b"OM", rev: 0 };
/// PK Pakistan
pub const PAKISTAN: Country = Country { code: *b"PK", rev: 0 };
/// PW Palau
pub const PALAU: Country = Country { code: *b"PW", rev: 0 };
/// PA Panama
pub const PANAMA: Country = Country { code: *b"PA", rev: 0 };
/// PG Papua_New_Guinea
pub const PAPUA_NEW_GUINEA: Country = Country { code: *b"PG", rev: 0 };
/// PY Paraguay
pub const PARAGUAY: Country = Country { code: *b"PY", rev: 0 };
/// PE Peru
pub const PERU: Country = Country { code: *b"PE", rev: 0 };
/// PH Philippines
pub const PHILIPPINES: Country = Country { code: *b"PH", rev: 0 };
/// PL Poland
pub const POLAND: Country = Country { code: *b"PL", rev: 0 };
/// PT Portugal
pub const PORTUGAL: Country = Country { code: *b"PT", rev: 0 };
/// PR Pueto_Rico
pub const PUETO_RICO: Country = Country { code: *b"PR", rev: 0 };
/// QA Qatar
pub const QATAR: Country = Country { code: *b"QA", rev: 0 };
/// RE Reunion
pub const REUNION: Country = Country { code: *b"RE", rev: 0 };
/// RO Romania
pub const ROMANIA: Country = Country { code: *b"RO", rev: 0 };
/// RU Russian_Federation
pub const RUSSIAN_FEDERATION: Country = Country { code: *b"RU", rev: 0 };
/// RW Rwanda
pub const RWANDA: Country = Country { code: *b"RW", rev: 0 };
/// KN Saint_Kitts_and_Nevis
pub const SAINT_KITTS_AND_NEVIS: Country = Country { code: *b"KN", rev: 0 };
/// LC Saint_Lucia
pub const SAINT_LUCIA: Country = Country { code: *b"LC", rev: 0 };
/// PM Saint_Pierre_and_Miquelon
pub const SAINT_PIERRE_AND_MIQUELON: Country = Country { code: *b"PM", rev: 0 };
/// VC Saint_Vincent_and_The_Grenadines
pub const SAINT_VINCENT_AND_THE_GRENADINES: Country = Country { code: *b"VC", rev: 0 };
/// WS Samoa
pub const SAMOA: Country = Country { code: *b"WS", rev: 0 };
/// MF Sanit_Martin_/_Sint_Marteen
pub const SANIT_MARTIN_SINT_MARTEEN: Country = Country { code: *b"MF", rev: 0 };
/// ST Sao_Tome_and_Principe
pub const SAO_TOME_AND_PRINCIPE: Country = Country { code: *b"ST", rev: 0 };
/// SA Saudi_Arabia
pub const SAUDI_ARABIA: Country = Country { code: *b"SA", rev: 0 };
/// SN Senegal
pub const SENEGAL: Country = Country { code: *b"SN", rev: 0 };
/// RS Serbia
pub const SERBIA: Country = Country { code: *b"RS", rev: 0 };
/// SC Seychelles
pub const SEYCHELLES: Country = Country { code: *b"SC", rev: 0 };
/// SL Sierra_Leone
pub const SIERRA_LEONE: Country = Country { code: *b"SL", rev: 0 };
/// SG Singapore
pub const SINGAPORE: Country = Country { code: *b"SG", rev: 0 };
/// SK Slovakia
pub const SLOVAKIA: Country = Country { code: *b"SK", rev: 0 };
/// SI Slovenia
pub const SLOVENIA: Country = Country { code: *b"SI", rev: 0 };
/// SB Solomon_Islands
pub const SOLOMON_ISLANDS: Country = Country { code: *b"SB", rev: 0 };
/// SO Somalia
pub const SOMALIA: Country = Country { code: *b"SO", rev: 0 };
/// ZA South_Africa
pub const SOUTH_AFRICA: Country = Country { code: *b"ZA", rev: 0 };
/// ES Spain
pub const SPAIN: Country = Country { code: *b"ES", rev: 0 };
/// LK Sri_Lanka
pub const SRI_LANKA: Country = Country { code: *b"LK", rev: 0 };
/// SR Suriname
pub const SURINAME: Country = Country { code: *b"SR", rev: 0 };
/// SZ Swaziland
pub const SWAZILAND: Country = Country { code: *b"SZ", rev: 0 };
/// SE Sweden
pub const SWEDEN: Country = Country { code: *b"SE", rev: 0 };
/// CH Switzerland
pub const SWITZERLAND: Country = Country { code: *b"CH", rev: 0 };
/// SY Syrian_Arab_Republic
pub const SYRIAN_ARAB_REPUBLIC: Country = Country { code: *b"SY", rev: 0 };
/// TW Taiwan,_Province_Of_China
pub const TAIWAN_PROVINCE_OF_CHINA: Country = Country { code: *b"TW", rev: 0 };
/// TJ Tajikistan
pub const TAJIKISTAN: Country = Country { code: *b"TJ", rev: 0 };
/// TZ Tanzania,_United_Republic_Of
pub const TANZANIA_UNITED_REPUBLIC_OF: Country = Country { code: *b"TZ", rev: 0 };
/// TH Thailand
pub const THAILAND: Country = Country { code: *b"TH", rev: 0 };
/// TG Togo
pub const TOGO: Country = Country { code: *b"TG", rev: 0 };
/// TO Tonga
pub const TONGA: Country = Country { code: *b"TO", rev: 0 };
/// TT Trinidad_and_Tobago
pub const TRINIDAD_AND_TOBAGO: Country = Country { code: *b"TT", rev: 0 };
/// TN Tunisia
pub const TUNISIA: Country = Country { code: *b"TN", rev: 0 };
/// TR Turkey
pub const TURKEY: Country = Country { code: *b"TR", rev: 0 };
/// TM Turkmenistan
pub const TURKMENISTAN: Country = Country { code: *b"TM", rev: 0 };
/// TC Turks_and_Caicos_Islands
pub const TURKS_AND_CAICOS_ISLANDS: Country = Country { code: *b"TC", rev: 0 };
/// TV Tuvalu
pub const TUVALU: Country = Country { code: *b"TV", rev: 0 };
/// UG Uganda
pub const UGANDA: Country = Country { code: *b"UG", rev: 0 };
/// UA Ukraine
pub const UKRAINE: Country = Country { code: *b"UA", rev: 0 };
/// AE United_Arab_Emirates
pub const UNITED_ARAB_EMIRATES: Country = Country { code: *b"AE", rev: 0 };
/// GB United_Kingdom
pub const UNITED_KINGDOM: Country = Country { code: *b"GB", rev: 0 };
/// US United_States
pub const UNITED_STATES: Country = Country { code: *b"US", rev: 0 };
/// US United_States Revision 4
pub const UNITED_STATES_REV4: Country = Country { code: *b"US", rev: 4 };
/// Q1 United_States Revision 931
pub const UNITED_STATES_REV931: Country = Country { code: *b"Q1", rev: 931 };
/// Q2 United_States_(No_DFS)
pub const UNITED_STATES_NO_DFS: Country = Country { code: *b"Q2", rev: 0 };
/// UM United_States_Minor_Outlying_Islands
pub const UNITED_STATES_MINOR_OUTLYING_ISLANDS: Country = Country { code: *b"UM", rev: 0 };
/// UY Uruguay
pub const URUGUAY: Country = Country { code: *b"UY", rev: 0 };
/// UZ Uzbekistan
pub const UZBEKISTAN: Country = Country { code: *b"UZ", rev: 0 };
/// VU Vanuatu
pub const VANUATU: Country = Country { code: *b"VU", rev: 0 };
/// VE Venezuela
pub const VENEZUELA: Country = Country { code: *b"VE", rev: 0 };
/// VN Viet_Nam
pub const VIET_NAM: Country = Country { code: *b"VN", rev: 0 };
/// VG Virgin_Islands,_British
pub const VIRGIN_ISLANDS_BRITISH: Country = Country { code: *b"VG", rev: 0 };
/// VI Virgin_Islands,_U.S.
pub const VIRGIN_ISLANDS_US: Country = Country { code: *b"VI", rev: 0 };
/// WF Wallis_and_Futuna
pub const WALLIS_AND_FUTUNA: Country = Country { code: *b"WF", rev: 0 };
/// 0C West_Bank
pub const WEST_BANK: Country = Country { code: *b"0C", rev: 0 };
/// EH Western_Sahara
pub const WESTERN_SAHARA: Country = Country { code: *b"EH", rev: 0 };
/// Worldwide Locale Revision 983
pub const WORLD_WIDE_XV_REV983: Country = Country { code: *b"XV", rev: 983 };
/// Worldwide Locale (passive Ch12-14)
pub const WORLD_WIDE_XX: Country = Country { code: *b"XX", rev: 0 };
/// Worldwide Locale (passive Ch12-14) Revision 17
pub const WORLD_WIDE_XX_REV17: Country = Country { code: *b"XX", rev: 17 };
/// YE Yemen
pub const YEMEN: Country = Country { code: *b"YE", rev: 0 };
/// ZM Zambia
pub const ZAMBIA: Country = Country { code: *b"ZM", rev: 0 };
/// ZW Zimbabwe
pub const ZIMBABWE: Country = Country { code: *b"ZW", rev: 0 };

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#![allow(dead_code)]
#![allow(non_camel_case_types)]
use core::cell::RefCell;
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use embassy_sync::pubsub::{PubSubChannel, Subscriber};
use crate::structs::BssInfo;
#[derive(Debug, Clone, Copy, PartialEq, Eq, num_enum::FromPrimitive)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(u8)]
pub enum Event {
#[num_enum(default)]
Unknown = 0xFF,
/// indicates status of set SSID
SET_SSID = 0,
/// differentiates join IBSS from found (START) IBSS
JOIN = 1,
/// STA founded an IBSS or AP started a BSS
START = 2,
/// 802.11 AUTH request
AUTH = 3,
/// 802.11 AUTH indication
AUTH_IND = 4,
/// 802.11 DEAUTH request
DEAUTH = 5,
/// 802.11 DEAUTH indication
DEAUTH_IND = 6,
/// 802.11 ASSOC request
ASSOC = 7,
/// 802.11 ASSOC indication
ASSOC_IND = 8,
/// 802.11 REASSOC request
REASSOC = 9,
/// 802.11 REASSOC indication
REASSOC_IND = 10,
/// 802.11 DISASSOC request
DISASSOC = 11,
/// 802.11 DISASSOC indication
DISASSOC_IND = 12,
/// 802.11h Quiet period started
QUIET_START = 13,
/// 802.11h Quiet period ended
QUIET_END = 14,
/// BEACONS received/lost indication
BEACON_RX = 15,
/// generic link indication
LINK = 16,
/// TKIP MIC error occurred
MIC_ERROR = 17,
/// NDIS style link indication
NDIS_LINK = 18,
/// roam attempt occurred: indicate status & reason
ROAM = 19,
/// change in dot11FailedCount (txfail)
TXFAIL = 20,
/// WPA2 pmkid cache indication
PMKID_CACHE = 21,
/// current AP's TSF value went backward
RETROGRADE_TSF = 22,
/// AP was pruned from join list for reason
PRUNE = 23,
/// report AutoAuth table entry match for join attempt
AUTOAUTH = 24,
/// Event encapsulating an EAPOL message
EAPOL_MSG = 25,
/// Scan results are ready or scan was aborted
SCAN_COMPLETE = 26,
/// indicate to host addts fail/success
ADDTS_IND = 27,
/// indicate to host delts fail/success
DELTS_IND = 28,
/// indicate to host of beacon transmit
BCNSENT_IND = 29,
/// Send the received beacon up to the host
BCNRX_MSG = 30,
/// indicate to host loss of beacon
BCNLOST_MSG = 31,
/// before attempting to roam
ROAM_PREP = 32,
/// PFN network found event
PFN_NET_FOUND = 33,
/// PFN network lost event
PFN_NET_LOST = 34,
RESET_COMPLETE = 35,
JOIN_START = 36,
ROAM_START = 37,
ASSOC_START = 38,
IBSS_ASSOC = 39,
RADIO = 40,
/// PSM microcode watchdog fired
PSM_WATCHDOG = 41,
/// CCX association start
CCX_ASSOC_START = 42,
/// CCX association abort
CCX_ASSOC_ABORT = 43,
/// probe request received
PROBREQ_MSG = 44,
SCAN_CONFIRM_IND = 45,
/// WPA Handshake
PSK_SUP = 46,
COUNTRY_CODE_CHANGED = 47,
/// WMMAC excedded medium time
EXCEEDED_MEDIUM_TIME = 48,
/// WEP ICV error occurred
ICV_ERROR = 49,
/// Unsupported unicast encrypted frame
UNICAST_DECODE_ERROR = 50,
/// Unsupported multicast encrypted frame
MULTICAST_DECODE_ERROR = 51,
TRACE = 52,
/// BT-AMP HCI event
BTA_HCI_EVENT = 53,
/// I/F change (for wlan host notification)
IF = 54,
/// P2P Discovery listen state expires
P2P_DISC_LISTEN_COMPLETE = 55,
/// indicate RSSI change based on configured levels
RSSI = 56,
/// PFN best network batching event
PFN_BEST_BATCHING = 57,
EXTLOG_MSG = 58,
/// Action frame reception
ACTION_FRAME = 59,
/// Action frame Tx complete
ACTION_FRAME_COMPLETE = 60,
/// assoc request received
PRE_ASSOC_IND = 61,
/// re-assoc request received
PRE_REASSOC_IND = 62,
/// channel adopted (xxx: obsoleted)
CHANNEL_ADOPTED = 63,
/// AP started
AP_STARTED = 64,
/// AP stopped due to DFS
DFS_AP_STOP = 65,
/// AP resumed due to DFS
DFS_AP_RESUME = 66,
/// WAI stations event
WAI_STA_EVENT = 67,
/// event encapsulating an WAI message
WAI_MSG = 68,
/// escan result event
ESCAN_RESULT = 69,
/// action frame off channel complete
ACTION_FRAME_OFF_CHAN_COMPLETE = 70,
/// probe response received
PROBRESP_MSG = 71,
/// P2P Probe request received
P2P_PROBREQ_MSG = 72,
DCS_REQUEST = 73,
/// credits for D11 FIFOs. [AC0,AC1,AC2,AC3,BC_MC,ATIM]
FIFO_CREDIT_MAP = 74,
/// Received action frame event WITH wl_event_rx_frame_data_t header
ACTION_FRAME_RX = 75,
/// Wake Event timer fired, used for wake WLAN test mode
WAKE_EVENT = 76,
/// Radio measurement complete
RM_COMPLETE = 77,
/// Synchronize TSF with the host
HTSFSYNC = 78,
/// request an overlay IOCTL/iovar from the host
OVERLAY_REQ = 79,
CSA_COMPLETE_IND = 80,
/// excess PM Wake Event to inform host
EXCESS_PM_WAKE_EVENT = 81,
/// no PFN networks around
PFN_SCAN_NONE = 82,
/// last found PFN network gets lost
PFN_SCAN_ALLGONE = 83,
GTK_PLUMBED = 84,
/// 802.11 ASSOC indication for NDIS only
ASSOC_IND_NDIS = 85,
/// 802.11 REASSOC indication for NDIS only
REASSOC_IND_NDIS = 86,
ASSOC_REQ_IE = 87,
ASSOC_RESP_IE = 88,
/// association recreated on resume
ASSOC_RECREATED = 89,
/// rx action frame event for NDIS only
ACTION_FRAME_RX_NDIS = 90,
/// authentication request received
AUTH_REQ = 91,
/// fast assoc recreation failed
SPEEDY_RECREATE_FAIL = 93,
/// port-specific event and payload (e.g. NDIS)
NATIVE = 94,
/// event for tx pkt delay suddently jump
PKTDELAY_IND = 95,
/// AWDL AW period starts
AWDL_AW = 96,
/// AWDL Master/Slave/NE master role event
AWDL_ROLE = 97,
/// Generic AWDL event
AWDL_EVENT = 98,
/// NIC AF txstatus
NIC_AF_TXS = 99,
/// NAN event
NAN = 100,
BEACON_FRAME_RX = 101,
/// desired service found
SERVICE_FOUND = 102,
/// GAS fragment received
GAS_FRAGMENT_RX = 103,
/// GAS sessions all complete
GAS_COMPLETE = 104,
/// New device found by p2p offload
P2PO_ADD_DEVICE = 105,
/// device has been removed by p2p offload
P2PO_DEL_DEVICE = 106,
/// WNM event to notify STA enter sleep mode
WNM_STA_SLEEP = 107,
/// Indication of MAC tx failures (exhaustion of 802.11 retries) exceeding threshold(s)
TXFAIL_THRESH = 108,
/// Proximity Detection event
PROXD = 109,
/// AWDL RX Probe response
AWDL_RX_PRB_RESP = 111,
/// AWDL RX Action Frames
AWDL_RX_ACT_FRAME = 112,
/// AWDL Wowl nulls
AWDL_WOWL_NULLPKT = 113,
/// AWDL Phycal status
AWDL_PHYCAL_STATUS = 114,
/// AWDL OOB AF status
AWDL_OOB_AF_STATUS = 115,
/// Interleaved Scan status
AWDL_SCAN_STATUS = 116,
/// AWDL AW Start
AWDL_AW_START = 117,
/// AWDL AW End
AWDL_AW_END = 118,
/// AWDL AW Extensions
AWDL_AW_EXT = 119,
AWDL_PEER_CACHE_CONTROL = 120,
CSA_START_IND = 121,
CSA_DONE_IND = 122,
CSA_FAILURE_IND = 123,
/// CCA based channel quality report
CCA_CHAN_QUAL = 124,
/// to report change in BSSID while roaming
BSSID = 125,
/// tx error indication
TX_STAT_ERROR = 126,
/// credit check for BCMC supported
BCMC_CREDIT_SUPPORT = 127,
/// psta primary interface indication
PSTA_PRIMARY_INTF_IND = 128,
/// Handover Request Initiated
BT_WIFI_HANDOVER_REQ = 130,
/// Southpaw TxInhibit notification
SPW_TXINHIBIT = 131,
/// FBT Authentication Request Indication
FBT_AUTH_REQ_IND = 132,
/// Enhancement addition for RSSI
RSSI_LQM = 133,
/// Full probe/beacon (IEs etc) results
PFN_GSCAN_FULL_RESULT = 134,
/// Significant change in rssi of bssids being tracked
PFN_SWC = 135,
/// a STA been authroized for traffic
AUTHORIZED = 136,
/// probe req with wl_event_rx_frame_data_t header
PROBREQ_MSG_RX = 137,
/// PFN completed scan of network list
PFN_SCAN_COMPLETE = 138,
/// RMC Event
RMC_EVENT = 139,
/// DPSTA interface indication
DPSTA_INTF_IND = 140,
/// RRM Event
RRM = 141,
/// ULP entry event
ULP = 146,
/// TCP Keep Alive Offload Event
TKO = 151,
/// authentication request received
EXT_AUTH_REQ = 187,
/// authentication request received
EXT_AUTH_FRAME_RX = 188,
/// mgmt frame Tx complete
MGMT_FRAME_TXSTATUS = 189,
/// highest val + 1 for range checking
LAST = 190,
}
// TODO this PubSub can probably be replaced with shared memory to make it a bit more efficient.
pub type EventQueue = PubSubChannel<NoopRawMutex, Message, 2, 1, 1>;
pub type EventSubscriber<'a> = Subscriber<'a, NoopRawMutex, Message, 2, 1, 1>;
pub struct Events {
pub queue: EventQueue,
pub mask: SharedEventMask,
}
impl Events {
pub fn new() -> Self {
Self {
queue: EventQueue::new(),
mask: SharedEventMask::default(),
}
}
}
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub struct Status {
pub event_type: Event,
pub status: u32,
}
#[derive(Clone, Copy)]
pub enum Payload {
None,
BssInfo(BssInfo),
}
#[derive(Clone, Copy)]
pub struct Message {
pub header: Status,
pub payload: Payload,
}
impl Message {
pub fn new(status: Status, payload: Payload) -> Self {
Self {
header: status,
payload,
}
}
}
#[derive(Default)]
struct EventMask {
mask: [u32; Self::WORD_COUNT],
}
impl EventMask {
const WORD_COUNT: usize = ((Event::LAST as u32 + (u32::BITS - 1)) / u32::BITS) as usize;
fn enable(&mut self, event: Event) {
let n = event as u32;
let word = n / u32::BITS;
let bit = n % u32::BITS;
self.mask[word as usize] |= 1 << bit;
}
fn disable(&mut self, event: Event) {
let n = event as u32;
let word = n / u32::BITS;
let bit = n % u32::BITS;
self.mask[word as usize] &= !(1 << bit);
}
fn is_enabled(&self, event: Event) -> bool {
let n = event as u32;
let word = n / u32::BITS;
let bit = n % u32::BITS;
self.mask[word as usize] & (1 << bit) > 0
}
}
#[derive(Default)]
pub struct SharedEventMask {
mask: RefCell<EventMask>,
}
impl SharedEventMask {
pub fn enable(&self, events: &[Event]) {
let mut mask = self.mask.borrow_mut();
for event in events {
mask.enable(*event);
}
}
#[allow(dead_code)]
pub fn disable(&self, events: &[Event]) {
let mut mask = self.mask.borrow_mut();
for event in events {
mask.disable(*event);
}
}
pub fn disable_all(&self) {
let mut mask = self.mask.borrow_mut();
mask.mask = Default::default();
}
pub fn is_enabled(&self, event: Event) -> bool {
let mask = self.mask.borrow();
mask.is_enabled(event)
}
}

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#![macro_use]
#![allow(unused_macros)]
use core::fmt::{Debug, Display, LowerHex};
#[cfg(all(feature = "defmt", feature = "log"))]
compile_error!("You may not enable both `defmt` and `log` features.");
macro_rules! assert {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::assert!($($x)*);
#[cfg(feature = "defmt")]
::defmt::assert!($($x)*);
}
};
}
macro_rules! assert_eq {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::assert_eq!($($x)*);
#[cfg(feature = "defmt")]
::defmt::assert_eq!($($x)*);
}
};
}
macro_rules! assert_ne {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::assert_ne!($($x)*);
#[cfg(feature = "defmt")]
::defmt::assert_ne!($($x)*);
}
};
}
macro_rules! debug_assert {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::debug_assert!($($x)*);
#[cfg(feature = "defmt")]
::defmt::debug_assert!($($x)*);
}
};
}
macro_rules! debug_assert_eq {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::debug_assert_eq!($($x)*);
#[cfg(feature = "defmt")]
::defmt::debug_assert_eq!($($x)*);
}
};
}
macro_rules! debug_assert_ne {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::debug_assert_ne!($($x)*);
#[cfg(feature = "defmt")]
::defmt::debug_assert_ne!($($x)*);
}
};
}
macro_rules! todo {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::todo!($($x)*);
#[cfg(feature = "defmt")]
::defmt::todo!($($x)*);
}
};
}
macro_rules! unreachable {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::unreachable!($($x)*);
#[cfg(feature = "defmt")]
::defmt::unreachable!($($x)*);
}
};
}
macro_rules! panic {
($($x:tt)*) => {
{
#[cfg(not(feature = "defmt"))]
::core::panic!($($x)*);
#[cfg(feature = "defmt")]
::defmt::panic!($($x)*);
}
};
}
macro_rules! trace {
($s:literal $(, $x:expr)* $(,)?) => {
{
#[cfg(feature = "log")]
::log::trace!($s $(, $x)*);
#[cfg(feature = "defmt")]
::defmt::trace!($s $(, $x)*);
#[cfg(not(any(feature = "log", feature="defmt")))]
let _ = ($( & $x ),*);
}
};
}
macro_rules! debug {
($s:literal $(, $x:expr)* $(,)?) => {
{
#[cfg(feature = "log")]
::log::debug!($s $(, $x)*);
#[cfg(feature = "defmt")]
::defmt::debug!($s $(, $x)*);
#[cfg(not(any(feature = "log", feature="defmt")))]
let _ = ($( & $x ),*);
}
};
}
macro_rules! info {
($s:literal $(, $x:expr)* $(,)?) => {
{
#[cfg(feature = "log")]
::log::info!($s $(, $x)*);
#[cfg(feature = "defmt")]
::defmt::info!($s $(, $x)*);
#[cfg(not(any(feature = "log", feature="defmt")))]
let _ = ($( & $x ),*);
}
};
}
macro_rules! warn {
($s:literal $(, $x:expr)* $(,)?) => {
{
#[cfg(feature = "log")]
::log::warn!($s $(, $x)*);
#[cfg(feature = "defmt")]
::defmt::warn!($s $(, $x)*);
#[cfg(not(any(feature = "log", feature="defmt")))]
let _ = ($( & $x ),*);
}
};
}
macro_rules! error {
($s:literal $(, $x:expr)* $(,)?) => {
{
#[cfg(feature = "log")]
::log::error!($s $(, $x)*);
#[cfg(feature = "defmt")]
::defmt::error!($s $(, $x)*);
#[cfg(not(any(feature = "log", feature="defmt")))]
let _ = ($( & $x ),*);
}
};
}
#[cfg(feature = "defmt")]
macro_rules! unwrap {
($($x:tt)*) => {
::defmt::unwrap!($($x)*)
};
}
#[cfg(not(feature = "defmt"))]
macro_rules! unwrap {
($arg:expr) => {
match $crate::fmt::Try::into_result($arg) {
::core::result::Result::Ok(t) => t,
::core::result::Result::Err(e) => {
::core::panic!("unwrap of `{}` failed: {:?}", ::core::stringify!($arg), e);
}
}
};
($arg:expr, $($msg:expr),+ $(,)? ) => {
match $crate::fmt::Try::into_result($arg) {
::core::result::Result::Ok(t) => t,
::core::result::Result::Err(e) => {
::core::panic!("unwrap of `{}` failed: {}: {:?}", ::core::stringify!($arg), ::core::format_args!($($msg,)*), e);
}
}
}
}
#[derive(Debug, Copy, Clone, Eq, PartialEq)]
pub struct NoneError;
pub trait Try {
type Ok;
type Error;
fn into_result(self) -> Result<Self::Ok, Self::Error>;
}
impl<T> Try for Option<T> {
type Ok = T;
type Error = NoneError;
#[inline]
fn into_result(self) -> Result<T, NoneError> {
self.ok_or(NoneError)
}
}
impl<T, E> Try for Result<T, E> {
type Ok = T;
type Error = E;
#[inline]
fn into_result(self) -> Self {
self
}
}
pub struct Bytes<'a>(pub &'a [u8]);
impl<'a> Debug for Bytes<'a> {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
write!(f, "{:#02x?}", self.0)
}
}
impl<'a> Display for Bytes<'a> {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
write!(f, "{:#02x?}", self.0)
}
}
impl<'a> LowerHex for Bytes<'a> {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
write!(f, "{:#02x?}", self.0)
}
}
#[cfg(feature = "defmt")]
impl<'a> defmt::Format for Bytes<'a> {
fn format(&self, fmt: defmt::Formatter) {
defmt::write!(fmt, "{:02x}", self.0)
}
}

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use core::cell::{Cell, RefCell};
use core::future::poll_fn;
use core::task::{Poll, Waker};
use embassy_sync::waitqueue::WakerRegistration;
use crate::fmt::Bytes;
#[derive(Clone, Copy)]
pub enum IoctlType {
Get = 0,
Set = 2,
}
#[derive(Clone, Copy)]
pub struct PendingIoctl {
pub buf: *mut [u8],
pub kind: IoctlType,
pub cmd: u32,
pub iface: u32,
}
#[derive(Clone, Copy)]
enum IoctlStateInner {
Pending(PendingIoctl),
Sent { buf: *mut [u8] },
Done { resp_len: usize },
}
struct Wakers {
control: WakerRegistration,
runner: WakerRegistration,
}
impl Default for Wakers {
fn default() -> Self {
Self {
control: WakerRegistration::new(),
runner: WakerRegistration::new(),
}
}
}
pub struct IoctlState {
state: Cell<IoctlStateInner>,
wakers: RefCell<Wakers>,
}
impl IoctlState {
pub fn new() -> Self {
Self {
state: Cell::new(IoctlStateInner::Done { resp_len: 0 }),
wakers: Default::default(),
}
}
fn wake_control(&self) {
self.wakers.borrow_mut().control.wake();
}
fn register_control(&self, waker: &Waker) {
self.wakers.borrow_mut().control.register(waker);
}
fn wake_runner(&self) {
self.wakers.borrow_mut().runner.wake();
}
fn register_runner(&self, waker: &Waker) {
self.wakers.borrow_mut().runner.register(waker);
}
pub async fn wait_complete(&self) -> usize {
poll_fn(|cx| {
if let IoctlStateInner::Done { resp_len } = self.state.get() {
Poll::Ready(resp_len)
} else {
self.register_control(cx.waker());
Poll::Pending
}
})
.await
}
pub async fn wait_pending(&self) -> PendingIoctl {
let pending = poll_fn(|cx| {
if let IoctlStateInner::Pending(pending) = self.state.get() {
Poll::Ready(pending)
} else {
self.register_runner(cx.waker());
Poll::Pending
}
})
.await;
self.state.set(IoctlStateInner::Sent { buf: pending.buf });
pending
}
pub fn cancel_ioctl(&self) {
self.state.set(IoctlStateInner::Done { resp_len: 0 });
}
pub async fn do_ioctl(&self, kind: IoctlType, cmd: u32, iface: u32, buf: &mut [u8]) -> usize {
self.state
.set(IoctlStateInner::Pending(PendingIoctl { buf, kind, cmd, iface }));
self.wake_runner();
self.wait_complete().await
}
pub fn ioctl_done(&self, response: &[u8]) {
if let IoctlStateInner::Sent { buf } = self.state.get() {
trace!("IOCTL Response: {:02x}", Bytes(response));
// TODO fix this
(unsafe { &mut *buf }[..response.len()]).copy_from_slice(response);
self.state.set(IoctlStateInner::Done {
resp_len: response.len(),
});
self.wake_control();
} else {
warn!("IOCTL Response but no pending Ioctl");
}
}
}

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#![no_std]
#![no_main]
#![allow(incomplete_features)]
#![feature(async_fn_in_trait, type_alias_impl_trait, concat_bytes)]
#![deny(unused_must_use)]
// This mod MUST go first, so that the others see its macros.
pub(crate) mod fmt;
mod bus;
mod consts;
mod countries;
mod events;
mod ioctl;
mod structs;
mod control;
mod nvram;
mod runner;
use core::slice;
use embassy_net_driver_channel as ch;
use embedded_hal_1::digital::OutputPin;
use events::Events;
use ioctl::IoctlState;
use crate::bus::Bus;
pub use crate::bus::SpiBusCyw43;
pub use crate::control::{Control, Error as ControlError};
pub use crate::runner::Runner;
pub use crate::structs::BssInfo;
const MTU: usize = 1514;
#[allow(unused)]
#[derive(Clone, Copy, PartialEq, Eq)]
enum Core {
WLAN = 0,
SOCSRAM = 1,
SDIOD = 2,
}
impl Core {
fn base_addr(&self) -> u32 {
match self {
Self::WLAN => CHIP.arm_core_base_address,
Self::SOCSRAM => CHIP.socsram_wrapper_base_address,
Self::SDIOD => CHIP.sdiod_core_base_address,
}
}
}
#[allow(unused)]
struct Chip {
arm_core_base_address: u32,
socsram_base_address: u32,
socsram_wrapper_base_address: u32,
sdiod_core_base_address: u32,
pmu_base_address: u32,
chip_ram_size: u32,
atcm_ram_base_address: u32,
socram_srmem_size: u32,
chanspec_band_mask: u32,
chanspec_band_2g: u32,
chanspec_band_5g: u32,
chanspec_band_shift: u32,
chanspec_bw_10: u32,
chanspec_bw_20: u32,
chanspec_bw_40: u32,
chanspec_bw_mask: u32,
chanspec_bw_shift: u32,
chanspec_ctl_sb_lower: u32,
chanspec_ctl_sb_upper: u32,
chanspec_ctl_sb_none: u32,
chanspec_ctl_sb_mask: u32,
}
const WRAPPER_REGISTER_OFFSET: u32 = 0x100000;
// Data for CYW43439
const CHIP: Chip = Chip {
arm_core_base_address: 0x18003000 + WRAPPER_REGISTER_OFFSET,
socsram_base_address: 0x18004000,
socsram_wrapper_base_address: 0x18004000 + WRAPPER_REGISTER_OFFSET,
sdiod_core_base_address: 0x18002000,
pmu_base_address: 0x18000000,
chip_ram_size: 512 * 1024,
atcm_ram_base_address: 0,
socram_srmem_size: 64 * 1024,
chanspec_band_mask: 0xc000,
chanspec_band_2g: 0x0000,
chanspec_band_5g: 0xc000,
chanspec_band_shift: 14,
chanspec_bw_10: 0x0800,
chanspec_bw_20: 0x1000,
chanspec_bw_40: 0x1800,
chanspec_bw_mask: 0x3800,
chanspec_bw_shift: 11,
chanspec_ctl_sb_lower: 0x0000,
chanspec_ctl_sb_upper: 0x0100,
chanspec_ctl_sb_none: 0x0000,
chanspec_ctl_sb_mask: 0x0700,
};
pub struct State {
ioctl_state: IoctlState,
ch: ch::State<MTU, 4, 4>,
events: Events,
}
impl State {
pub fn new() -> Self {
Self {
ioctl_state: IoctlState::new(),
ch: ch::State::new(),
events: Events::new(),
}
}
}
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum PowerManagementMode {
/// Custom, officially unsupported mode. Use at your own risk.
/// All power-saving features set to their max at only a marginal decrease in power consumption
/// as oppposed to `Aggressive`.
SuperSave,
/// Aggressive power saving mode.
Aggressive,
/// The default mode.
PowerSave,
/// Performance is prefered over power consumption but still some power is conserved as opposed to
/// `None`.
Performance,
/// Unlike all the other PM modes, this lowers the power consumption at all times at the cost of
/// a much lower throughput.
ThroughputThrottling,
/// No power management is configured. This consumes the most power.
None,
}
impl Default for PowerManagementMode {
fn default() -> Self {
Self::PowerSave
}
}
impl PowerManagementMode {
fn sleep_ret_ms(&self) -> u16 {
match self {
PowerManagementMode::SuperSave => 2000,
PowerManagementMode::Aggressive => 2000,
PowerManagementMode::PowerSave => 200,
PowerManagementMode::Performance => 20,
PowerManagementMode::ThroughputThrottling => 0, // value doesn't matter
PowerManagementMode::None => 0, // value doesn't matter
}
}
fn beacon_period(&self) -> u8 {
match self {
PowerManagementMode::SuperSave => 255,
PowerManagementMode::Aggressive => 1,
PowerManagementMode::PowerSave => 1,
PowerManagementMode::Performance => 1,
PowerManagementMode::ThroughputThrottling => 0, // value doesn't matter
PowerManagementMode::None => 0, // value doesn't matter
}
}
fn dtim_period(&self) -> u8 {
match self {
PowerManagementMode::SuperSave => 255,
PowerManagementMode::Aggressive => 1,
PowerManagementMode::PowerSave => 1,
PowerManagementMode::Performance => 1,
PowerManagementMode::ThroughputThrottling => 0, // value doesn't matter
PowerManagementMode::None => 0, // value doesn't matter
}
}
fn assoc(&self) -> u8 {
match self {
PowerManagementMode::SuperSave => 255,
PowerManagementMode::Aggressive => 10,
PowerManagementMode::PowerSave => 10,
PowerManagementMode::Performance => 1,
PowerManagementMode::ThroughputThrottling => 0, // value doesn't matter
PowerManagementMode::None => 0, // value doesn't matter
}
}
fn mode(&self) -> u32 {
match self {
PowerManagementMode::ThroughputThrottling => 1,
PowerManagementMode::None => 0,
_ => 2,
}
}
}
pub type NetDriver<'a> = ch::Device<'a, MTU>;
pub async fn new<'a, PWR, SPI>(
state: &'a mut State,
pwr: PWR,
spi: SPI,
firmware: &[u8],
) -> (NetDriver<'a>, Control<'a>, Runner<'a, PWR, SPI>)
where
PWR: OutputPin,
SPI: SpiBusCyw43,
{
let (ch_runner, device) = ch::new(&mut state.ch, [0; 6]);
let state_ch = ch_runner.state_runner();
let mut runner = Runner::new(ch_runner, Bus::new(pwr, spi), &state.ioctl_state, &state.events);
runner.init(firmware).await;
(
device,
Control::new(state_ch, &state.events, &state.ioctl_state),
runner,
)
}
fn slice8_mut(x: &mut [u32]) -> &mut [u8] {
let len = x.len() * 4;
unsafe { slice::from_raw_parts_mut(x.as_mut_ptr() as _, len) }
}

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macro_rules! nvram {
($($s:literal,)*) => {
concat_bytes!($($s, b"\x00",)* b"\x00\x00")
};
}
pub static NVRAM: &'static [u8] = &*nvram!(
b"NVRAMRev=$Rev$",
b"manfid=0x2d0",
b"prodid=0x0727",
b"vendid=0x14e4",
b"devid=0x43e2",
b"boardtype=0x0887",
b"boardrev=0x1100",
b"boardnum=22",
b"macaddr=00:A0:50:b5:59:5e",
b"sromrev=11",
b"boardflags=0x00404001",
b"boardflags3=0x04000000",
b"xtalfreq=37400",
b"nocrc=1",
b"ag0=255",
b"aa2g=1",
b"ccode=ALL",
b"pa0itssit=0x20",
b"extpagain2g=0",
b"pa2ga0=-168,6649,-778",
b"AvVmid_c0=0x0,0xc8",
b"cckpwroffset0=5",
b"maxp2ga0=84",
b"txpwrbckof=6",
b"cckbw202gpo=0",
b"legofdmbw202gpo=0x66111111",
b"mcsbw202gpo=0x77711111",
b"propbw202gpo=0xdd",
b"ofdmdigfilttype=18",
b"ofdmdigfilttypebe=18",
b"papdmode=1",
b"papdvalidtest=1",
b"pacalidx2g=45",
b"papdepsoffset=-30",
b"papdendidx=58",
b"ltecxmux=0",
b"ltecxpadnum=0x0102",
b"ltecxfnsel=0x44",
b"ltecxgcigpio=0x01",
b"il0macaddr=00:90:4c:c5:12:38",
b"wl0id=0x431b",
b"deadman_to=0xffffffff",
b"muxenab=0x100",
b"spurconfig=0x3",
b"glitch_based_crsmin=1",
b"btc_mode=1",
);

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use embassy_futures::select::{select3, Either3};
use embassy_net_driver_channel as ch;
use embassy_sync::pubsub::PubSubBehavior;
use embassy_time::{block_for, Duration, Timer};
use embedded_hal_1::digital::OutputPin;
use crate::bus::Bus;
pub use crate::bus::SpiBusCyw43;
use crate::consts::*;
use crate::events::{Event, Events, Status};
use crate::fmt::Bytes;
use crate::ioctl::{IoctlState, IoctlType, PendingIoctl};
use crate::nvram::NVRAM;
use crate::structs::*;
use crate::{events, slice8_mut, Core, CHIP, MTU};
#[cfg(feature = "firmware-logs")]
struct LogState {
addr: u32,
last_idx: usize,
buf: [u8; 256],
buf_count: usize,
}
#[cfg(feature = "firmware-logs")]
impl Default for LogState {
fn default() -> Self {
Self {
addr: Default::default(),
last_idx: Default::default(),
buf: [0; 256],
buf_count: Default::default(),
}
}
}
pub struct Runner<'a, PWR, SPI> {
ch: ch::Runner<'a, MTU>,
bus: Bus<PWR, SPI>,
ioctl_state: &'a IoctlState,
ioctl_id: u16,
sdpcm_seq: u8,
sdpcm_seq_max: u8,
events: &'a Events,
#[cfg(feature = "firmware-logs")]
log: LogState,
}
impl<'a, PWR, SPI> Runner<'a, PWR, SPI>
where
PWR: OutputPin,
SPI: SpiBusCyw43,
{
pub(crate) fn new(
ch: ch::Runner<'a, MTU>,
bus: Bus<PWR, SPI>,
ioctl_state: &'a IoctlState,
events: &'a Events,
) -> Self {
Self {
ch,
bus,
ioctl_state,
ioctl_id: 0,
sdpcm_seq: 0,
sdpcm_seq_max: 1,
events,
#[cfg(feature = "firmware-logs")]
log: LogState::default(),
}
}
pub(crate) async fn init(&mut self, firmware: &[u8]) {
self.bus.init().await;
// Init ALP (Active Low Power) clock
self.bus
.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, BACKPLANE_ALP_AVAIL_REQ)
.await;
debug!("waiting for clock...");
while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & BACKPLANE_ALP_AVAIL == 0 {}
debug!("clock ok");
let chip_id = self.bus.bp_read16(0x1800_0000).await;
debug!("chip ID: {}", chip_id);
// Upload firmware.
self.core_disable(Core::WLAN).await;
self.core_reset(Core::SOCSRAM).await;
self.bus.bp_write32(CHIP.socsram_base_address + 0x10, 3).await;
self.bus.bp_write32(CHIP.socsram_base_address + 0x44, 0).await;
let ram_addr = CHIP.atcm_ram_base_address;
debug!("loading fw");
self.bus.bp_write(ram_addr, firmware).await;
debug!("loading nvram");
// Round up to 4 bytes.
let nvram_len = (NVRAM.len() + 3) / 4 * 4;
self.bus
.bp_write(ram_addr + CHIP.chip_ram_size - 4 - nvram_len as u32, NVRAM)
.await;
let nvram_len_words = nvram_len as u32 / 4;
let nvram_len_magic = (!nvram_len_words << 16) | nvram_len_words;
self.bus
.bp_write32(ram_addr + CHIP.chip_ram_size - 4, nvram_len_magic)
.await;
// Start core!
debug!("starting up core...");
self.core_reset(Core::WLAN).await;
assert!(self.core_is_up(Core::WLAN).await);
while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {}
// "Set up the interrupt mask and enable interrupts"
// self.bus.bp_write32(CHIP.sdiod_core_base_address + 0x24, 0xF0).await;
self.bus
.write16(FUNC_BUS, REG_BUS_INTERRUPT_ENABLE, IRQ_F2_PACKET_AVAILABLE)
.await;
// "Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped."
// Sounds scary...
self.bus
.write8(FUNC_BACKPLANE, REG_BACKPLANE_FUNCTION2_WATERMARK, 32)
.await;
// wait for wifi startup
debug!("waiting for wifi init...");
while self.bus.read32(FUNC_BUS, REG_BUS_STATUS).await & STATUS_F2_RX_READY == 0 {}
// Some random configs related to sleep.
// These aren't needed if we don't want to sleep the bus.
// TODO do we need to sleep the bus to read the irq line, due to
// being on the same pin as MOSI/MISO?
/*
let mut val = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL).await;
val |= 0x02; // WAKE_TILL_HT_AVAIL
self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_WAKEUP_CTRL, val).await;
self.bus.write8(FUNC_BUS, 0xF0, 0x08).await; // SDIOD_CCCR_BRCM_CARDCAP.CMD_NODEC = 1
self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x02).await; // SBSDIO_FORCE_HT
let mut val = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR).await;
val |= 0x01; // SBSDIO_SLPCSR_KEEP_SDIO_ON
self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_SLEEP_CSR, val).await;
*/
// clear pulls
self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP, 0).await;
let _ = self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_PULL_UP).await;
// start HT clock
//self.bus.write8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR, 0x10).await;
//debug!("waiting for HT clock...");
//while self.bus.read8(FUNC_BACKPLANE, REG_BACKPLANE_CHIP_CLOCK_CSR).await & 0x80 == 0 {}
//debug!("clock ok");
#[cfg(feature = "firmware-logs")]
self.log_init().await;
debug!("wifi init done");
}
#[cfg(feature = "firmware-logs")]
async fn log_init(&mut self) {
// Initialize shared memory for logging.
let addr = CHIP.atcm_ram_base_address + CHIP.chip_ram_size - 4 - CHIP.socram_srmem_size;
let shared_addr = self.bus.bp_read32(addr).await;
debug!("shared_addr {:08x}", shared_addr);
let mut shared = [0; SharedMemData::SIZE];
self.bus.bp_read(shared_addr, &mut shared).await;
let shared = SharedMemData::from_bytes(&shared);
self.log.addr = shared.console_addr + 8;
}
#[cfg(feature = "firmware-logs")]
async fn log_read(&mut self) {
// Read log struct
let mut log = [0; SharedMemLog::SIZE];
self.bus.bp_read(self.log.addr, &mut log).await;
let log = SharedMemLog::from_bytes(&log);
let idx = log.idx as usize;
// If pointer hasn't moved, no need to do anything.
if idx == self.log.last_idx {
return;
}
// Read entire buf for now. We could read only what we need, but then we
// run into annoying alignment issues in `bp_read`.
let mut buf = [0; 0x400];
self.bus.bp_read(log.buf, &mut buf).await;
while self.log.last_idx != idx as usize {
let b = buf[self.log.last_idx];
if b == b'\r' || b == b'\n' {
if self.log.buf_count != 0 {
let s = unsafe { core::str::from_utf8_unchecked(&self.log.buf[..self.log.buf_count]) };
debug!("LOGS: {}", s);
self.log.buf_count = 0;
}
} else if self.log.buf_count < self.log.buf.len() {
self.log.buf[self.log.buf_count] = b;
self.log.buf_count += 1;
}
self.log.last_idx += 1;
if self.log.last_idx == 0x400 {
self.log.last_idx = 0;
}
}
}
pub async fn run(mut self) -> ! {
let mut buf = [0; 512];
loop {
#[cfg(feature = "firmware-logs")]
self.log_read().await;
if self.has_credit() {
let ioctl = self.ioctl_state.wait_pending();
let tx = self.ch.tx_buf();
let ev = self.bus.wait_for_event();
match select3(ioctl, tx, ev).await {
Either3::First(PendingIoctl {
buf: iobuf,
kind,
cmd,
iface,
}) => {
self.send_ioctl(kind, cmd, iface, unsafe { &*iobuf }).await;
self.check_status(&mut buf).await;
}
Either3::Second(packet) => {
trace!("tx pkt {:02x}", Bytes(&packet[..packet.len().min(48)]));
let mut buf = [0; 512];
let buf8 = slice8_mut(&mut buf);
// There MUST be 2 bytes of padding between the SDPCM and BDC headers.
// And ONLY for data packets!
// No idea why, but the firmware will append two zero bytes to the tx'd packets
// otherwise. If the packet is exactly 1514 bytes (the max MTU), this makes it
// be oversized and get dropped.
// WHD adds it here https://github.com/Infineon/wifi-host-driver/blob/c04fcbb6b0d049304f376cf483fd7b1b570c8cd5/WiFi_Host_Driver/src/include/whd_sdpcm.h#L90
// and adds it to the header size her https://github.com/Infineon/wifi-host-driver/blob/c04fcbb6b0d049304f376cf483fd7b1b570c8cd5/WiFi_Host_Driver/src/whd_sdpcm.c#L597
// ¯\_(ツ)_/¯
const PADDING_SIZE: usize = 2;
let total_len = SdpcmHeader::SIZE + PADDING_SIZE + BdcHeader::SIZE + packet.len();
let seq = self.sdpcm_seq;
self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1);
let sdpcm_header = SdpcmHeader {
len: total_len as u16, // TODO does this len need to be rounded up to u32?
len_inv: !total_len as u16,
sequence: seq,
channel_and_flags: CHANNEL_TYPE_DATA,
next_length: 0,
header_length: (SdpcmHeader::SIZE + PADDING_SIZE) as _,
wireless_flow_control: 0,
bus_data_credit: 0,
reserved: [0, 0],
};
let bdc_header = BdcHeader {
flags: BDC_VERSION << BDC_VERSION_SHIFT,
priority: 0,
flags2: 0,
data_offset: 0,
};
trace!("tx {:?}", sdpcm_header);
trace!(" {:?}", bdc_header);
buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes());
buf8[SdpcmHeader::SIZE + PADDING_SIZE..][..BdcHeader::SIZE]
.copy_from_slice(&bdc_header.to_bytes());
buf8[SdpcmHeader::SIZE + PADDING_SIZE + BdcHeader::SIZE..][..packet.len()]
.copy_from_slice(packet);
let total_len = (total_len + 3) & !3; // round up to 4byte
trace!(" {:02x}", Bytes(&buf8[..total_len.min(48)]));
self.bus.wlan_write(&buf[..(total_len / 4)]).await;
self.ch.tx_done();
self.check_status(&mut buf).await;
}
Either3::Third(()) => {
self.handle_irq(&mut buf).await;
}
}
} else {
warn!("TX stalled");
self.bus.wait_for_event().await;
self.handle_irq(&mut buf).await;
}
}
}
/// Wait for IRQ on F2 packet available
async fn handle_irq(&mut self, buf: &mut [u32; 512]) {
// Receive stuff
let irq = self.bus.read16(FUNC_BUS, REG_BUS_INTERRUPT).await;
trace!("irq{}", FormatInterrupt(irq));
if irq & IRQ_F2_PACKET_AVAILABLE != 0 {
self.check_status(buf).await;
}
if irq & IRQ_DATA_UNAVAILABLE != 0 {
// TODO what should we do here?
warn!("IRQ DATA_UNAVAILABLE, clearing...");
self.bus.write16(FUNC_BUS, REG_BUS_INTERRUPT, 1).await;
}
}
/// Handle F2 events while status register is set
async fn check_status(&mut self, buf: &mut [u32; 512]) {
loop {
let status = self.bus.status();
trace!("check status{}", FormatStatus(status));
if status & STATUS_F2_PKT_AVAILABLE != 0 {
let len = (status & STATUS_F2_PKT_LEN_MASK) >> STATUS_F2_PKT_LEN_SHIFT;
self.bus.wlan_read(buf, len).await;
trace!("rx {:02x}", Bytes(&slice8_mut(buf)[..(len as usize).min(48)]));
self.rx(&mut slice8_mut(buf)[..len as usize]);
} else {
break;
}
}
}
fn rx(&mut self, packet: &mut [u8]) {
let Some((sdpcm_header, payload)) = SdpcmHeader::parse(packet) else { return };
self.update_credit(&sdpcm_header);
let channel = sdpcm_header.channel_and_flags & 0x0f;
match channel {
CHANNEL_TYPE_CONTROL => {
let Some((cdc_header, response)) = CdcHeader::parse(payload) else { return; };
trace!(" {:?}", cdc_header);
if cdc_header.id == self.ioctl_id {
if cdc_header.status != 0 {
// TODO: propagate error instead
panic!("IOCTL error {}", cdc_header.status as i32);
}
self.ioctl_state.ioctl_done(response);
}
}
CHANNEL_TYPE_EVENT => {
let Some((_, bdc_packet)) = BdcHeader::parse(payload) else {
warn!("BDC event, incomplete header");
return;
};
let Some((event_packet, evt_data)) = EventPacket::parse(bdc_packet) else {
warn!("BDC event, incomplete data");
return;
};
const ETH_P_LINK_CTL: u16 = 0x886c; // HPNA, wlan link local tunnel, according to linux if_ether.h
if event_packet.eth.ether_type != ETH_P_LINK_CTL {
warn!(
"unexpected ethernet type 0x{:04x}, expected Broadcom ether type 0x{:04x}",
event_packet.eth.ether_type, ETH_P_LINK_CTL
);
return;
}
const BROADCOM_OUI: &[u8] = &[0x00, 0x10, 0x18];
if event_packet.hdr.oui != BROADCOM_OUI {
warn!(
"unexpected ethernet OUI {:02x}, expected Broadcom OUI {:02x}",
Bytes(&event_packet.hdr.oui),
Bytes(BROADCOM_OUI)
);
return;
}
const BCMILCP_SUBTYPE_VENDOR_LONG: u16 = 32769;
if event_packet.hdr.subtype != BCMILCP_SUBTYPE_VENDOR_LONG {
warn!("unexpected subtype {}", event_packet.hdr.subtype);
return;
}
const BCMILCP_BCM_SUBTYPE_EVENT: u16 = 1;
if event_packet.hdr.user_subtype != BCMILCP_BCM_SUBTYPE_EVENT {
warn!("unexpected user_subtype {}", event_packet.hdr.subtype);
return;
}
let evt_type = events::Event::from(event_packet.msg.event_type as u8);
debug!(
"=== EVENT {:?}: {:?} {:02x}",
evt_type,
event_packet.msg,
Bytes(evt_data)
);
if self.events.mask.is_enabled(evt_type) {
let status = event_packet.msg.status;
let event_payload = match evt_type {
Event::ESCAN_RESULT if status == EStatus::PARTIAL => {
let Some((_, bss_info)) = ScanResults::parse(evt_data) else { return };
let Some(bss_info) = BssInfo::parse(bss_info) else { return };
events::Payload::BssInfo(*bss_info)
}
Event::ESCAN_RESULT => events::Payload::None,
_ => events::Payload::None,
};
// this intentionally uses the non-blocking publish immediate
// publish() is a deadlock risk in the current design as awaiting here prevents ioctls
// The `Runner` always yields when accessing the device, so consumers always have a chance to receive the event
// (if they are actively awaiting the queue)
self.events.queue.publish_immediate(events::Message::new(
Status {
event_type: evt_type,
status,
},
event_payload,
));
}
}
CHANNEL_TYPE_DATA => {
let Some((_, packet)) = BdcHeader::parse(payload) else { return };
trace!("rx pkt {:02x}", Bytes(&packet[..packet.len().min(48)]));
match self.ch.try_rx_buf() {
Some(buf) => {
buf[..packet.len()].copy_from_slice(packet);
self.ch.rx_done(packet.len())
}
None => warn!("failed to push rxd packet to the channel."),
}
}
_ => {}
}
}
fn update_credit(&mut self, sdpcm_header: &SdpcmHeader) {
if sdpcm_header.channel_and_flags & 0xf < 3 {
let mut sdpcm_seq_max = sdpcm_header.bus_data_credit;
if sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) > 0x40 {
sdpcm_seq_max = self.sdpcm_seq + 2;
}
self.sdpcm_seq_max = sdpcm_seq_max;
}
}
fn has_credit(&self) -> bool {
self.sdpcm_seq != self.sdpcm_seq_max && self.sdpcm_seq_max.wrapping_sub(self.sdpcm_seq) & 0x80 == 0
}
async fn send_ioctl(&mut self, kind: IoctlType, cmd: u32, iface: u32, data: &[u8]) {
let mut buf = [0; 512];
let buf8 = slice8_mut(&mut buf);
let total_len = SdpcmHeader::SIZE + CdcHeader::SIZE + data.len();
let sdpcm_seq = self.sdpcm_seq;
self.sdpcm_seq = self.sdpcm_seq.wrapping_add(1);
self.ioctl_id = self.ioctl_id.wrapping_add(1);
let sdpcm_header = SdpcmHeader {
len: total_len as u16, // TODO does this len need to be rounded up to u32?
len_inv: !total_len as u16,
sequence: sdpcm_seq,
channel_and_flags: CHANNEL_TYPE_CONTROL,
next_length: 0,
header_length: SdpcmHeader::SIZE as _,
wireless_flow_control: 0,
bus_data_credit: 0,
reserved: [0, 0],
};
let cdc_header = CdcHeader {
cmd: cmd,
len: data.len() as _,
flags: kind as u16 | (iface as u16) << 12,
id: self.ioctl_id,
status: 0,
};
trace!("tx {:?}", sdpcm_header);
trace!(" {:?}", cdc_header);
buf8[0..SdpcmHeader::SIZE].copy_from_slice(&sdpcm_header.to_bytes());
buf8[SdpcmHeader::SIZE..][..CdcHeader::SIZE].copy_from_slice(&cdc_header.to_bytes());
buf8[SdpcmHeader::SIZE + CdcHeader::SIZE..][..data.len()].copy_from_slice(data);
let total_len = (total_len + 3) & !3; // round up to 4byte
trace!(" {:02x}", Bytes(&buf8[..total_len.min(48)]));
self.bus.wlan_write(&buf[..total_len / 4]).await;
}
async fn core_disable(&mut self, core: Core) {
let base = core.base_addr();
// Dummy read?
let _ = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await;
// Check it isn't already reset
let r = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await;
if r & AI_RESETCTRL_BIT_RESET != 0 {
return;
}
self.bus.bp_write8(base + AI_IOCTRL_OFFSET, 0).await;
let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await;
block_for(Duration::from_millis(1));
self.bus
.bp_write8(base + AI_RESETCTRL_OFFSET, AI_RESETCTRL_BIT_RESET)
.await;
let _ = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await;
}
async fn core_reset(&mut self, core: Core) {
self.core_disable(core).await;
let base = core.base_addr();
self.bus
.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN)
.await;
let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await;
self.bus.bp_write8(base + AI_RESETCTRL_OFFSET, 0).await;
Timer::after(Duration::from_millis(1)).await;
self.bus
.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN)
.await;
let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await;
Timer::after(Duration::from_millis(1)).await;
}
async fn core_is_up(&mut self, core: Core) -> bool {
let base = core.base_addr();
let io = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await;
if io & (AI_IOCTRL_BIT_FGC | AI_IOCTRL_BIT_CLOCK_EN) != AI_IOCTRL_BIT_CLOCK_EN {
debug!("core_is_up: returning false due to bad ioctrl {:02x}", io);
return false;
}
let r = self.bus.bp_read8(base + AI_RESETCTRL_OFFSET).await;
if r & (AI_RESETCTRL_BIT_RESET) != 0 {
debug!("core_is_up: returning false due to bad resetctrl {:02x}", r);
return false;
}
true
}
}

496
cyw43/src/structs.rs Normal file
View File

@ -0,0 +1,496 @@
use crate::events::Event;
use crate::fmt::Bytes;
macro_rules! impl_bytes {
($t:ident) => {
impl $t {
pub const SIZE: usize = core::mem::size_of::<Self>();
#[allow(unused)]
pub fn to_bytes(&self) -> [u8; Self::SIZE] {
unsafe { core::mem::transmute(*self) }
}
#[allow(unused)]
pub fn from_bytes(bytes: &[u8; Self::SIZE]) -> &Self {
let alignment = core::mem::align_of::<Self>();
assert_eq!(
bytes.as_ptr().align_offset(alignment),
0,
"{} is not aligned",
core::any::type_name::<Self>()
);
unsafe { core::mem::transmute(bytes) }
}
#[allow(unused)]
pub fn from_bytes_mut(bytes: &mut [u8; Self::SIZE]) -> &mut Self {
let alignment = core::mem::align_of::<Self>();
assert_eq!(
bytes.as_ptr().align_offset(alignment),
0,
"{} is not aligned",
core::any::type_name::<Self>()
);
unsafe { core::mem::transmute(bytes) }
}
}
};
}
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct SharedMemData {
pub flags: u32,
pub trap_addr: u32,
pub assert_exp_addr: u32,
pub assert_file_addr: u32,
pub assert_line: u32,
pub console_addr: u32,
pub msgtrace_addr: u32,
pub fwid: u32,
}
impl_bytes!(SharedMemData);
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct SharedMemLog {
pub buf: u32,
pub buf_size: u32,
pub idx: u32,
pub out_idx: u32,
}
impl_bytes!(SharedMemLog);
#[derive(Debug, Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct SdpcmHeader {
pub len: u16,
pub len_inv: u16,
/// Rx/Tx sequence number
pub sequence: u8,
/// 4 MSB Channel number, 4 LSB arbitrary flag
pub channel_and_flags: u8,
/// Length of next data frame, reserved for Tx
pub next_length: u8,
/// Data offset
pub header_length: u8,
/// Flow control bits, reserved for Tx
pub wireless_flow_control: u8,
/// Maximum Sequence number allowed by firmware for Tx
pub bus_data_credit: u8,
/// Reserved
pub reserved: [u8; 2],
}
impl_bytes!(SdpcmHeader);
impl SdpcmHeader {
pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> {
let packet_len = packet.len();
if packet_len < Self::SIZE {
warn!("packet too short, len={}", packet.len());
return None;
}
let (sdpcm_header, sdpcm_packet) = packet.split_at_mut(Self::SIZE);
let sdpcm_header = Self::from_bytes_mut(sdpcm_header.try_into().unwrap());
trace!("rx {:?}", sdpcm_header);
if sdpcm_header.len != !sdpcm_header.len_inv {
warn!("len inv mismatch");
return None;
}
if sdpcm_header.len as usize != packet_len {
warn!("len from header doesn't match len from spi");
return None;
}
let sdpcm_packet = &mut sdpcm_packet[(sdpcm_header.header_length as usize - Self::SIZE)..];
Some((sdpcm_header, sdpcm_packet))
}
}
#[derive(Debug, Clone, Copy)]
#[repr(C, packed(2))]
pub struct CdcHeader {
pub cmd: u32,
pub len: u32,
pub flags: u16,
pub id: u16,
pub status: u32,
}
impl_bytes!(CdcHeader);
#[cfg(feature = "defmt")]
impl defmt::Format for CdcHeader {
fn format(&self, fmt: defmt::Formatter) {
fn copy<T: Copy>(t: T) -> T {
t
}
defmt::write!(
fmt,
"CdcHeader{{cmd: {=u32:08x}, len: {=u32:08x}, flags: {=u16:04x}, id: {=u16:04x}, status: {=u32:08x}}}",
copy(self.cmd),
copy(self.len),
copy(self.flags),
copy(self.id),
copy(self.status),
)
}
}
impl CdcHeader {
pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> {
if packet.len() < Self::SIZE {
warn!("payload too short, len={}", packet.len());
return None;
}
let (cdc_header, payload) = packet.split_at_mut(Self::SIZE);
let cdc_header = Self::from_bytes_mut(cdc_header.try_into().unwrap());
let payload = &mut payload[..cdc_header.len as usize];
Some((cdc_header, payload))
}
}
pub const BDC_VERSION: u8 = 2;
pub const BDC_VERSION_SHIFT: u8 = 4;
#[derive(Debug, Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct BdcHeader {
pub flags: u8,
/// 802.1d Priority (low 3 bits)
pub priority: u8,
pub flags2: u8,
/// Offset from end of BDC header to packet data, in 4-uint8_t words. Leaves room for optional headers.
pub data_offset: u8,
}
impl_bytes!(BdcHeader);
impl BdcHeader {
pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> {
if packet.len() < Self::SIZE {
return None;
}
let (bdc_header, bdc_packet) = packet.split_at_mut(Self::SIZE);
let bdc_header = Self::from_bytes_mut(bdc_header.try_into().unwrap());
trace!(" {:?}", bdc_header);
let packet_start = 4 * bdc_header.data_offset as usize;
let bdc_packet = bdc_packet.get_mut(packet_start..)?;
trace!(" {:02x}", Bytes(&bdc_packet[..bdc_packet.len().min(36)]));
Some((bdc_header, bdc_packet))
}
}
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct EthernetHeader {
pub destination_mac: [u8; 6],
pub source_mac: [u8; 6],
pub ether_type: u16,
}
impl EthernetHeader {
pub fn byteswap(&mut self) {
self.ether_type = self.ether_type.to_be();
}
}
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct EventHeader {
pub subtype: u16,
pub length: u16,
pub version: u8,
pub oui: [u8; 3],
pub user_subtype: u16,
}
impl EventHeader {
pub fn byteswap(&mut self) {
self.subtype = self.subtype.to_be();
self.length = self.length.to_be();
self.user_subtype = self.user_subtype.to_be();
}
}
#[derive(Debug, Clone, Copy)]
// #[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C, packed(2))]
pub struct EventMessage {
/// version
pub version: u16,
/// see flags below
pub flags: u16,
/// Message (see below)
pub event_type: u32,
/// Status code (see below)
pub status: u32,
/// Reason code (if applicable)
pub reason: u32,
/// WLC_E_AUTH
pub auth_type: u32,
/// data buf
pub datalen: u32,
/// Station address (if applicable)
pub addr: [u8; 6],
/// name of the incoming packet interface
pub ifname: [u8; 16],
/// destination OS i/f index
pub ifidx: u8,
/// source bsscfg index
pub bsscfgidx: u8,
}
impl_bytes!(EventMessage);
#[cfg(feature = "defmt")]
impl defmt::Format for EventMessage {
fn format(&self, fmt: defmt::Formatter) {
let event_type = self.event_type;
let status = self.status;
let reason = self.reason;
let auth_type = self.auth_type;
let datalen = self.datalen;
defmt::write!(
fmt,
"EventMessage {{ \
version: {=u16}, \
flags: {=u16}, \
event_type: {=u32}, \
status: {=u32}, \
reason: {=u32}, \
auth_type: {=u32}, \
datalen: {=u32}, \
addr: {=[u8; 6]:x}, \
ifname: {=[u8; 16]:x}, \
ifidx: {=u8}, \
bsscfgidx: {=u8}, \
}} ",
self.version,
self.flags,
event_type,
status,
reason,
auth_type,
datalen,
self.addr,
self.ifname,
self.ifidx,
self.bsscfgidx
);
}
}
impl EventMessage {
pub fn byteswap(&mut self) {
self.version = self.version.to_be();
self.flags = self.flags.to_be();
self.event_type = self.event_type.to_be();
self.status = self.status.to_be();
self.reason = self.reason.to_be();
self.auth_type = self.auth_type.to_be();
self.datalen = self.datalen.to_be();
}
}
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C, packed(2))]
pub struct EventPacket {
pub eth: EthernetHeader,
pub hdr: EventHeader,
pub msg: EventMessage,
}
impl_bytes!(EventPacket);
impl EventPacket {
pub fn parse(packet: &mut [u8]) -> Option<(&mut Self, &mut [u8])> {
if packet.len() < Self::SIZE {
return None;
}
let (event_header, event_packet) = packet.split_at_mut(Self::SIZE);
let event_header = Self::from_bytes_mut(event_header.try_into().unwrap());
// warn!("event_header {:x}", event_header as *const _);
event_header.byteswap();
let event_packet = event_packet.get_mut(..event_header.msg.datalen as usize)?;
Some((event_header, event_packet))
}
pub fn byteswap(&mut self) {
self.eth.byteswap();
self.hdr.byteswap();
self.msg.byteswap();
}
}
#[derive(Clone, Copy)]
#[repr(C)]
pub struct DownloadHeader {
pub flag: u16, //
pub dload_type: u16,
pub len: u32,
pub crc: u32,
}
impl_bytes!(DownloadHeader);
#[allow(unused)]
pub const DOWNLOAD_FLAG_NO_CRC: u16 = 0x0001;
pub const DOWNLOAD_FLAG_BEGIN: u16 = 0x0002;
pub const DOWNLOAD_FLAG_END: u16 = 0x0004;
pub const DOWNLOAD_FLAG_HANDLER_VER: u16 = 0x1000;
// Country Locale Matrix (CLM)
pub const DOWNLOAD_TYPE_CLM: u16 = 2;
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct CountryInfo {
pub country_abbrev: [u8; 4],
pub rev: i32,
pub country_code: [u8; 4],
}
impl_bytes!(CountryInfo);
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct SsidInfo {
pub len: u32,
pub ssid: [u8; 32],
}
impl_bytes!(SsidInfo);
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct PassphraseInfo {
pub len: u16,
pub flags: u16,
pub passphrase: [u8; 64],
}
impl_bytes!(PassphraseInfo);
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct SsidInfoWithIndex {
pub index: u32,
pub ssid_info: SsidInfo,
}
impl_bytes!(SsidInfoWithIndex);
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct EventMask {
pub iface: u32,
pub events: [u8; 24],
}
impl_bytes!(EventMask);
impl EventMask {
pub fn unset(&mut self, evt: Event) {
let evt = evt as u8 as usize;
self.events[evt / 8] &= !(1 << (evt % 8));
}
}
/// Parameters for a wifi scan
#[derive(Clone, Copy)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C)]
pub struct ScanParams {
pub version: u32,
pub action: u16,
pub sync_id: u16,
pub ssid_len: u32,
pub ssid: [u8; 32],
pub bssid: [u8; 6],
pub bss_type: u8,
pub scan_type: u8,
pub nprobes: u32,
pub active_time: u32,
pub passive_time: u32,
pub home_time: u32,
pub channel_num: u32,
pub channel_list: [u16; 1],
}
impl_bytes!(ScanParams);
/// Wifi Scan Results Header, followed by `bss_count` `BssInfo`
#[derive(Clone, Copy)]
// #[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C, packed(2))]
pub struct ScanResults {
pub buflen: u32,
pub version: u32,
pub sync_id: u16,
pub bss_count: u16,
}
impl_bytes!(ScanResults);
impl ScanResults {
pub fn parse(packet: &mut [u8]) -> Option<(&mut ScanResults, &mut [u8])> {
if packet.len() < ScanResults::SIZE {
return None;
}
let (scan_results, bssinfo) = packet.split_at_mut(ScanResults::SIZE);
let scan_results = ScanResults::from_bytes_mut(scan_results.try_into().unwrap());
if scan_results.bss_count > 0 && bssinfo.len() < BssInfo::SIZE {
warn!("Scan result, incomplete BssInfo");
return None;
}
Some((scan_results, bssinfo))
}
}
/// Wifi Scan Result
#[derive(Clone, Copy)]
// #[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(C, packed(2))]
#[non_exhaustive]
pub struct BssInfo {
pub version: u32,
pub length: u32,
pub bssid: [u8; 6],
pub beacon_period: u16,
pub capability: u16,
pub ssid_len: u8,
pub ssid: [u8; 32],
// there will be more stuff here
}
impl_bytes!(BssInfo);
impl BssInfo {
pub fn parse(packet: &mut [u8]) -> Option<&mut Self> {
if packet.len() < BssInfo::SIZE {
return None;
}
Some(BssInfo::from_bytes_mut(
packet[..BssInfo::SIZE].as_mut().try_into().unwrap(),
))
}
}

View File

@ -6,7 +6,7 @@ version = "0.1.0"
license = "MIT OR Apache-2.0"
[dependencies]
embassy-executor = { version = "0.1.0", path = "../../../../../embassy-executor", features = ["defmt", "nightly", "integrated-timers"] }
embassy-executor = { version = "0.2.0", path = "../../../../../embassy-executor", features = ["defmt", "nightly", "integrated-timers", "arch-cortex-m", "executor-thread"] }
embassy-time = { version = "0.1.0", path = "../../../../../embassy-time", features = ["defmt", "nightly"] }
embassy-nrf = { version = "0.1.0", path = "../../../../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "nightly"] }

View File

@ -10,7 +10,6 @@ members = [
[patch.crates-io]
embassy-executor = { path = "../../../../../embassy-executor" }
embassy-stm32 = { path = "../../../../../embassy-stm32" }
stm32-metapac = { path = "../../../../../stm32-metapac" }
[profile.release]
codegen-units = 1

View File

@ -7,8 +7,8 @@ license = "MIT OR Apache-2.0"
[dependencies]
cortex-m = "0.7"
cortex-m-rt = "0.7"
embassy-stm32 = { version = "0.1.0", features = ["stm32l475vg", "memory-x", "exti"], default-features = false }
embassy-executor = { version = "0.1.0", default-features = false, features = ["nightly"] }
embassy-stm32 = { version = "0.1.0", features = ["stm32l475vg", "memory-x", "exti"] }
embassy-executor = { version = "0.2.0", features = ["nightly", "arch-cortex-m", "executor-thread"] }
defmt = "0.3.0"
defmt-rtt = "0.3.0"

View File

@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
[dependencies]
cortex-m = "0.7"
cortex-m-rt = "0.7"
embassy-stm32 = { version = "0.1.0", features = ["stm32l475vg", "memory-x"], default-features = false }
embassy-stm32 = { version = "0.1.0", features = ["stm32l475vg", "memory-x"] }
defmt = "0.3.0"
defmt-rtt = "0.3.0"

View File

@ -20,13 +20,13 @@ fn main() -> ! {
let led = Output::new(p.PB14, Level::Low, Speed::Low);
let mut button = Input::new(p.PC13, Pull::Up);
cortex_m::interrupt::free(|cs| unsafe {
cortex_m::interrupt::free(|cs| {
enable_interrupt(&mut button);
LED.borrow(cs).borrow_mut().replace(led);
BUTTON.borrow(cs).borrow_mut().replace(button);
NVIC::unmask(pac::Interrupt::EXTI15_10);
unsafe { NVIC::unmask(pac::Interrupt::EXTI15_10) };
});
loop {
@ -64,25 +64,21 @@ const PORT: u8 = 2;
const PIN: usize = 13;
fn check_interrupt<P: Pin>(_pin: &mut Input<'static, P>) -> bool {
let exti = pac::EXTI;
unsafe {
let pin = PIN;
let lines = exti.pr(0).read();
lines.line(pin)
}
let pin = PIN;
let lines = exti.pr(0).read();
lines.line(pin)
}
fn clear_interrupt<P: Pin>(_pin: &mut Input<'static, P>) {
let exti = pac::EXTI;
unsafe {
let pin = PIN;
let mut lines = exti.pr(0).read();
lines.set_line(pin, true);
exti.pr(0).write_value(lines);
}
let pin = PIN;
let mut lines = exti.pr(0).read();
lines.set_line(pin, true);
exti.pr(0).write_value(lines);
}
fn enable_interrupt<P: Pin>(_pin: &mut Input<'static, P>) {
cortex_m::interrupt::free(|_| unsafe {
cortex_m::interrupt::free(|_| {
let rcc = pac::RCC;
rcc.apb2enr().modify(|w| w.set_syscfgen(true));

View File

@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0"
[dependencies]
cortex-m = "0.7"
cortex-m-rt = "0.7"
stm32-metapac = { version = "0.1.0", features = ["stm32l475vg", "memory-x"] }
stm32-metapac = { version = "1", features = ["stm32l475vg", "memory-x"] }
defmt = "0.3.0"
defmt-rtt = "0.3.0"

View File

@ -6,7 +6,7 @@ The bootloader can be used either as a library or be flashed directly if you are
By design, the bootloader does not provide any network capabilities. Networking capabilities for fetching new firmware can be provided by the user application, using the bootloader as a library for updating the firmware, or by using the bootloader as a library and adding this capability yourself.
The bootloader supports both internal and external flash by relying on the `embedded-storage` traits.
The bootloader supports both internal and external flash by relying on the `embedded-storage` traits. The bootloader optionally supports the verification of firmware that has been digitally signed (recommended).
== Hardware support
@ -15,6 +15,7 @@ The bootloader supports
* nRF52 with and without softdevice
* STM32 L4, WB, WL, L1, L0, F3, F7 and H7
* Raspberry Pi: RP2040
In general, the bootloader works on any platform that implements the `embedded-storage` traits for its internal flash, but may require custom initialization code to work.
@ -43,3 +44,51 @@ The partitions for ACTIVE (+BOOTLOADER), DFU and BOOTLOADER_STATE may be placed
The BOOTLOADER_STATE partition must be big enough to store one word per page in the ACTIVE and DFU partitions combined.
The bootloader has a platform-agnostic part, which implements the power fail safe swapping algorithm given the boundaries set by the partitions. The platform-specific part is a minimal shim that provides additional functionality such as watchdogs or supporting the nRF52 softdevice.
=== FirmwareUpdater
The `FirmwareUpdater` is an object for conveniently flashing firmware to the DFU partition and subsequently marking it as being ready for swapping with the active partition on the next reset. Its principle methods are `write_firmware`, which is called once per the size of the flash "write block" (typically 4KiB), and `mark_updated`, which is the final call.
=== Verification
The bootloader supports the verification of firmware that has been flashed to the DFU partition. Verification requires that firmware has been signed digitally using link:https://ed25519.cr.yp.to/[`ed25519`] signatures. With verification enabled, the `FirmwareUpdater::verify_and_mark_updated` method is called in place of `mark_updated`. A public key and signature are required, along with the actual length of the firmware that has been flashed. If verification fails then the firmware will not be marked as updated and therefore be rejected.
Signatures are normally conveyed with the firmware to be updated and not written to flash. How signatures are provided is a firmware responsibility.
To enable verification use either the `ed25519-dalek` or `ed25519-salty` features when depending on the `embassy-boot` crate. We recommend `ed25519-salty` at this time due to its small size.
==== Tips on keys and signing with ed25519
Ed25519 is a public key signature system where you are responsible for keeping the private key secure. We recommend embedding the *public* key in your program so that it can be easily passed to `verify_and_mark_updated`. An example declaration of the public key in your firmware:
[source, rust]
----
static PUBLIC_SIGNING_KEY: &[u8] = include_bytes!("key.pub");
----
Signatures are often conveyed along with firmware by appending them.
Ed25519 keys can be generated by a variety of tools. We recommend link:https://man.openbsd.org/signify[`signify`] as it is in wide use to sign and verify OpenBSD distributions, and is straightforward to use.
The following set of Bash commands can be used to generate public and private keys on Unix platforms, and also generate a local `key.pub` file with the `signify` file headers removed. Declare a `SECRETS_DIR` environment variable in a secure location.
[source, bash]
----
signify -G -n -p $SECRETS_DIR/key.pub -s $SECRETS_DIR/key.sec
tail -n1 $SECRETS_DIR/key.pub | base64 -d -i - | dd ibs=10 skip=1 > key.pub
chmod 700 $SECRETS_DIR/key.sec
export SECRET_SIGNING_KEY=$(tail -n1 $SECRETS_DIR/key.sec)
----
Then, to sign your firmware given a declaration of `FIRMWARE_DIR` and a firmware filename of `myfirmware`:
[source, bash]
----
shasum -a 512 -b $FIRMWARE_DIR/myfirmware > $SECRETS_DIR/message.txt
cat $SECRETS_DIR/message.txt | dd ibs=128 count=1 | xxd -p -r > $SECRETS_DIR/message.txt
signify -S -s $SECRETS_DIR/key.sec -m $SECRETS_DIR/message.txt -x $SECRETS_DIR/message.txt.sig
cp $FIRMWARE_DIR/myfirmware $FIRMWARE_DIR/myfirmware+signed
tail -n1 $SECRETS_DIR/message.txt.sig | base64 -d -i - | dd ibs=10 skip=1 >> $FIRMWARE_DIR/myfirmware+signed
----
Remember, guard the `$SECRETS_DIR/key.sec` key as compromising it means that another party can sign your firmware.

View File

@ -45,11 +45,11 @@ You can run an example by opening a terminal and entering the following commands
[source, bash]
----
cd examples/nrf
cd examples/nrf52840
cargo run --bin blinky --release
----
== Whats next?
== What's next?
Congratulations, you have your first Embassy application running! Here are some alternatives on where to go from here:

View File

@ -1,26 +1,56 @@
[package]
edition = "2021"
name = "embassy-boot"
version = "0.1.0"
description = "Bootloader using Embassy"
version = "0.1.1"
description = "A lightweight bootloader supporting firmware updates in a power-fail-safe way, with trial boots and rollbacks."
license = "MIT OR Apache-2.0"
repository = "https://github.com/embassy-rs/embassy"
categories = [
"embedded",
"no-std",
"asynchronous",
]
[package.metadata.embassy_docs]
src_base = "https://github.com/embassy-rs/embassy/blob/embassy-boot-v$VERSION/embassy-boot/boot/src/"
src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-boot/boot/src/"
target = "thumbv7em-none-eabi"
features = ["defmt"]
[package.metadata.docs.rs]
features = ["defmt"]
[lib]
[dependencies]
defmt = { version = "0.3", optional = true }
digest = "0.10"
log = { version = "0.4", optional = true }
embassy-sync = { version = "0.1.0", path = "../../embassy-sync" }
ed25519-dalek = { version = "1.0.1", default_features = false, features = ["u32_backend"], optional = true }
embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" }
embassy-sync = { version = "0.2.0", path = "../../embassy-sync" }
embedded-storage = "0.3.0"
embedded-storage-async = "0.3.0"
embedded-storage-async = { version = "0.4.0", optional = true }
salty = { git = "https://github.com/ycrypto/salty.git", rev = "a9f17911a5024698406b75c0fac56ab5ccf6a8c7", optional = true }
signature = { version = "1.6.4", default-features = false }
[dev-dependencies]
log = "0.4"
env_logger = "0.9"
rand = "0.8"
rand = "0.7" # ed25519-dalek v1.0.1 depends on this exact version
futures = { version = "0.3", features = ["executor"] }
sha1 = "0.10.5"
critical-section = { version = "1.1.1", features = ["std"] }
[dev-dependencies.ed25519-dalek]
default_features = false
features = ["rand", "std", "u32_backend"]
[features]
ed25519-dalek = ["dep:ed25519-dalek", "_verify"]
ed25519-salty = ["dep:salty", "_verify"]
nightly = ["dep:embedded-storage-async", "embassy-embedded-hal/nightly"]
#Internal features
_verify = []

View File

@ -13,11 +13,12 @@ By design, the bootloader does not provide any network capabilities. Networking
The bootloader supports different hardware in separate crates:
* `embassy-boot-nrf` - for the nRF microcontrollers.
* `embassy-boot-rp` - for the RP2040 microcontrollers.
* `embassy-boot-stm32` - for the STM32 microcontrollers.
## Minimum supported Rust version (MSRV)
`embassy-boot` requires Rust nightly to compile as it relies on async traits for interacting with the flash peripherals.
`embassy-boot` is guaranteed to compile on the latest stable Rust version at the time of release. It might compile with older versions but that may change in any new patch release.
## License

View File

@ -0,0 +1,421 @@
use core::cell::RefCell;
use embassy_embedded_hal::flash::partition::BlockingPartition;
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use embassy_sync::blocking_mutex::Mutex;
use embedded_storage::nor_flash::{NorFlash, NorFlashError, NorFlashErrorKind};
use crate::{State, BOOT_MAGIC, STATE_ERASE_VALUE, SWAP_MAGIC};
/// Errors returned by bootloader
#[derive(PartialEq, Eq, Debug)]
pub enum BootError {
/// Error from flash.
Flash(NorFlashErrorKind),
/// Invalid bootloader magic
BadMagic,
}
#[cfg(feature = "defmt")]
impl defmt::Format for BootError {
fn format(&self, fmt: defmt::Formatter) {
match self {
BootError::Flash(_) => defmt::write!(fmt, "BootError::Flash(_)"),
BootError::BadMagic => defmt::write!(fmt, "BootError::BadMagic"),
}
}
}
impl<E> From<E> for BootError
where
E: NorFlashError,
{
fn from(error: E) -> Self {
BootError::Flash(error.kind())
}
}
/// Bootloader flash configuration holding the three flashes used by the bootloader
///
/// If only a single flash is actually used, then that flash should be partitioned into three partitions before use.
/// The easiest way to do this is to use [`BootLoaderConfig::from_linkerfile_blocking`] which will partition
/// the provided flash according to symbols defined in the linkerfile.
pub struct BootLoaderConfig<ACTIVE, DFU, STATE> {
/// Flash type used for the active partition - the partition which will be booted from.
pub active: ACTIVE,
/// Flash type used for the dfu partition - the partition which will be swapped in when requested.
pub dfu: DFU,
/// Flash type used for the state partition.
pub state: STATE,
}
impl<'a, FLASH: NorFlash>
BootLoaderConfig<
BlockingPartition<'a, NoopRawMutex, FLASH>,
BlockingPartition<'a, NoopRawMutex, FLASH>,
BlockingPartition<'a, NoopRawMutex, FLASH>,
>
{
/// Create a bootloader config from the flash and address symbols defined in the linkerfile
// #[cfg(target_os = "none")]
pub fn from_linkerfile_blocking(flash: &'a Mutex<NoopRawMutex, RefCell<FLASH>>) -> Self {
extern "C" {
static __bootloader_state_start: u32;
static __bootloader_state_end: u32;
static __bootloader_active_start: u32;
static __bootloader_active_end: u32;
static __bootloader_dfu_start: u32;
static __bootloader_dfu_end: u32;
}
let active = unsafe {
let start = &__bootloader_active_start as *const u32 as u32;
let end = &__bootloader_active_end as *const u32 as u32;
trace!("ACTIVE: 0x{:x} - 0x{:x}", start, end);
BlockingPartition::new(flash, start, end - start)
};
let dfu = unsafe {
let start = &__bootloader_dfu_start as *const u32 as u32;
let end = &__bootloader_dfu_end as *const u32 as u32;
trace!("DFU: 0x{:x} - 0x{:x}", start, end);
BlockingPartition::new(flash, start, end - start)
};
let state = unsafe {
let start = &__bootloader_state_start as *const u32 as u32;
let end = &__bootloader_state_end as *const u32 as u32;
trace!("STATE: 0x{:x} - 0x{:x}", start, end);
BlockingPartition::new(flash, start, end - start)
};
Self { active, dfu, state }
}
}
/// BootLoader works with any flash implementing embedded_storage.
pub struct BootLoader<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash> {
active: ACTIVE,
dfu: DFU,
/// The state partition has the following format:
/// All ranges are in multiples of WRITE_SIZE bytes.
/// | Range | Description |
/// | 0..1 | Magic indicating bootloader state. BOOT_MAGIC means boot, SWAP_MAGIC means swap. |
/// | 1..2 | Progress validity. ERASE_VALUE means valid, !ERASE_VALUE means invalid. |
/// | 2..2 + N | Progress index used while swapping or reverting
state: STATE,
}
impl<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash> BootLoader<ACTIVE, DFU, STATE> {
/// Get the page size which is the "unit of operation" within the bootloader.
const PAGE_SIZE: u32 = if ACTIVE::ERASE_SIZE > DFU::ERASE_SIZE {
ACTIVE::ERASE_SIZE as u32
} else {
DFU::ERASE_SIZE as u32
};
/// Create a new instance of a bootloader with the flash partitions.
///
/// - All partitions must be aligned with the PAGE_SIZE const generic parameter.
/// - The dfu partition must be at least PAGE_SIZE bigger than the active partition.
pub fn new(config: BootLoaderConfig<ACTIVE, DFU, STATE>) -> Self {
Self {
active: config.active,
dfu: config.dfu,
state: config.state,
}
}
/// Perform necessary boot preparations like swapping images.
///
/// The DFU partition is assumed to be 1 page bigger than the active partition for the swap
/// algorithm to work correctly.
///
/// The provided aligned_buf argument must satisfy any alignment requirements
/// given by the partition flashes. All flash operations will use this buffer.
///
/// SWAPPING
///
/// Assume a flash size of 3 pages for the active partition, and 4 pages for the DFU partition.
/// The swap index contains the copy progress, as to allow continuation of the copy process on
/// power failure. The index counter is represented within 1 or more pages (depending on total
/// flash size), where a page X is considered swapped if index at location (X + WRITE_SIZE)
/// contains a zero value. This ensures that index updates can be performed atomically and
/// avoid a situation where the wrong index value is set (page write size is "atomic").
///
/// +-----------+------------+--------+--------+--------+--------+
/// | Partition | Swap Index | Page 0 | Page 1 | Page 3 | Page 4 |
/// +-----------+------------+--------+--------+--------+--------+
/// | Active | 0 | 1 | 2 | 3 | - |
/// | DFU | 0 | 3 | 2 | 1 | X |
/// +-----------+------------+--------+--------+--------+--------+
///
/// The algorithm starts by copying 'backwards', and after the first step, the layout is
/// as follows:
///
/// +-----------+------------+--------+--------+--------+--------+
/// | Partition | Swap Index | Page 0 | Page 1 | Page 3 | Page 4 |
/// +-----------+------------+--------+--------+--------+--------+
/// | Active | 1 | 1 | 2 | 1 | - |
/// | DFU | 1 | 3 | 2 | 1 | 3 |
/// +-----------+------------+--------+--------+--------+--------+
///
/// The next iteration performs the same steps
///
/// +-----------+------------+--------+--------+--------+--------+
/// | Partition | Swap Index | Page 0 | Page 1 | Page 3 | Page 4 |
/// +-----------+------------+--------+--------+--------+--------+
/// | Active | 2 | 1 | 2 | 1 | - |
/// | DFU | 2 | 3 | 2 | 2 | 3 |
/// +-----------+------------+--------+--------+--------+--------+
///
/// And again until we're done
///
/// +-----------+------------+--------+--------+--------+--------+
/// | Partition | Swap Index | Page 0 | Page 1 | Page 3 | Page 4 |
/// +-----------+------------+--------+--------+--------+--------+
/// | Active | 3 | 3 | 2 | 1 | - |
/// | DFU | 3 | 3 | 1 | 2 | 3 |
/// +-----------+------------+--------+--------+--------+--------+
///
/// REVERTING
///
/// The reverting algorithm uses the swap index to discover that images were swapped, but that
/// the application failed to mark the boot successful. In this case, the revert algorithm will
/// run.
///
/// The revert index is located separately from the swap index, to ensure that revert can continue
/// on power failure.
///
/// The revert algorithm works forwards, by starting copying into the 'unused' DFU page at the start.
///
/// +-----------+--------------+--------+--------+--------+--------+
/// | Partition | Revert Index | Page 0 | Page 1 | Page 3 | Page 4 |
//*/
/// +-----------+--------------+--------+--------+--------+--------+
/// | Active | 3 | 1 | 2 | 1 | - |
/// | DFU | 3 | 3 | 1 | 2 | 3 |
/// +-----------+--------------+--------+--------+--------+--------+
///
///
/// +-----------+--------------+--------+--------+--------+--------+
/// | Partition | Revert Index | Page 0 | Page 1 | Page 3 | Page 4 |
/// +-----------+--------------+--------+--------+--------+--------+
/// | Active | 3 | 1 | 2 | 1 | - |
/// | DFU | 3 | 3 | 2 | 2 | 3 |
/// +-----------+--------------+--------+--------+--------+--------+
///
/// +-----------+--------------+--------+--------+--------+--------+
/// | Partition | Revert Index | Page 0 | Page 1 | Page 3 | Page 4 |
/// +-----------+--------------+--------+--------+--------+--------+
/// | Active | 3 | 1 | 2 | 3 | - |
/// | DFU | 3 | 3 | 2 | 1 | 3 |
/// +-----------+--------------+--------+--------+--------+--------+
///
pub fn prepare_boot(&mut self, aligned_buf: &mut [u8]) -> Result<State, BootError> {
// Ensure we have enough progress pages to store copy progress
assert_eq!(0, Self::PAGE_SIZE % aligned_buf.len() as u32);
assert_eq!(0, Self::PAGE_SIZE % ACTIVE::WRITE_SIZE as u32);
assert_eq!(0, Self::PAGE_SIZE % ACTIVE::ERASE_SIZE as u32);
assert_eq!(0, Self::PAGE_SIZE % DFU::WRITE_SIZE as u32);
assert_eq!(0, Self::PAGE_SIZE % DFU::ERASE_SIZE as u32);
assert!(aligned_buf.len() >= STATE::WRITE_SIZE);
assert_eq!(0, aligned_buf.len() % ACTIVE::WRITE_SIZE);
assert_eq!(0, aligned_buf.len() % DFU::WRITE_SIZE);
assert_partitions(&self.active, &self.dfu, &self.state, Self::PAGE_SIZE);
// Copy contents from partition N to active
let state = self.read_state(aligned_buf)?;
if state == State::Swap {
//
// Check if we already swapped. If we're in the swap state, this means we should revert
// since the app has failed to mark boot as successful
//
if !self.is_swapped(aligned_buf)? {
trace!("Swapping");
self.swap(aligned_buf)?;
trace!("Swapping done");
} else {
trace!("Reverting");
self.revert(aligned_buf)?;
let state_word = &mut aligned_buf[..STATE::WRITE_SIZE];
// Invalidate progress
state_word.fill(!STATE_ERASE_VALUE);
self.state.write(STATE::WRITE_SIZE as u32, state_word)?;
// Clear magic and progress
self.state.erase(0, self.state.capacity() as u32)?;
// Set magic
state_word.fill(BOOT_MAGIC);
self.state.write(0, state_word)?;
}
}
Ok(state)
}
fn is_swapped(&mut self, aligned_buf: &mut [u8]) -> Result<bool, BootError> {
let page_count = self.active.capacity() / Self::PAGE_SIZE as usize;
let progress = self.current_progress(aligned_buf)?;
Ok(progress >= page_count * 2)
}
fn current_progress(&mut self, aligned_buf: &mut [u8]) -> Result<usize, BootError> {
let write_size = STATE::WRITE_SIZE as u32;
let max_index = ((self.state.capacity() - STATE::WRITE_SIZE) / STATE::WRITE_SIZE) - 2;
let state_word = &mut aligned_buf[..write_size as usize];
self.state.read(write_size, state_word)?;
if state_word.iter().any(|&b| b != STATE_ERASE_VALUE) {
// Progress is invalid
return Ok(max_index);
}
for index in 0..max_index {
self.state.read((2 + index) as u32 * write_size, state_word)?;
if state_word.iter().any(|&b| b == STATE_ERASE_VALUE) {
return Ok(index);
}
}
Ok(max_index)
}
fn update_progress(&mut self, progress_index: usize, aligned_buf: &mut [u8]) -> Result<(), BootError> {
let state_word = &mut aligned_buf[..STATE::WRITE_SIZE];
state_word.fill(!STATE_ERASE_VALUE);
self.state
.write((2 + progress_index) as u32 * STATE::WRITE_SIZE as u32, state_word)?;
Ok(())
}
fn copy_page_once_to_active(
&mut self,
progress_index: usize,
from_offset: u32,
to_offset: u32,
aligned_buf: &mut [u8],
) -> Result<(), BootError> {
if self.current_progress(aligned_buf)? <= progress_index {
let page_size = Self::PAGE_SIZE as u32;
self.active.erase(to_offset, to_offset + page_size)?;
for offset_in_page in (0..page_size).step_by(aligned_buf.len()) {
self.dfu.read(from_offset + offset_in_page as u32, aligned_buf)?;
self.active.write(to_offset + offset_in_page as u32, aligned_buf)?;
}
self.update_progress(progress_index, aligned_buf)?;
}
Ok(())
}
fn copy_page_once_to_dfu(
&mut self,
progress_index: usize,
from_offset: u32,
to_offset: u32,
aligned_buf: &mut [u8],
) -> Result<(), BootError> {
if self.current_progress(aligned_buf)? <= progress_index {
let page_size = Self::PAGE_SIZE as u32;
self.dfu.erase(to_offset as u32, to_offset + page_size)?;
for offset_in_page in (0..page_size).step_by(aligned_buf.len()) {
self.active.read(from_offset + offset_in_page as u32, aligned_buf)?;
self.dfu.write(to_offset + offset_in_page as u32, aligned_buf)?;
}
self.update_progress(progress_index, aligned_buf)?;
}
Ok(())
}
fn swap(&mut self, aligned_buf: &mut [u8]) -> Result<(), BootError> {
let page_count = self.active.capacity() as u32 / Self::PAGE_SIZE;
for page_num in 0..page_count {
let progress_index = (page_num * 2) as usize;
// Copy active page to the 'next' DFU page.
let active_from_offset = (page_count - 1 - page_num) * Self::PAGE_SIZE;
let dfu_to_offset = (page_count - page_num) * Self::PAGE_SIZE;
//trace!("Copy active {} to dfu {}", active_from_offset, dfu_to_offset);
self.copy_page_once_to_dfu(progress_index, active_from_offset, dfu_to_offset, aligned_buf)?;
// Copy DFU page to the active page
let active_to_offset = (page_count - 1 - page_num) * Self::PAGE_SIZE;
let dfu_from_offset = (page_count - 1 - page_num) * Self::PAGE_SIZE;
//trace!("Copy dfy {} to active {}", dfu_from_offset, active_to_offset);
self.copy_page_once_to_active(progress_index + 1, dfu_from_offset, active_to_offset, aligned_buf)?;
}
Ok(())
}
fn revert(&mut self, aligned_buf: &mut [u8]) -> Result<(), BootError> {
let page_count = self.active.capacity() as u32 / Self::PAGE_SIZE;
for page_num in 0..page_count {
let progress_index = (page_count * 2 + page_num * 2) as usize;
// Copy the bad active page to the DFU page
let active_from_offset = page_num * Self::PAGE_SIZE;
let dfu_to_offset = page_num * Self::PAGE_SIZE;
self.copy_page_once_to_dfu(progress_index, active_from_offset, dfu_to_offset, aligned_buf)?;
// Copy the DFU page back to the active page
let active_to_offset = page_num * Self::PAGE_SIZE;
let dfu_from_offset = (page_num + 1) * Self::PAGE_SIZE;
self.copy_page_once_to_active(progress_index + 1, dfu_from_offset, active_to_offset, aligned_buf)?;
}
Ok(())
}
fn read_state(&mut self, aligned_buf: &mut [u8]) -> Result<State, BootError> {
let state_word = &mut aligned_buf[..STATE::WRITE_SIZE];
self.state.read(0, state_word)?;
if !state_word.iter().any(|&b| b != SWAP_MAGIC) {
Ok(State::Swap)
} else {
Ok(State::Boot)
}
}
}
fn assert_partitions<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash>(
active: &ACTIVE,
dfu: &DFU,
state: &STATE,
page_size: u32,
) {
assert_eq!(active.capacity() as u32 % page_size, 0);
assert_eq!(dfu.capacity() as u32 % page_size, 0);
assert!(dfu.capacity() as u32 - active.capacity() as u32 >= page_size);
assert!(2 + 2 * (active.capacity() as u32 / page_size) <= state.capacity() as u32 / STATE::WRITE_SIZE as u32);
}
#[cfg(test)]
mod tests {
use super::*;
use crate::mem_flash::MemFlash;
#[test]
#[should_panic]
fn test_range_asserts() {
const ACTIVE_SIZE: usize = 4194304 - 4096;
const DFU_SIZE: usize = 4194304;
const STATE_SIZE: usize = 4096;
static ACTIVE: MemFlash<ACTIVE_SIZE, 4, 4> = MemFlash::new(0xFF);
static DFU: MemFlash<DFU_SIZE, 4, 4> = MemFlash::new(0xFF);
static STATE: MemFlash<STATE_SIZE, 4, 4> = MemFlash::new(0xFF);
assert_partitions(&ACTIVE, &DFU, &STATE, 4096);
}
}

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use digest::typenum::U64;
use digest::{FixedOutput, HashMarker, OutputSizeUser, Update};
use ed25519_dalek::Digest as _;
pub struct Sha512(ed25519_dalek::Sha512);
impl Default for Sha512 {
fn default() -> Self {
Self(ed25519_dalek::Sha512::new())
}
}
impl Update for Sha512 {
fn update(&mut self, data: &[u8]) {
self.0.update(data)
}
}
impl FixedOutput for Sha512 {
fn finalize_into(self, out: &mut digest::Output<Self>) {
let result = self.0.finalize();
out.as_mut_slice().copy_from_slice(result.as_slice())
}
}
impl OutputSizeUser for Sha512 {
type OutputSize = U64;
}
impl HashMarker for Sha512 {}

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#[cfg(feature = "ed25519-dalek")]
pub(crate) mod ed25519_dalek;
#[cfg(feature = "ed25519-salty")]
pub(crate) mod salty;

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use digest::typenum::U64;
use digest::{FixedOutput, HashMarker, OutputSizeUser, Update};
pub struct Sha512(salty::Sha512);
impl Default for Sha512 {
fn default() -> Self {
Self(salty::Sha512::new())
}
}
impl Update for Sha512 {
fn update(&mut self, data: &[u8]) {
self.0.update(data)
}
}
impl FixedOutput for Sha512 {
fn finalize_into(self, out: &mut digest::Output<Self>) {
let result = self.0.finalize();
out.as_mut_slice().copy_from_slice(result.as_slice())
}
}
impl OutputSizeUser for Sha512 {
type OutputSize = U64;
}
impl HashMarker for Sha512 {}

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use digest::Digest;
#[cfg(target_os = "none")]
use embassy_embedded_hal::flash::partition::Partition;
#[cfg(target_os = "none")]
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use embedded_storage_async::nor_flash::NorFlash;
use super::FirmwareUpdaterConfig;
use crate::{FirmwareUpdaterError, State, BOOT_MAGIC, STATE_ERASE_VALUE, SWAP_MAGIC};
/// FirmwareUpdater is an application API for interacting with the BootLoader without the ability to
/// 'mess up' the internal bootloader state
pub struct FirmwareUpdater<DFU: NorFlash, STATE: NorFlash> {
dfu: DFU,
state: STATE,
}
#[cfg(target_os = "none")]
impl<'a, FLASH: NorFlash>
FirmwareUpdaterConfig<Partition<'a, NoopRawMutex, FLASH>, Partition<'a, NoopRawMutex, FLASH>>
{
/// Create a firmware updater config from the flash and address symbols defined in the linkerfile
pub fn from_linkerfile(flash: &'a embassy_sync::mutex::Mutex<NoopRawMutex, FLASH>) -> Self {
extern "C" {
static __bootloader_state_start: u32;
static __bootloader_state_end: u32;
static __bootloader_dfu_start: u32;
static __bootloader_dfu_end: u32;
}
let dfu = unsafe {
let start = &__bootloader_dfu_start as *const u32 as u32;
let end = &__bootloader_dfu_end as *const u32 as u32;
trace!("DFU: 0x{:x} - 0x{:x}", start, end);
Partition::new(flash, start, end - start)
};
let state = unsafe {
let start = &__bootloader_state_start as *const u32 as u32;
let end = &__bootloader_state_end as *const u32 as u32;
trace!("STATE: 0x{:x} - 0x{:x}", start, end);
Partition::new(flash, start, end - start)
};
Self { dfu, state }
}
}
impl<DFU: NorFlash, STATE: NorFlash> FirmwareUpdater<DFU, STATE> {
/// Create a firmware updater instance with partition ranges for the update and state partitions.
pub fn new(config: FirmwareUpdaterConfig<DFU, STATE>) -> Self {
Self {
dfu: config.dfu,
state: config.state,
}
}
// Make sure we are running a booted firmware to avoid reverting to a bad state.
async fn verify_booted(&mut self, aligned: &mut [u8]) -> Result<(), FirmwareUpdaterError> {
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
if self.get_state(aligned).await? == State::Boot {
Ok(())
} else {
Err(FirmwareUpdaterError::BadState)
}
}
/// Obtain the current state.
///
/// This is useful to check if the bootloader has just done a swap, in order
/// to do verifications and self-tests of the new image before calling
/// `mark_booted`.
pub async fn get_state(&mut self, aligned: &mut [u8]) -> Result<State, FirmwareUpdaterError> {
self.state.read(0, aligned).await?;
if !aligned.iter().any(|&b| b != SWAP_MAGIC) {
Ok(State::Swap)
} else {
Ok(State::Boot)
}
}
/// Verify the DFU given a public key. If there is an error then DO NOT
/// proceed with updating the firmware as it must be signed with a
/// corresponding private key (otherwise it could be malicious firmware).
///
/// Mark to trigger firmware swap on next boot if verify suceeds.
///
/// If the "ed25519-salty" feature is set (or another similar feature) then the signature is expected to have
/// been generated from a SHA-512 digest of the firmware bytes.
///
/// If no signature feature is set then this method will always return a
/// signature error.
///
/// # Safety
///
/// The `_aligned` buffer must have a size of STATE::WRITE_SIZE, and follow the alignment rules for the flash being read from
/// and written to.
#[cfg(feature = "_verify")]
pub async fn verify_and_mark_updated(
&mut self,
_public_key: &[u8],
_signature: &[u8],
_update_len: u32,
_aligned: &mut [u8],
) -> Result<(), FirmwareUpdaterError> {
assert_eq!(_aligned.len(), STATE::WRITE_SIZE);
assert!(_update_len <= self.dfu.capacity() as u32);
self.verify_booted(_aligned).await?;
#[cfg(feature = "ed25519-dalek")]
{
use ed25519_dalek::{PublicKey, Signature, SignatureError, Verifier};
use crate::digest_adapters::ed25519_dalek::Sha512;
let into_signature_error = |e: SignatureError| FirmwareUpdaterError::Signature(e.into());
let public_key = PublicKey::from_bytes(_public_key).map_err(into_signature_error)?;
let signature = Signature::from_bytes(_signature).map_err(into_signature_error)?;
let mut message = [0; 64];
self.hash::<Sha512>(_update_len, _aligned, &mut message).await?;
public_key.verify(&message, &signature).map_err(into_signature_error)?
}
#[cfg(feature = "ed25519-salty")]
{
use salty::constants::{PUBLICKEY_SERIALIZED_LENGTH, SIGNATURE_SERIALIZED_LENGTH};
use salty::{PublicKey, Signature};
use crate::digest_adapters::salty::Sha512;
fn into_signature_error<E>(_: E) -> FirmwareUpdaterError {
FirmwareUpdaterError::Signature(signature::Error::default())
}
let public_key: [u8; PUBLICKEY_SERIALIZED_LENGTH] = _public_key.try_into().map_err(into_signature_error)?;
let public_key = PublicKey::try_from(&public_key).map_err(into_signature_error)?;
let signature: [u8; SIGNATURE_SERIALIZED_LENGTH] = _signature.try_into().map_err(into_signature_error)?;
let signature = Signature::try_from(&signature).map_err(into_signature_error)?;
let mut message = [0; 64];
self.hash::<Sha512>(_update_len, _aligned, &mut message).await?;
let r = public_key.verify(&message, &signature);
trace!(
"Verifying with public key {}, signature {} and message {} yields ok: {}",
public_key.to_bytes(),
signature.to_bytes(),
message,
r.is_ok()
);
r.map_err(into_signature_error)?
}
self.set_magic(_aligned, SWAP_MAGIC).await
}
/// Verify the update in DFU with any digest.
pub async fn hash<D: Digest>(
&mut self,
update_len: u32,
chunk_buf: &mut [u8],
output: &mut [u8],
) -> Result<(), FirmwareUpdaterError> {
let mut digest = D::new();
for offset in (0..update_len).step_by(chunk_buf.len()) {
self.dfu.read(offset, chunk_buf).await?;
let len = core::cmp::min((update_len - offset) as usize, chunk_buf.len());
digest.update(&chunk_buf[..len]);
}
output.copy_from_slice(digest.finalize().as_slice());
Ok(())
}
/// Mark to trigger firmware swap on next boot.
///
/// # Safety
///
/// The `aligned` buffer must have a size of STATE::WRITE_SIZE, and follow the alignment rules for the flash being written to.
#[cfg(not(feature = "_verify"))]
pub async fn mark_updated(&mut self, aligned: &mut [u8]) -> Result<(), FirmwareUpdaterError> {
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
self.set_magic(aligned, SWAP_MAGIC).await
}
/// Mark firmware boot successful and stop rollback on reset.
///
/// # Safety
///
/// The `aligned` buffer must have a size of STATE::WRITE_SIZE, and follow the alignment rules for the flash being written to.
pub async fn mark_booted(&mut self, aligned: &mut [u8]) -> Result<(), FirmwareUpdaterError> {
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
self.set_magic(aligned, BOOT_MAGIC).await
}
async fn set_magic(&mut self, aligned: &mut [u8], magic: u8) -> Result<(), FirmwareUpdaterError> {
self.state.read(0, aligned).await?;
if aligned.iter().any(|&b| b != magic) {
// Read progress validity
self.state.read(STATE::WRITE_SIZE as u32, aligned).await?;
if aligned.iter().any(|&b| b != STATE_ERASE_VALUE) {
// The current progress validity marker is invalid
} else {
// Invalidate progress
aligned.fill(!STATE_ERASE_VALUE);
self.state.write(STATE::WRITE_SIZE as u32, aligned).await?;
}
// Clear magic and progress
self.state.erase(0, self.state.capacity() as u32).await?;
// Set magic
aligned.fill(magic);
self.state.write(0, aligned).await?;
}
Ok(())
}
/// Write data to a flash page.
///
/// The buffer must follow alignment requirements of the target flash and a multiple of page size big.
///
/// # Safety
///
/// Failing to meet alignment and size requirements may result in a panic.
pub async fn write_firmware(
&mut self,
aligned: &mut [u8],
offset: usize,
data: &[u8],
) -> Result<(), FirmwareUpdaterError> {
assert!(data.len() >= DFU::ERASE_SIZE);
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
self.verify_booted(aligned).await?;
self.dfu.erase(offset as u32, (offset + data.len()) as u32).await?;
self.dfu.write(offset as u32, data).await?;
Ok(())
}
/// Prepare for an incoming DFU update by erasing the entire DFU area and
/// returning its `Partition`.
///
/// Using this instead of `write_firmware` allows for an optimized API in
/// exchange for added complexity.
///
/// # Safety
///
/// The `aligned` buffer must have a size of STATE::WRITE_SIZE, and follow the alignment rules for the flash being written to.
pub async fn prepare_update(&mut self, aligned: &mut [u8]) -> Result<&mut DFU, FirmwareUpdaterError> {
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
self.verify_booted(aligned).await?;
self.dfu.erase(0, self.dfu.capacity() as u32).await?;
Ok(&mut self.dfu)
}
}
#[cfg(test)]
mod tests {
use embassy_embedded_hal::flash::partition::Partition;
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use embassy_sync::mutex::Mutex;
use futures::executor::block_on;
use sha1::{Digest, Sha1};
use super::*;
use crate::mem_flash::MemFlash;
#[test]
fn can_verify_sha1() {
let flash = Mutex::<NoopRawMutex, _>::new(MemFlash::<131072, 4096, 8>::default());
let state = Partition::new(&flash, 0, 4096);
let dfu = Partition::new(&flash, 65536, 65536);
let mut aligned = [0; 8];
let update = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66];
let mut to_write = [0; 4096];
to_write[..7].copy_from_slice(update.as_slice());
let mut updater = FirmwareUpdater::new(FirmwareUpdaterConfig { dfu, state });
block_on(updater.write_firmware(&mut aligned, 0, to_write.as_slice())).unwrap();
let mut chunk_buf = [0; 2];
let mut hash = [0; 20];
block_on(updater.hash::<Sha1>(update.len() as u32, &mut chunk_buf, &mut hash)).unwrap();
assert_eq!(Sha1::digest(update).as_slice(), hash);
}
}

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use digest::Digest;
#[cfg(target_os = "none")]
use embassy_embedded_hal::flash::partition::BlockingPartition;
#[cfg(target_os = "none")]
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use embedded_storage::nor_flash::NorFlash;
use super::FirmwareUpdaterConfig;
use crate::{FirmwareUpdaterError, State, BOOT_MAGIC, STATE_ERASE_VALUE, SWAP_MAGIC};
/// Blocking FirmwareUpdater is an application API for interacting with the BootLoader without the ability to
/// 'mess up' the internal bootloader state
pub struct BlockingFirmwareUpdater<DFU: NorFlash, STATE: NorFlash> {
dfu: DFU,
state: STATE,
}
#[cfg(target_os = "none")]
impl<'a, FLASH: NorFlash>
FirmwareUpdaterConfig<BlockingPartition<'a, NoopRawMutex, FLASH>, BlockingPartition<'a, NoopRawMutex, FLASH>>
{
/// Create a firmware updater config from the flash and address symbols defined in the linkerfile
pub fn from_linkerfile_blocking(
flash: &'a embassy_sync::blocking_mutex::Mutex<NoopRawMutex, core::cell::RefCell<FLASH>>,
) -> Self {
extern "C" {
static __bootloader_state_start: u32;
static __bootloader_state_end: u32;
static __bootloader_dfu_start: u32;
static __bootloader_dfu_end: u32;
}
let dfu = unsafe {
let start = &__bootloader_dfu_start as *const u32 as u32;
let end = &__bootloader_dfu_end as *const u32 as u32;
trace!("DFU: 0x{:x} - 0x{:x}", start, end);
BlockingPartition::new(flash, start, end - start)
};
let state = unsafe {
let start = &__bootloader_state_start as *const u32 as u32;
let end = &__bootloader_state_end as *const u32 as u32;
trace!("STATE: 0x{:x} - 0x{:x}", start, end);
BlockingPartition::new(flash, start, end - start)
};
Self { dfu, state }
}
}
impl<DFU: NorFlash, STATE: NorFlash> BlockingFirmwareUpdater<DFU, STATE> {
/// Create a firmware updater instance with partition ranges for the update and state partitions.
pub fn new(config: FirmwareUpdaterConfig<DFU, STATE>) -> Self {
Self {
dfu: config.dfu,
state: config.state,
}
}
// Make sure we are running a booted firmware to avoid reverting to a bad state.
fn verify_booted(&mut self, aligned: &mut [u8]) -> Result<(), FirmwareUpdaterError> {
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
if self.get_state(aligned)? == State::Boot {
Ok(())
} else {
Err(FirmwareUpdaterError::BadState)
}
}
/// Obtain the current state.
///
/// This is useful to check if the bootloader has just done a swap, in order
/// to do verifications and self-tests of the new image before calling
/// `mark_booted`.
pub fn get_state(&mut self, aligned: &mut [u8]) -> Result<State, FirmwareUpdaterError> {
self.state.read(0, aligned)?;
if !aligned.iter().any(|&b| b != SWAP_MAGIC) {
Ok(State::Swap)
} else {
Ok(State::Boot)
}
}
/// Verify the DFU given a public key. If there is an error then DO NOT
/// proceed with updating the firmware as it must be signed with a
/// corresponding private key (otherwise it could be malicious firmware).
///
/// Mark to trigger firmware swap on next boot if verify suceeds.
///
/// If the "ed25519-salty" feature is set (or another similar feature) then the signature is expected to have
/// been generated from a SHA-512 digest of the firmware bytes.
///
/// If no signature feature is set then this method will always return a
/// signature error.
///
/// # Safety
///
/// The `_aligned` buffer must have a size of STATE::WRITE_SIZE, and follow the alignment rules for the flash being read from
/// and written to.
#[cfg(feature = "_verify")]
pub fn verify_and_mark_updated(
&mut self,
_public_key: &[u8],
_signature: &[u8],
_update_len: u32,
_aligned: &mut [u8],
) -> Result<(), FirmwareUpdaterError> {
assert_eq!(_aligned.len(), STATE::WRITE_SIZE);
assert!(_update_len <= self.dfu.capacity() as u32);
self.verify_booted(_aligned)?;
#[cfg(feature = "ed25519-dalek")]
{
use ed25519_dalek::{PublicKey, Signature, SignatureError, Verifier};
use crate::digest_adapters::ed25519_dalek::Sha512;
let into_signature_error = |e: SignatureError| FirmwareUpdaterError::Signature(e.into());
let public_key = PublicKey::from_bytes(_public_key).map_err(into_signature_error)?;
let signature = Signature::from_bytes(_signature).map_err(into_signature_error)?;
let mut message = [0; 64];
self.hash::<Sha512>(_update_len, _aligned, &mut message)?;
public_key.verify(&message, &signature).map_err(into_signature_error)?
}
#[cfg(feature = "ed25519-salty")]
{
use salty::constants::{PUBLICKEY_SERIALIZED_LENGTH, SIGNATURE_SERIALIZED_LENGTH};
use salty::{PublicKey, Signature};
use crate::digest_adapters::salty::Sha512;
fn into_signature_error<E>(_: E) -> FirmwareUpdaterError {
FirmwareUpdaterError::Signature(signature::Error::default())
}
let public_key: [u8; PUBLICKEY_SERIALIZED_LENGTH] = _public_key.try_into().map_err(into_signature_error)?;
let public_key = PublicKey::try_from(&public_key).map_err(into_signature_error)?;
let signature: [u8; SIGNATURE_SERIALIZED_LENGTH] = _signature.try_into().map_err(into_signature_error)?;
let signature = Signature::try_from(&signature).map_err(into_signature_error)?;
let mut message = [0; 64];
self.hash::<Sha512>(_update_len, _aligned, &mut message)?;
let r = public_key.verify(&message, &signature);
trace!(
"Verifying with public key {}, signature {} and message {} yields ok: {}",
public_key.to_bytes(),
signature.to_bytes(),
message,
r.is_ok()
);
r.map_err(into_signature_error)?
}
self.set_magic(_aligned, SWAP_MAGIC)
}
/// Verify the update in DFU with any digest.
pub fn hash<D: Digest>(
&mut self,
update_len: u32,
chunk_buf: &mut [u8],
output: &mut [u8],
) -> Result<(), FirmwareUpdaterError> {
let mut digest = D::new();
for offset in (0..update_len).step_by(chunk_buf.len()) {
self.dfu.read(offset, chunk_buf)?;
let len = core::cmp::min((update_len - offset) as usize, chunk_buf.len());
digest.update(&chunk_buf[..len]);
}
output.copy_from_slice(digest.finalize().as_slice());
Ok(())
}
/// Mark to trigger firmware swap on next boot.
///
/// # Safety
///
/// The `aligned` buffer must have a size of STATE::WRITE_SIZE, and follow the alignment rules for the flash being written to.
#[cfg(not(feature = "_verify"))]
pub fn mark_updated(&mut self, aligned: &mut [u8]) -> Result<(), FirmwareUpdaterError> {
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
self.set_magic(aligned, SWAP_MAGIC)
}
/// Mark firmware boot successful and stop rollback on reset.
///
/// # Safety
///
/// The `aligned` buffer must have a size of STATE::WRITE_SIZE, and follow the alignment rules for the flash being written to.
pub fn mark_booted(&mut self, aligned: &mut [u8]) -> Result<(), FirmwareUpdaterError> {
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
self.set_magic(aligned, BOOT_MAGIC)
}
fn set_magic(&mut self, aligned: &mut [u8], magic: u8) -> Result<(), FirmwareUpdaterError> {
self.state.read(0, aligned)?;
if aligned.iter().any(|&b| b != magic) {
// Read progress validity
self.state.read(STATE::WRITE_SIZE as u32, aligned)?;
if aligned.iter().any(|&b| b != STATE_ERASE_VALUE) {
// The current progress validity marker is invalid
} else {
// Invalidate progress
aligned.fill(!STATE_ERASE_VALUE);
self.state.write(STATE::WRITE_SIZE as u32, aligned)?;
}
// Clear magic and progress
self.state.erase(0, self.state.capacity() as u32)?;
// Set magic
aligned.fill(magic);
self.state.write(0, aligned)?;
}
Ok(())
}
/// Write data to a flash page.
///
/// The buffer must follow alignment requirements of the target flash and a multiple of page size big.
///
/// # Safety
///
/// Failing to meet alignment and size requirements may result in a panic.
pub fn write_firmware(
&mut self,
aligned: &mut [u8],
offset: usize,
data: &[u8],
) -> Result<(), FirmwareUpdaterError> {
assert!(data.len() >= DFU::ERASE_SIZE);
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
self.verify_booted(aligned)?;
self.dfu.erase(offset as u32, (offset + data.len()) as u32)?;
self.dfu.write(offset as u32, data)?;
Ok(())
}
/// Prepare for an incoming DFU update by erasing the entire DFU area and
/// returning its `Partition`.
///
/// Using this instead of `write_firmware` allows for an optimized API in
/// exchange for added complexity.
///
/// # Safety
///
/// The `aligned` buffer must have a size of STATE::WRITE_SIZE, and follow the alignment rules for the flash being written to.
pub fn prepare_update(&mut self, aligned: &mut [u8]) -> Result<&mut DFU, FirmwareUpdaterError> {
assert_eq!(aligned.len(), STATE::WRITE_SIZE);
self.verify_booted(aligned)?;
self.dfu.erase(0, self.dfu.capacity() as u32)?;
Ok(&mut self.dfu)
}
}
#[cfg(test)]
mod tests {
use core::cell::RefCell;
use embassy_embedded_hal::flash::partition::BlockingPartition;
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use embassy_sync::blocking_mutex::Mutex;
use sha1::{Digest, Sha1};
use super::*;
use crate::mem_flash::MemFlash;
#[test]
fn can_verify_sha1() {
let flash = Mutex::<NoopRawMutex, _>::new(RefCell::new(MemFlash::<131072, 4096, 8>::default()));
let state = BlockingPartition::new(&flash, 0, 4096);
let dfu = BlockingPartition::new(&flash, 65536, 65536);
let update = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66];
let mut to_write = [0; 4096];
to_write[..7].copy_from_slice(update.as_slice());
let mut updater = BlockingFirmwareUpdater::new(FirmwareUpdaterConfig { dfu, state });
let mut aligned = [0; 8];
updater.write_firmware(&mut aligned, 0, to_write.as_slice()).unwrap();
let mut chunk_buf = [0; 2];
let mut hash = [0; 20];
updater
.hash::<Sha1>(update.len() as u32, &mut chunk_buf, &mut hash)
.unwrap();
assert_eq!(Sha1::digest(update).as_slice(), hash);
}
}

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#[cfg(feature = "nightly")]
mod asynch;
mod blocking;
#[cfg(feature = "nightly")]
pub use asynch::FirmwareUpdater;
pub use blocking::BlockingFirmwareUpdater;
use embedded_storage::nor_flash::{NorFlashError, NorFlashErrorKind};
/// Firmware updater flash configuration holding the two flashes used by the updater
///
/// If only a single flash is actually used, then that flash should be partitioned into two partitions before use.
/// The easiest way to do this is to use [`FirmwareUpdaterConfig::from_linkerfile`] or [`FirmwareUpdaterConfig::from_linkerfile_blocking`] which will partition
/// the provided flash according to symbols defined in the linkerfile.
pub struct FirmwareUpdaterConfig<DFU, STATE> {
/// The dfu flash partition
pub dfu: DFU,
/// The state flash partition
pub state: STATE,
}
/// Errors returned by FirmwareUpdater
#[derive(Debug)]
pub enum FirmwareUpdaterError {
/// Error from flash.
Flash(NorFlashErrorKind),
/// Signature errors.
Signature(signature::Error),
/// Bad state.
BadState,
}
#[cfg(feature = "defmt")]
impl defmt::Format for FirmwareUpdaterError {
fn format(&self, fmt: defmt::Formatter) {
match self {
FirmwareUpdaterError::Flash(_) => defmt::write!(fmt, "FirmwareUpdaterError::Flash(_)"),
FirmwareUpdaterError::Signature(_) => defmt::write!(fmt, "FirmwareUpdaterError::Signature(_)"),
FirmwareUpdaterError::BadState => defmt::write!(fmt, "FirmwareUpdaterError::BadState"),
}
}
}
impl<E> From<E> for FirmwareUpdaterError
where
E: NorFlashError,
{
fn from(error: E) -> Self {
FirmwareUpdaterError::Flash(error.kind())
}
}

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@ -0,0 +1,173 @@
#![allow(unused)]
use core::ops::{Bound, Range, RangeBounds};
use embedded_storage::nor_flash::{ErrorType, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash};
#[cfg(feature = "nightly")]
use embedded_storage_async::nor_flash::{NorFlash as AsyncNorFlash, ReadNorFlash as AsyncReadNorFlash};
pub struct MemFlash<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> {
pub mem: [u8; SIZE],
pub pending_write_successes: Option<usize>,
}
#[derive(Debug)]
pub struct MemFlashError;
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE> {
pub const fn new(fill: u8) -> Self {
Self {
mem: [fill; SIZE],
pending_write_successes: None,
}
}
#[cfg(test)]
pub fn random() -> Self {
let mut mem = [0; SIZE];
for byte in mem.iter_mut() {
*byte = rand::random::<u8>();
}
Self {
mem,
pending_write_successes: None,
}
}
fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), MemFlashError> {
let len = bytes.len();
bytes.copy_from_slice(&self.mem[offset as usize..offset as usize + len]);
Ok(())
}
fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), MemFlashError> {
let offset = offset as usize;
assert!(bytes.len() % WRITE_SIZE == 0);
assert!(offset % WRITE_SIZE == 0);
assert!(offset + bytes.len() <= SIZE);
if let Some(pending_successes) = self.pending_write_successes {
if pending_successes > 0 {
self.pending_write_successes = Some(pending_successes - 1);
} else {
return Err(MemFlashError);
}
}
for ((offset, mem_byte), new_byte) in self
.mem
.iter_mut()
.enumerate()
.skip(offset)
.take(bytes.len())
.zip(bytes)
{
assert_eq!(0xFF, *mem_byte, "Offset {} is not erased", offset);
*mem_byte = *new_byte;
}
Ok(())
}
fn erase(&mut self, from: u32, to: u32) -> Result<(), MemFlashError> {
let from = from as usize;
let to = to as usize;
assert!(from % ERASE_SIZE == 0);
assert!(to % ERASE_SIZE == 0, "To: {}, erase size: {}", to, ERASE_SIZE);
for i in from..to {
self.mem[i] = 0xFF;
}
Ok(())
}
pub fn program(&mut self, offset: u32, bytes: &[u8]) -> Result<(), MemFlashError> {
let offset = offset as usize;
assert!(bytes.len() % WRITE_SIZE == 0);
assert!(offset % WRITE_SIZE == 0);
assert!(offset + bytes.len() <= SIZE);
self.mem[offset..offset + bytes.len()].copy_from_slice(bytes);
Ok(())
}
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> Default
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
fn default() -> Self {
Self::new(0xFF)
}
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> ErrorType
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
type Error = MemFlashError;
}
impl NorFlashError for MemFlashError {
fn kind(&self) -> NorFlashErrorKind {
NorFlashErrorKind::Other
}
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> ReadNorFlash
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
const READ_SIZE: usize = 1;
fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
self.read(offset, bytes)
}
fn capacity(&self) -> usize {
SIZE
}
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> NorFlash
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
const WRITE_SIZE: usize = WRITE_SIZE;
const ERASE_SIZE: usize = ERASE_SIZE;
fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
self.write(offset, bytes)
}
fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
self.erase(from, to)
}
}
#[cfg(feature = "nightly")]
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> AsyncReadNorFlash
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
const READ_SIZE: usize = 1;
async fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
self.read(offset, bytes)
}
fn capacity(&self) -> usize {
SIZE
}
}
#[cfg(feature = "nightly")]
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> AsyncNorFlash
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
const WRITE_SIZE: usize = WRITE_SIZE;
const ERASE_SIZE: usize = ERASE_SIZE;
async fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
self.write(offset, bytes)
}
async fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
self.erase(from, to)
}
}

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@ -0,0 +1,64 @@
use embassy_embedded_hal::flash::partition::Partition;
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use embassy_sync::mutex::Mutex;
use embedded_storage_async::nor_flash::NorFlash;
use crate::BootLoaderConfig;
pub struct AsyncTestFlash<ACTIVE, DFU, STATE>
where
ACTIVE: NorFlash,
DFU: NorFlash,
STATE: NorFlash,
{
active: Mutex<NoopRawMutex, ACTIVE>,
dfu: Mutex<NoopRawMutex, DFU>,
state: Mutex<NoopRawMutex, STATE>,
}
impl<ACTIVE, DFU, STATE> AsyncTestFlash<ACTIVE, DFU, STATE>
where
ACTIVE: NorFlash,
DFU: NorFlash,
STATE: NorFlash,
{
pub fn new(config: BootLoaderConfig<ACTIVE, DFU, STATE>) -> Self {
Self {
active: Mutex::new(config.active),
dfu: Mutex::new(config.dfu),
state: Mutex::new(config.state),
}
}
pub fn active(&self) -> Partition<NoopRawMutex, ACTIVE> {
Self::create_partition(&self.active)
}
pub fn dfu(&self) -> Partition<NoopRawMutex, DFU> {
Self::create_partition(&self.dfu)
}
pub fn state(&self) -> Partition<NoopRawMutex, STATE> {
Self::create_partition(&self.state)
}
fn create_partition<T: NorFlash>(mutex: &Mutex<NoopRawMutex, T>) -> Partition<NoopRawMutex, T> {
Partition::new(mutex, 0, mutex.try_lock().unwrap().capacity() as u32)
}
}
impl<ACTIVE, DFU, STATE> AsyncTestFlash<ACTIVE, DFU, STATE>
where
ACTIVE: NorFlash + embedded_storage::nor_flash::NorFlash,
DFU: NorFlash + embedded_storage::nor_flash::NorFlash,
STATE: NorFlash + embedded_storage::nor_flash::NorFlash,
{
pub fn into_blocking(self) -> super::BlockingTestFlash<ACTIVE, DFU, STATE> {
let config = BootLoaderConfig {
active: self.active.into_inner(),
dfu: self.dfu.into_inner(),
state: self.state.into_inner(),
};
super::BlockingTestFlash::new(config)
}
}

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@ -0,0 +1,69 @@
use core::cell::RefCell;
use embassy_embedded_hal::flash::partition::BlockingPartition;
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use embassy_sync::blocking_mutex::Mutex;
use embedded_storage::nor_flash::NorFlash;
use crate::BootLoaderConfig;
pub struct BlockingTestFlash<ACTIVE, DFU, STATE>
where
ACTIVE: NorFlash,
DFU: NorFlash,
STATE: NorFlash,
{
active: Mutex<NoopRawMutex, RefCell<ACTIVE>>,
dfu: Mutex<NoopRawMutex, RefCell<DFU>>,
state: Mutex<NoopRawMutex, RefCell<STATE>>,
}
impl<ACTIVE, DFU, STATE> BlockingTestFlash<ACTIVE, DFU, STATE>
where
ACTIVE: NorFlash,
DFU: NorFlash,
STATE: NorFlash,
{
pub fn new(config: BootLoaderConfig<ACTIVE, DFU, STATE>) -> Self {
Self {
active: Mutex::new(RefCell::new(config.active)),
dfu: Mutex::new(RefCell::new(config.dfu)),
state: Mutex::new(RefCell::new(config.state)),
}
}
pub fn active(&self) -> BlockingPartition<NoopRawMutex, ACTIVE> {
Self::create_partition(&self.active)
}
pub fn dfu(&self) -> BlockingPartition<NoopRawMutex, DFU> {
Self::create_partition(&self.dfu)
}
pub fn state(&self) -> BlockingPartition<NoopRawMutex, STATE> {
Self::create_partition(&self.state)
}
pub fn create_partition<T: NorFlash>(
mutex: &Mutex<NoopRawMutex, RefCell<T>>,
) -> BlockingPartition<NoopRawMutex, T> {
BlockingPartition::new(mutex, 0, mutex.lock(|f| f.borrow().capacity()) as u32)
}
}
#[cfg(feature = "nightly")]
impl<ACTIVE, DFU, STATE> BlockingTestFlash<ACTIVE, DFU, STATE>
where
ACTIVE: NorFlash + embedded_storage_async::nor_flash::NorFlash,
DFU: NorFlash + embedded_storage_async::nor_flash::NorFlash,
STATE: NorFlash + embedded_storage_async::nor_flash::NorFlash,
{
pub fn into_async(self) -> super::AsyncTestFlash<ACTIVE, DFU, STATE> {
let config = BootLoaderConfig {
active: self.active.into_inner().into_inner(),
dfu: self.dfu.into_inner().into_inner(),
state: self.state.into_inner().into_inner(),
};
super::AsyncTestFlash::new(config)
}
}

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@ -0,0 +1,7 @@
#[cfg(feature = "nightly")]
mod asynch;
mod blocking;
#[cfg(feature = "nightly")]
pub(crate) use asynch::AsyncTestFlash;
pub(crate) use blocking::BlockingTestFlash;

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@ -17,12 +17,12 @@ target = "thumbv7em-none-eabi"
defmt = { version = "0.3", optional = true }
embassy-sync = { path = "../../embassy-sync" }
embassy-nrf = { path = "../../embassy-nrf", default-features = false, features = ["nightly"] }
embassy-nrf = { path = "../../embassy-nrf" }
embassy-boot = { path = "../boot", default-features = false }
cortex-m = { version = "0.7.6" }
cortex-m-rt = { version = "0.7" }
embedded-storage = "0.3.0"
embedded-storage-async = "0.3.0"
embedded-storage-async = { version = "0.4.0", optional = true }
cfg-if = "1.0.0"
nrf-softdevice-mbr = { version = "0.1.0", git = "https://github.com/embassy-rs/nrf-softdevice.git", branch = "master", optional = true }
@ -36,3 +36,8 @@ defmt = [
softdevice = [
"nrf-softdevice-mbr",
]
nightly = [
"dep:embedded-storage-async",
"embassy-boot/nightly",
"embassy-nrf/nightly"
]

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@ -0,0 +1,26 @@
# embassy-boot-nrf
An [Embassy](https://embassy.dev) project.
An adaptation of `embassy-boot` for nRF.
## Features
* Load applications with or without the softdevice.
* Configure bootloader partitions based on linker script.
* Using watchdog timer to detect application failure.
## Minimum supported Rust version (MSRV)
`embassy-boot-nrf` is guaranteed to compile on the latest stable Rust version at the time of release. It might compile with older versions but that may change in any new patch release.
## License
This work is licensed under either of
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
<http://www.apache.org/licenses/LICENSE-2.0>)
- MIT license ([LICENSE-MIT](LICENSE-MIT) or <http://opensource.org/licenses/MIT>)
at your option.

View File

@ -1,78 +1,39 @@
#![no_std]
#![feature(type_alias_impl_trait)]
#![warn(missing_docs)]
#![doc = include_str!("../../README.md")]
#![doc = include_str!("../README.md")]
mod fmt;
pub use embassy_boot::{AlignedBuffer, BootFlash, FirmwareUpdater, FlashConfig, Partition, SingleFlashConfig};
#[cfg(feature = "nightly")]
pub use embassy_boot::FirmwareUpdater;
pub use embassy_boot::{AlignedBuffer, BlockingFirmwareUpdater, BootLoaderConfig, FirmwareUpdaterConfig};
use embassy_nrf::nvmc::{Nvmc, PAGE_SIZE};
use embassy_nrf::peripherals::WDT;
use embassy_nrf::wdt;
use embedded_storage::nor_flash::{ErrorType, NorFlash, ReadNorFlash};
/// A bootloader for nRF devices.
pub struct BootLoader {
boot: embassy_boot::BootLoader,
magic: AlignedBuffer<4>,
page: AlignedBuffer<PAGE_SIZE>,
pub struct BootLoader<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash, const BUFFER_SIZE: usize = PAGE_SIZE> {
boot: embassy_boot::BootLoader<ACTIVE, DFU, STATE>,
aligned_buf: AlignedBuffer<BUFFER_SIZE>,
}
impl Default for BootLoader {
/// Create a new bootloader instance using parameters from linker script
fn default() -> Self {
extern "C" {
static __bootloader_state_start: u32;
static __bootloader_state_end: u32;
static __bootloader_active_start: u32;
static __bootloader_active_end: u32;
static __bootloader_dfu_start: u32;
static __bootloader_dfu_end: u32;
}
let active = unsafe {
Partition::new(
&__bootloader_active_start as *const u32 as usize,
&__bootloader_active_end as *const u32 as usize,
)
};
let dfu = unsafe {
Partition::new(
&__bootloader_dfu_start as *const u32 as usize,
&__bootloader_dfu_end as *const u32 as usize,
)
};
let state = unsafe {
Partition::new(
&__bootloader_state_start as *const u32 as usize,
&__bootloader_state_end as *const u32 as usize,
)
};
trace!("ACTIVE: 0x{:x} - 0x{:x}", active.from, active.to);
trace!("DFU: 0x{:x} - 0x{:x}", dfu.from, dfu.to);
trace!("STATE: 0x{:x} - 0x{:x}", state.from, state.to);
Self::new(active, dfu, state)
}
}
impl BootLoader {
impl<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash, const BUFFER_SIZE: usize>
BootLoader<ACTIVE, DFU, STATE, BUFFER_SIZE>
{
/// Create a new bootloader instance using the supplied partitions for active, dfu and state.
pub fn new(active: Partition, dfu: Partition, state: Partition) -> Self {
pub fn new(config: BootLoaderConfig<ACTIVE, DFU, STATE>) -> Self {
Self {
boot: embassy_boot::BootLoader::new(active, dfu, state),
magic: AlignedBuffer([0; 4]),
page: AlignedBuffer([0; PAGE_SIZE]),
boot: embassy_boot::BootLoader::new(config),
aligned_buf: AlignedBuffer([0; BUFFER_SIZE]),
}
}
/// Inspect the bootloader state and perform actions required before booting, such as swapping
/// firmware.
pub fn prepare<F: FlashConfig>(&mut self, flash: &mut F) -> usize {
match self.boot.prepare_boot(flash, &mut self.magic.0, &mut self.page.0) {
Ok(_) => self.boot.boot_address(),
Err(_) => panic!("boot prepare error!"),
}
pub fn prepare(&mut self) {
self.boot
.prepare_boot(&mut self.aligned_buf.0)
.expect("Boot prepare error");
}
/// Boots the application without softdevice mechanisms.
@ -81,10 +42,12 @@ impl BootLoader {
///
/// This modifies the stack pointer and reset vector and will run code placed in the active partition.
#[cfg(not(feature = "softdevice"))]
pub unsafe fn load(&mut self, start: usize) -> ! {
pub unsafe fn load(self, start: u32) -> ! {
core::mem::drop(self.boot);
let mut p = cortex_m::Peripherals::steal();
p.SCB.invalidate_icache();
p.SCB.vtor.write(start as u32);
p.SCB.vtor.write(start);
cortex_m::asm::bootload(start as *const u32)
}
@ -94,7 +57,7 @@ impl BootLoader {
///
/// This modifies the stack pointer and reset vector and will run code placed in the active partition.
#[cfg(feature = "softdevice")]
pub unsafe fn load(&mut self, _app: usize) -> ! {
pub unsafe fn load(&mut self, _app: u32) -> ! {
use nrf_softdevice_mbr as mbr;
const NRF_SUCCESS: u32 = 0;
@ -149,11 +112,7 @@ pub struct WatchdogFlash<'d> {
impl<'d> WatchdogFlash<'d> {
/// Start a new watchdog with a given flash and WDT peripheral and a timeout
pub fn start(flash: Nvmc<'d>, wdt: WDT, timeout: u32) -> Self {
let mut config = wdt::Config::default();
config.timeout_ticks = 32768 * timeout; // timeout seconds
config.run_during_sleep = true;
config.run_during_debug_halt = false;
pub fn start(flash: Nvmc<'d>, wdt: WDT, config: wdt::Config) -> Self {
let (_wdt, [wdt]) = match wdt::Watchdog::try_new(wdt, config) {
Ok(x) => x,
Err(_) => {

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@ -0,0 +1,79 @@
[package]
edition = "2021"
name = "embassy-boot-rp"
version = "0.1.0"
description = "Bootloader lib for RP2040 chips"
license = "MIT OR Apache-2.0"
[package.metadata.embassy_docs]
src_base = "https://github.com/embassy-rs/embassy/blob/embassy-boot-rp-v$VERSION/src/"
src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-boot/rp/src/"
target = "thumbv6m-none-eabi"
[lib]
[dependencies]
defmt = { version = "0.3", optional = true }
defmt-rtt = { version = "0.4", optional = true }
log = { version = "0.4", optional = true }
embassy-sync = { path = "../../embassy-sync" }
embassy-rp = { path = "../../embassy-rp", default-features = false }
embassy-boot = { path = "../boot", default-features = false }
embassy-time = { path = "../../embassy-time" }
cortex-m = { version = "0.7.6" }
cortex-m-rt = { version = "0.7" }
embedded-storage = "0.3.0"
embedded-storage-async = { version = "0.4.0", optional = true }
cfg-if = "1.0.0"
[features]
defmt = [
"dep:defmt",
"embassy-boot/defmt",
"embassy-rp/defmt",
]
log = [
"dep:log",
"embassy-boot/log",
"embassy-rp/log",
]
debug = ["defmt-rtt"]
nightly = [
"dep:embedded-storage-async",
"embassy-boot/nightly",
"embassy-rp/nightly",
"embassy-time/nightly"
]
[profile.dev]
debug = 2
debug-assertions = true
incremental = false
opt-level = 'z'
overflow-checks = true
[profile.release]
codegen-units = 1
debug = 2
debug-assertions = false
incremental = false
lto = 'fat'
opt-level = 'z'
overflow-checks = false
# do not optimize proc-macro crates = faster builds from scratch
[profile.dev.build-override]
codegen-units = 8
debug = false
debug-assertions = false
opt-level = 0
overflow-checks = false
[profile.release.build-override]
codegen-units = 8
debug = false
debug-assertions = false
opt-level = 0
overflow-checks = false

26
embassy-boot/rp/README.md Normal file
View File

@ -0,0 +1,26 @@
# embassy-boot-rp
An [Embassy](https://embassy.dev) project.
An adaptation of `embassy-boot` for RP2040.
NOTE: The applications using this bootloader should not link with the `link-rp.x` linker script.
## Features
* Configure bootloader partitions based on linker script.
* Load applications from active partition.
## Minimum supported Rust version (MSRV)
`embassy-boot-rp` is guaranteed to compile on the latest stable Rust version at the time of release. It might compile with older versions but that may change in any new patch release.
## License
This work is licensed under either of
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
<http://www.apache.org/licenses/LICENSE-2.0>)
- MIT license ([LICENSE-MIT](LICENSE-MIT) or <http://opensource.org/licenses/MIT>)
at your option.

8
embassy-boot/rp/build.rs Normal file
View File

@ -0,0 +1,8 @@
use std::env;
fn main() {
let target = env::var("TARGET").unwrap();
if target.starts_with("thumbv6m-") {
println!("cargo:rustc-cfg=armv6m");
}
}

View File

@ -195,9 +195,6 @@ macro_rules! unwrap {
}
}
#[cfg(feature = "defmt-timestamp-uptime")]
defmt::timestamp! {"{=u64:us}", crate::time::Instant::now().as_micros() }
#[derive(Debug, Copy, Clone, Eq, PartialEq)]
pub struct NoneError;

102
embassy-boot/rp/src/lib.rs Normal file
View File

@ -0,0 +1,102 @@
#![no_std]
#![warn(missing_docs)]
#![doc = include_str!("../README.md")]
mod fmt;
#[cfg(feature = "nightly")]
pub use embassy_boot::FirmwareUpdater;
pub use embassy_boot::{AlignedBuffer, BlockingFirmwareUpdater, BootLoaderConfig, FirmwareUpdaterConfig, State};
use embassy_rp::flash::{Flash, ERASE_SIZE};
use embassy_rp::peripherals::{FLASH, WATCHDOG};
use embassy_rp::watchdog::Watchdog;
use embassy_time::Duration;
use embedded_storage::nor_flash::{ErrorType, NorFlash, ReadNorFlash};
/// A bootloader for RP2040 devices.
pub struct BootLoader<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash, const BUFFER_SIZE: usize = ERASE_SIZE> {
boot: embassy_boot::BootLoader<ACTIVE, DFU, STATE>,
aligned_buf: AlignedBuffer<BUFFER_SIZE>,
}
impl<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash, const BUFFER_SIZE: usize>
BootLoader<ACTIVE, DFU, STATE, BUFFER_SIZE>
{
/// Create a new bootloader instance using the supplied partitions for active, dfu and state.
pub fn new(config: BootLoaderConfig<ACTIVE, DFU, STATE>) -> Self {
Self {
boot: embassy_boot::BootLoader::new(config),
aligned_buf: AlignedBuffer([0; BUFFER_SIZE]),
}
}
/// Inspect the bootloader state and perform actions required before booting, such as swapping
/// firmware.
pub fn prepare(&mut self) {
self.boot
.prepare_boot(self.aligned_buf.as_mut())
.expect("Boot prepare error");
}
/// Boots the application.
///
/// # Safety
///
/// This modifies the stack pointer and reset vector and will run code placed in the active partition.
pub unsafe fn load(self, start: u32) -> ! {
core::mem::drop(self.boot);
trace!("Loading app at 0x{:x}", start);
#[allow(unused_mut)]
let mut p = cortex_m::Peripherals::steal();
#[cfg(not(armv6m))]
p.SCB.invalidate_icache();
p.SCB.vtor.write(start);
cortex_m::asm::bootload(start as *const u32)
}
}
/// A flash implementation that will feed a watchdog when touching flash.
pub struct WatchdogFlash<'d, const SIZE: usize> {
flash: Flash<'d, FLASH, SIZE>,
watchdog: Watchdog,
}
impl<'d, const SIZE: usize> WatchdogFlash<'d, SIZE> {
/// Start a new watchdog with a given flash and watchdog peripheral and a timeout
pub fn start(flash: FLASH, watchdog: WATCHDOG, timeout: Duration) -> Self {
let flash: Flash<'_, FLASH, SIZE> = Flash::new(flash);
let mut watchdog = Watchdog::new(watchdog);
watchdog.start(timeout);
Self { flash, watchdog }
}
}
impl<'d, const SIZE: usize> ErrorType for WatchdogFlash<'d, SIZE> {
type Error = <Flash<'d, FLASH, SIZE> as ErrorType>::Error;
}
impl<'d, const SIZE: usize> NorFlash for WatchdogFlash<'d, SIZE> {
const WRITE_SIZE: usize = <Flash<'d, FLASH, SIZE> as NorFlash>::WRITE_SIZE;
const ERASE_SIZE: usize = <Flash<'d, FLASH, SIZE> as NorFlash>::ERASE_SIZE;
fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
self.watchdog.feed();
self.flash.erase(from, to)
}
fn write(&mut self, offset: u32, data: &[u8]) -> Result<(), Self::Error> {
self.watchdog.feed();
self.flash.write(offset, data)
}
}
impl<'d, const SIZE: usize> ReadNorFlash for WatchdogFlash<'d, SIZE> {
const READ_SIZE: usize = <Flash<'d, FLASH, SIZE> as ReadNorFlash>::READ_SIZE;
fn read(&mut self, offset: u32, data: &mut [u8]) -> Result<(), Self::Error> {
self.watchdog.feed();
self.flash.read(offset, data)
}
fn capacity(&self) -> usize {
self.flash.capacity()
}
}

View File

@ -15,16 +15,16 @@ target = "thumbv7em-none-eabi"
[dependencies]
defmt = { version = "0.3", optional = true }
defmt-rtt = { version = "0.3", optional = true }
defmt-rtt = { version = "0.4", optional = true }
log = { version = "0.4", optional = true }
embassy-sync = { path = "../../embassy-sync" }
embassy-stm32 = { path = "../../embassy-stm32", default-features = false, features = ["nightly"] }
embassy-stm32 = { path = "../../embassy-stm32", default-features = false }
embassy-boot = { path = "../boot", default-features = false }
cortex-m = { version = "0.7.6" }
cortex-m-rt = { version = "0.7" }
embedded-storage = "0.3.0"
embedded-storage-async = "0.3.0"
embedded-storage-async = { version = "0.4.0", optional = true }
cfg-if = "1.0.0"
[features]
@ -39,6 +39,11 @@ log = [
"embassy-stm32/log",
]
debug = ["defmt-rtt"]
nightly = [
"dep:embedded-storage-async",
"embassy-boot/nightly",
"embassy-stm32/nightly"
]
[profile.dev]
debug = 2

View File

@ -1,11 +1,24 @@
# Bootloader for STM32
# embassy-boot-stm32
The bootloader uses `embassy-boot` to interact with the flash.
An [Embassy](https://embassy.dev) project.
# Usage
An adaptation of `embassy-boot` for STM32.
Flash the bootloader
## Features
```
cargo flash --features embassy-stm32/stm32wl55jc-cm4 --release --chip STM32WLE5JCIx
```
* Configure bootloader partitions based on linker script.
* Load applications from active partition.
## Minimum supported Rust version (MSRV)
`embassy-boot-stm32` is guaranteed to compile on the latest stable Rust version at the time of release. It might compile with older versions but that may change in any new patch release.
## License
This work is licensed under either of
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
<http://www.apache.org/licenses/LICENSE-2.0>)
- MIT license ([LICENSE-MIT](LICENSE-MIT) or <http://opensource.org/licenses/MIT>)
at your option.

View File

@ -1,35 +1,36 @@
#![no_std]
#![feature(type_alias_impl_trait)]
#![warn(missing_docs)]
#![doc = include_str!("../../README.md")]
#![doc = include_str!("../README.md")]
mod fmt;
pub use embassy_boot::{AlignedBuffer, BootFlash, FirmwareUpdater, FlashConfig, Partition, SingleFlashConfig, State};
#[cfg(feature = "nightly")]
pub use embassy_boot::FirmwareUpdater;
pub use embassy_boot::{AlignedBuffer, BlockingFirmwareUpdater, BootLoaderConfig, FirmwareUpdaterConfig, State};
use embedded_storage::nor_flash::NorFlash;
/// A bootloader for STM32 devices.
pub struct BootLoader<const PAGE_SIZE: usize, const WRITE_SIZE: usize> {
boot: embassy_boot::BootLoader,
magic: AlignedBuffer<WRITE_SIZE>,
page: AlignedBuffer<PAGE_SIZE>,
pub struct BootLoader<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash, const BUFFER_SIZE: usize> {
boot: embassy_boot::BootLoader<ACTIVE, DFU, STATE>,
aligned_buf: AlignedBuffer<BUFFER_SIZE>,
}
impl<const PAGE_SIZE: usize, const WRITE_SIZE: usize> BootLoader<PAGE_SIZE, WRITE_SIZE> {
impl<ACTIVE: NorFlash, DFU: NorFlash, STATE: NorFlash, const BUFFER_SIZE: usize>
BootLoader<ACTIVE, DFU, STATE, BUFFER_SIZE>
{
/// Create a new bootloader instance using the supplied partitions for active, dfu and state.
pub fn new(active: Partition, dfu: Partition, state: Partition) -> Self {
pub fn new(config: BootLoaderConfig<ACTIVE, DFU, STATE>) -> Self {
Self {
boot: embassy_boot::BootLoader::new(active, dfu, state),
magic: AlignedBuffer([0; WRITE_SIZE]),
page: AlignedBuffer([0; PAGE_SIZE]),
boot: embassy_boot::BootLoader::new(config),
aligned_buf: AlignedBuffer([0; BUFFER_SIZE]),
}
}
/// Inspect the bootloader state and perform actions required before booting, such as swapping
/// firmware.
pub fn prepare<F: FlashConfig>(&mut self, flash: &mut F) -> usize {
match self.boot.prepare_boot(flash, self.magic.as_mut(), self.page.as_mut()) {
Ok(_) => embassy_stm32::flash::FLASH_BASE + self.boot.boot_address(),
Err(_) => panic!("boot prepare error!"),
}
pub fn prepare(&mut self) {
self.boot
.prepare_boot(self.aligned_buf.as_mut())
.expect("Boot prepare error");
}
/// Boots the application.
@ -37,53 +38,16 @@ impl<const PAGE_SIZE: usize, const WRITE_SIZE: usize> BootLoader<PAGE_SIZE, WRIT
/// # Safety
///
/// This modifies the stack pointer and reset vector and will run code placed in the active partition.
pub unsafe fn load(&mut self, start: usize) -> ! {
pub unsafe fn load(self, start: u32) -> ! {
core::mem::drop(self.boot);
trace!("Loading app at 0x{:x}", start);
#[allow(unused_mut)]
let mut p = cortex_m::Peripherals::steal();
#[cfg(not(armv6m))]
p.SCB.invalidate_icache();
p.SCB.vtor.write(start as u32);
p.SCB.vtor.write(start);
cortex_m::asm::bootload(start as *const u32)
}
}
impl<const PAGE_SIZE: usize, const WRITE_SIZE: usize> Default for BootLoader<PAGE_SIZE, WRITE_SIZE> {
/// Create a new bootloader instance using parameters from linker script
fn default() -> Self {
extern "C" {
static __bootloader_state_start: u32;
static __bootloader_state_end: u32;
static __bootloader_active_start: u32;
static __bootloader_active_end: u32;
static __bootloader_dfu_start: u32;
static __bootloader_dfu_end: u32;
}
let active = unsafe {
Partition::new(
&__bootloader_active_start as *const u32 as usize,
&__bootloader_active_end as *const u32 as usize,
)
};
let dfu = unsafe {
Partition::new(
&__bootloader_dfu_start as *const u32 as usize,
&__bootloader_dfu_end as *const u32 as usize,
)
};
let state = unsafe {
Partition::new(
&__bootloader_state_start as *const u32 as usize,
&__bootloader_state_end as *const u32 as usize,
)
};
trace!("ACTIVE: 0x{:x} - 0x{:x}", active.from, active.to);
trace!("DFU: 0x{:x} - 0x{:x}", dfu.from, dfu.to);
trace!("STATE: 0x{:x} - 0x{:x}", state.from, state.to);
Self::new(active, dfu, state)
}
}

View File

@ -1,47 +0,0 @@
[package]
name = "embassy-cortex-m"
version = "0.1.0"
edition = "2021"
license = "MIT OR Apache-2.0"
[package.metadata.embassy_docs]
src_base = "https://github.com/embassy-rs/embassy/blob/embassy-cortex-m-v$VERSION/embassy-cortex-m/src/"
src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-cortex-m/src/"
features = ["prio-bits-3"]
flavors = [
{ name = "thumbv6m-none-eabi", target = "thumbv6m-none-eabi", features = [] },
{ name = "thumbv7m-none-eabi", target = "thumbv7m-none-eabi", features = [] },
{ name = "thumbv7em-none-eabi", target = "thumbv7em-none-eabi", features = [] },
{ name = "thumbv7em-none-eabihf", target = "thumbv7em-none-eabihf", features = [] },
{ name = "thumbv8m.base-none-eabi", target = "thumbv8m.base-none-eabi", features = [] },
{ name = "thumbv8m.main-none-eabi", target = "thumbv8m.main-none-eabi", features = [] },
{ name = "thumbv8m.main-none-eabihf", target = "thumbv8m.main-none-eabihf", features = [] },
]
[features]
default = []
# Define the number of NVIC priority bits.
prio-bits-0 = []
prio-bits-1 = []
prio-bits-2 = []
prio-bits-3 = []
prio-bits-4 = []
prio-bits-5 = []
prio-bits-6 = []
prio-bits-7 = []
prio-bits-8 = []
[dependencies]
defmt = { version = "0.3", optional = true }
log = { version = "0.4.14", optional = true }
embassy-sync = { version = "0.1.0", path = "../embassy-sync" }
embassy-executor = { version = "0.1.0", path = "../embassy-executor"}
embassy-macros = { version = "0.1.0", path = "../embassy-macros"}
embassy-hal-common = { version = "0.1.0", path = "../embassy-hal-common"}
atomic-polyfill = "1.0.1"
critical-section = "1.1"
cfg-if = "1.0.0"
cortex-m = "0.7.6"

View File

@ -1,89 +0,0 @@
//! Executor specific to cortex-m devices.
use core::marker::PhantomData;
pub use embassy_executor::*;
use crate::interrupt::{Interrupt, InterruptExt};
fn pend_by_number(n: u16) {
#[derive(Clone, Copy)]
struct N(u16);
unsafe impl cortex_m::interrupt::InterruptNumber for N {
fn number(self) -> u16 {
self.0
}
}
cortex_m::peripheral::NVIC::pend(N(n))
}
/// Interrupt mode executor.
///
/// This executor runs tasks in interrupt mode. The interrupt handler is set up
/// to poll tasks, and when a task is woken the interrupt is pended from software.
///
/// This allows running async tasks at a priority higher than thread mode. One
/// use case is to leave thread mode free for non-async tasks. Another use case is
/// to run multiple executors: one in thread mode for low priority tasks and another in
/// interrupt mode for higher priority tasks. Higher priority tasks will preempt lower
/// priority ones.
///
/// It is even possible to run multiple interrupt mode executors at different priorities,
/// by assigning different priorities to the interrupts. For an example on how to do this,
/// See the 'multiprio' example for 'embassy-nrf'.
///
/// To use it, you have to pick an interrupt that won't be used by the hardware.
/// Some chips reserve some interrupts for this purpose, sometimes named "software interrupts" (SWI).
/// If this is not the case, you may use an interrupt from any unused peripheral.
///
/// It is somewhat more complex to use, it's recommended to use the thread-mode
/// [`Executor`] instead, if it works for your use case.
pub struct InterruptExecutor<I: Interrupt> {
irq: I,
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
}
impl<I: Interrupt> InterruptExecutor<I> {
/// Create a new Executor.
pub fn new(irq: I) -> Self {
let ctx = irq.number() as *mut ();
Self {
irq,
inner: raw::Executor::new(|ctx| pend_by_number(ctx as u16), ctx),
not_send: PhantomData,
}
}
/// Start the executor.
///
/// This initializes the executor, configures and enables the interrupt, and returns.
/// The executor keeps running in the background through the interrupt.
///
/// This returns a [`SendSpawner`] you can use to spawn tasks on it. A [`SendSpawner`]
/// is returned instead of a [`Spawner`](embassy_executor::Spawner) because the executor effectively runs in a
/// different "thread" (the interrupt), so spawning tasks on it is effectively
/// sending them.
///
/// To obtain a [`Spawner`](embassy_executor::Spawner) for this executor, use [`Spawner::for_current_executor()`](embassy_executor::Spawner::for_current_executor()) from
/// a task running in it.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
pub fn start(&'static mut self) -> SendSpawner {
self.irq.disable();
self.irq.set_handler(|ctx| unsafe {
let executor = &*(ctx as *const raw::Executor);
executor.poll();
});
self.irq.set_handler_context(&self.inner as *const _ as _);
self.irq.enable();
self.inner.spawner().make_send()
}
}

View File

@ -1,10 +0,0 @@
//! Embassy executor and interrupt handling specific to cortex-m devices.
#![no_std]
#![warn(missing_docs)]
// This mod MUST go first, so that the others see its macros.
pub(crate) mod fmt;
pub mod executor;
pub mod interrupt;
pub mod peripheral;

View File

@ -1,144 +0,0 @@
//! Peripheral interrupt handling specific to cortex-m devices.
use core::mem::MaybeUninit;
use cortex_m::peripheral::scb::VectActive;
use cortex_m::peripheral::{NVIC, SCB};
use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
use crate::interrupt::{Interrupt, InterruptExt, Priority};
/// A type which can be used as state with `PeripheralMutex`.
///
/// It needs to be `Send` because `&mut` references are sent back and forth between the 'thread' which owns the `PeripheralMutex` and the interrupt,
/// and `&mut T` is only `Send` where `T: Send`.
pub trait PeripheralState: Send {
/// The interrupt that is used for this peripheral.
type Interrupt: Interrupt;
/// The interrupt handler that should be invoked for the peripheral. Implementations need to clear the appropriate interrupt flags to ensure the handle will not be called again.
fn on_interrupt(&mut self);
}
/// A type for storing the state of a peripheral that can be stored in a static.
pub struct StateStorage<S>(MaybeUninit<S>);
impl<S> StateStorage<S> {
/// Create a new instance for storing peripheral state.
pub const fn new() -> Self {
Self(MaybeUninit::uninit())
}
}
/// A type for a peripheral that keeps the state of a peripheral that can be accessed from thread mode and an interrupt handler in
/// a safe way.
pub struct PeripheralMutex<'a, S: PeripheralState> {
state: *mut S,
irq: PeripheralRef<'a, S::Interrupt>,
}
/// Whether `irq` can be preempted by the current interrupt.
pub(crate) fn can_be_preempted(irq: &impl Interrupt) -> bool {
match SCB::vect_active() {
// Thread mode can't preempt anything.
VectActive::ThreadMode => false,
// Exceptions don't always preempt interrupts,
// but there isn't much of a good reason to be keeping a `PeripheralMutex` in an exception anyway.
VectActive::Exception(_) => true,
VectActive::Interrupt { irqn } => {
#[derive(Clone, Copy)]
struct NrWrap(u16);
unsafe impl cortex_m::interrupt::InterruptNumber for NrWrap {
fn number(self) -> u16 {
self.0
}
}
NVIC::get_priority(NrWrap(irqn.into())) < irq.get_priority().into()
}
}
}
impl<'a, S: PeripheralState> PeripheralMutex<'a, S> {
/// Create a new `PeripheralMutex` wrapping `irq`, with `init` initializing the initial state.
///
/// Registers `on_interrupt` as the `irq`'s handler, and enables it.
pub fn new(
irq: impl Peripheral<P = S::Interrupt> + 'a,
storage: &'a mut StateStorage<S>,
init: impl FnOnce() -> S,
) -> Self {
into_ref!(irq);
if can_be_preempted(&*irq) {
panic!(
"`PeripheralMutex` cannot be created in an interrupt with higher priority than the interrupt it wraps"
);
}
let state_ptr = storage.0.as_mut_ptr();
// Safety: The pointer is valid and not used by anyone else
// because we have the `&mut StateStorage`.
unsafe { state_ptr.write(init()) };
irq.disable();
irq.set_handler(|p| unsafe {
// Safety: it's OK to get a &mut to the state, since
// - We checked that the thread owning the `PeripheralMutex` can't preempt us in `new`.
// Interrupts' priorities can only be changed with raw embassy `Interrupts`,
// which can't safely store a `PeripheralMutex` across invocations.
// - We can't have preempted a with() call because the irq is disabled during it.
let state = &mut *(p as *mut S);
state.on_interrupt();
});
irq.set_handler_context(state_ptr as *mut ());
irq.enable();
Self { irq, state: state_ptr }
}
/// Access the peripheral state ensuring interrupts are disabled so that the state can be
/// safely accessed.
pub fn with<R>(&mut self, f: impl FnOnce(&mut S) -> R) -> R {
self.irq.disable();
// Safety: it's OK to get a &mut to the state, since the irq is disabled.
let state = unsafe { &mut *self.state };
let r = f(state);
self.irq.enable();
r
}
/// Returns whether the wrapped interrupt is currently in a pending state.
pub fn is_pending(&self) -> bool {
self.irq.is_pending()
}
/// Forces the wrapped interrupt into a pending state.
pub fn pend(&self) {
self.irq.pend()
}
/// Forces the wrapped interrupt out of a pending state.
pub fn unpend(&self) {
self.irq.unpend()
}
/// Gets the priority of the wrapped interrupt.
pub fn priority(&self) -> Priority {
self.irq.get_priority()
}
}
impl<'a, S: PeripheralState> Drop for PeripheralMutex<'a, S> {
fn drop(&mut self) {
self.irq.disable();
self.irq.remove_handler();
// safety:
// - we initialized the state in `new`, so we know it's initialized.
// - the irq is disabled, so it won't preempt us while dropping.
unsafe { self.state.drop_in_place() }
}
}

View File

@ -14,15 +14,22 @@ target = "x86_64-unknown-linux-gnu"
[features]
std = []
# Enable nightly-only features
nightly = ["embedded-hal-async", "embedded-storage-async"]
nightly = ["embassy-futures", "embedded-hal-async", "embedded-storage-async"]
[dependencies]
embassy-sync = { version = "0.1.0", path = "../embassy-sync" }
embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
embedded-hal-async = { version = "=0.1.0-alpha.3", optional = true }
embassy-futures = { version = "0.1.0", path = "../embassy-futures", optional = true }
embassy-sync = { version = "0.2.0", path = "../embassy-sync" }
embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = [
"unproven",
] }
embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
embedded-hal-async = { version = "=0.2.0-alpha.1", optional = true }
embedded-storage = "0.3.0"
embedded-storage-async = { version = "0.3.0", optional = true }
embedded-storage-async = { version = "0.4.0", optional = true }
nb = "1.0.0"
defmt = { version = "0.3", optional = true }
[dev-dependencies]
critical-section = { version = "1.1.1", features = ["std"] }
futures-test = "0.3.17"

View File

@ -1,242 +0,0 @@
//! Adapters between embedded-hal traits.
use core::future::Future;
use embedded_hal_02::{blocking, serial};
/// Wrapper that implements async traits using blocking implementations.
///
/// This allows driver writers to depend on the async traits while still supporting embedded-hal peripheral implementations.
///
/// BlockingAsync will implement any async trait that maps to embedded-hal traits implemented for the wrapped driver.
///
/// Driver users are then free to choose which implementation that is available to them.
pub struct BlockingAsync<T> {
wrapped: T,
}
impl<T> BlockingAsync<T> {
/// Create a new instance of a wrapper for a given peripheral.
pub fn new(wrapped: T) -> Self {
Self { wrapped }
}
}
//
// I2C implementations
//
impl<T, E> embedded_hal_1::i2c::ErrorType for BlockingAsync<T>
where
E: embedded_hal_1::i2c::Error + 'static,
T: blocking::i2c::WriteRead<Error = E> + blocking::i2c::Read<Error = E> + blocking::i2c::Write<Error = E>,
{
type Error = E;
}
impl<T, E> embedded_hal_async::i2c::I2c for BlockingAsync<T>
where
E: embedded_hal_1::i2c::Error + 'static,
T: blocking::i2c::WriteRead<Error = E> + blocking::i2c::Read<Error = E> + blocking::i2c::Write<Error = E>,
{
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
type WriteReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
async move { self.wrapped.read(address, buffer) }
}
fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> {
async move { self.wrapped.write(address, bytes) }
}
fn write_read<'a>(&'a mut self, address: u8, bytes: &'a [u8], buffer: &'a mut [u8]) -> Self::WriteReadFuture<'a> {
async move { self.wrapped.write_read(address, bytes, buffer) }
}
type TransactionFuture<'a, 'b> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a, 'b: 'a;
fn transaction<'a, 'b>(
&'a mut self,
address: u8,
operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
) -> Self::TransactionFuture<'a, 'b> {
let _ = address;
let _ = operations;
async move { todo!() }
}
}
//
// SPI implementatinos
//
impl<T, E> embedded_hal_async::spi::ErrorType for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
type Error = E;
}
impl<T, E> embedded_hal_async::spi::SpiBus<u8> for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error + 'static,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
type TransferFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn transfer<'a>(&'a mut self, read: &'a mut [u8], write: &'a [u8]) -> Self::TransferFuture<'a> {
async move {
// Ensure we write the expected bytes
for i in 0..core::cmp::min(read.len(), write.len()) {
read[i] = write[i].clone();
}
self.wrapped.transfer(read)?;
Ok(())
}
}
type TransferInPlaceFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn transfer_in_place<'a>(&'a mut self, _: &'a mut [u8]) -> Self::TransferInPlaceFuture<'a> {
async move { todo!() }
}
}
impl<T, E> embedded_hal_async::spi::SpiBusFlush for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error + 'static,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
type FlushFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> {
async move { Ok(()) }
}
}
impl<T, E> embedded_hal_async::spi::SpiBusWrite<u8> for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error + 'static,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn write<'a>(&'a mut self, data: &'a [u8]) -> Self::WriteFuture<'a> {
async move {
self.wrapped.write(data)?;
Ok(())
}
}
}
impl<T, E> embedded_hal_async::spi::SpiBusRead<u8> for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error + 'static,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> {
async move {
self.wrapped.transfer(data)?;
Ok(())
}
}
}
// Uart implementatinos
impl<T, E> embedded_hal_1::serial::ErrorType for BlockingAsync<T>
where
T: serial::Read<u8, Error = E>,
E: embedded_hal_1::serial::Error + 'static,
{
type Error = E;
}
#[cfg(feature = "_todo_embedded_hal_serial")]
impl<T, E> embedded_hal_async::serial::Read for BlockingAsync<T>
where
T: serial::Read<u8, Error = E>,
E: embedded_hal_1::serial::Error + 'static,
{
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where T: 'a;
fn read<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadFuture<'a> {
async move {
let mut pos = 0;
while pos < buf.len() {
match self.wrapped.read() {
Err(nb::Error::WouldBlock) => {}
Err(nb::Error::Other(e)) => return Err(e),
Ok(b) => {
buf[pos] = b;
pos += 1;
}
}
}
Ok(())
}
}
}
#[cfg(feature = "_todo_embedded_hal_serial")]
impl<T, E> embedded_hal_async::serial::Write for BlockingAsync<T>
where
T: blocking::serial::Write<u8, Error = E> + serial::Read<u8, Error = E>,
E: embedded_hal_1::serial::Error + 'static,
{
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where T: 'a;
fn write<'a>(&'a mut self, buf: &'a [u8]) -> Self::WriteFuture<'a> {
async move { self.wrapped.bwrite_all(buf) }
}
type FlushFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where T: 'a;
fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> {
async move { self.wrapped.bflush() }
}
}
/// NOR flash wrapper
use embedded_storage::nor_flash::{ErrorType, NorFlash, ReadNorFlash};
use embedded_storage_async::nor_flash::{AsyncNorFlash, AsyncReadNorFlash};
impl<T> ErrorType for BlockingAsync<T>
where
T: ErrorType,
{
type Error = T::Error;
}
impl<T> AsyncNorFlash for BlockingAsync<T>
where
T: NorFlash,
{
const WRITE_SIZE: usize = <T as NorFlash>::WRITE_SIZE;
const ERASE_SIZE: usize = <T as NorFlash>::ERASE_SIZE;
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn write<'a>(&'a mut self, offset: u32, data: &'a [u8]) -> Self::WriteFuture<'a> {
async move { self.wrapped.write(offset, data) }
}
type EraseFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn erase<'a>(&'a mut self, from: u32, to: u32) -> Self::EraseFuture<'a> {
async move { self.wrapped.erase(from, to) }
}
}
impl<T> AsyncReadNorFlash for BlockingAsync<T>
where
T: ReadNorFlash,
{
const READ_SIZE: usize = <T as ReadNorFlash>::READ_SIZE;
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn read<'a>(&'a mut self, address: u32, data: &'a mut [u8]) -> Self::ReadFuture<'a> {
async move { self.wrapped.read(address, data) }
}
fn capacity(&self) -> usize {
self.wrapped.capacity()
}
}

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use embedded_hal_02::{blocking, serial};
/// Wrapper that implements async traits using blocking implementations.
///
/// This allows driver writers to depend on the async traits while still supporting embedded-hal peripheral implementations.
///
/// BlockingAsync will implement any async trait that maps to embedded-hal traits implemented for the wrapped driver.
///
/// Driver users are then free to choose which implementation that is available to them.
pub struct BlockingAsync<T> {
wrapped: T,
}
impl<T> BlockingAsync<T> {
/// Create a new instance of a wrapper for a given peripheral.
pub fn new(wrapped: T) -> Self {
Self { wrapped }
}
}
//
// I2C implementations
//
impl<T, E> embedded_hal_1::i2c::ErrorType for BlockingAsync<T>
where
E: embedded_hal_1::i2c::Error + 'static,
T: blocking::i2c::WriteRead<Error = E> + blocking::i2c::Read<Error = E> + blocking::i2c::Write<Error = E>,
{
type Error = E;
}
impl<T, E> embedded_hal_async::i2c::I2c for BlockingAsync<T>
where
E: embedded_hal_1::i2c::Error + 'static,
T: blocking::i2c::WriteRead<Error = E> + blocking::i2c::Read<Error = E> + blocking::i2c::Write<Error = E>,
{
async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
self.wrapped.read(address, read)
}
async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
self.wrapped.write(address, write)
}
async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
self.wrapped.write_read(address, write, read)
}
async fn transaction(
&mut self,
address: u8,
operations: &mut [embedded_hal_1::i2c::Operation<'_>],
) -> Result<(), Self::Error> {
let _ = address;
let _ = operations;
todo!()
}
}
//
// SPI implementatinos
//
impl<T, E> embedded_hal_async::spi::ErrorType for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
type Error = E;
}
impl<T, E> embedded_hal_async::spi::SpiBus<u8> for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error + 'static,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
async fn transfer<'a>(&'a mut self, read: &'a mut [u8], write: &'a [u8]) -> Result<(), Self::Error> {
// Ensure we write the expected bytes
for i in 0..core::cmp::min(read.len(), write.len()) {
read[i] = write[i].clone();
}
self.wrapped.transfer(read)?;
Ok(())
}
async fn transfer_in_place<'a>(&'a mut self, _: &'a mut [u8]) -> Result<(), Self::Error> {
todo!()
}
}
impl<T, E> embedded_hal_async::spi::SpiBusFlush for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error + 'static,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
async fn flush(&mut self) -> Result<(), Self::Error> {
Ok(())
}
}
impl<T, E> embedded_hal_async::spi::SpiBusWrite<u8> for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error + 'static,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
async fn write(&mut self, data: &[u8]) -> Result<(), Self::Error> {
self.wrapped.write(data)?;
Ok(())
}
}
impl<T, E> embedded_hal_async::spi::SpiBusRead<u8> for BlockingAsync<T>
where
E: embedded_hal_1::spi::Error + 'static,
T: blocking::spi::Transfer<u8, Error = E> + blocking::spi::Write<u8, Error = E>,
{
async fn read(&mut self, data: &mut [u8]) -> Result<(), Self::Error> {
self.wrapped.transfer(data)?;
Ok(())
}
}
// Uart implementatinos
impl<T, E> embedded_hal_1::serial::ErrorType for BlockingAsync<T>
where
T: serial::Read<u8, Error = E>,
E: embedded_hal_1::serial::Error + 'static,
{
type Error = E;
}
/// NOR flash wrapper
use embedded_storage::nor_flash::{ErrorType, NorFlash, ReadNorFlash};
use embedded_storage_async::nor_flash::{NorFlash as AsyncNorFlash, ReadNorFlash as AsyncReadNorFlash};
impl<T> ErrorType for BlockingAsync<T>
where
T: ErrorType,
{
type Error = T::Error;
}
impl<T> AsyncNorFlash for BlockingAsync<T>
where
T: NorFlash,
{
const WRITE_SIZE: usize = <T as NorFlash>::WRITE_SIZE;
const ERASE_SIZE: usize = <T as NorFlash>::ERASE_SIZE;
async fn write(&mut self, offset: u32, data: &[u8]) -> Result<(), Self::Error> {
self.wrapped.write(offset, data)
}
async fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
self.wrapped.erase(from, to)
}
}
impl<T> AsyncReadNorFlash for BlockingAsync<T>
where
T: ReadNorFlash,
{
const READ_SIZE: usize = <T as ReadNorFlash>::READ_SIZE;
async fn read(&mut self, address: u32, data: &mut [u8]) -> Result<(), Self::Error> {
self.wrapped.read(address, data)
}
fn capacity(&self) -> usize {
self.wrapped.capacity()
}
}

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//! Adapters between embedded-hal traits.
mod blocking_async;
mod yielding_async;
pub use blocking_async::BlockingAsync;
pub use yielding_async::YieldingAsync;

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use embassy_futures::yield_now;
/// Wrapper that yields for each operation to the wrapped instance
///
/// This can be used in combination with BlockingAsync<T> to enforce yields
/// between long running blocking operations.
pub struct YieldingAsync<T> {
wrapped: T,
}
impl<T> YieldingAsync<T> {
/// Create a new instance of a wrapper that yields after each operation.
pub fn new(wrapped: T) -> Self {
Self { wrapped }
}
}
//
// I2C implementations
//
impl<T> embedded_hal_1::i2c::ErrorType for YieldingAsync<T>
where
T: embedded_hal_1::i2c::ErrorType,
{
type Error = T::Error;
}
impl<T> embedded_hal_async::i2c::I2c for YieldingAsync<T>
where
T: embedded_hal_async::i2c::I2c,
{
async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
self.wrapped.read(address, read).await?;
yield_now().await;
Ok(())
}
async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
self.wrapped.write(address, write).await?;
yield_now().await;
Ok(())
}
async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
self.wrapped.write_read(address, write, read).await?;
yield_now().await;
Ok(())
}
async fn transaction(
&mut self,
address: u8,
operations: &mut [embedded_hal_1::i2c::Operation<'_>],
) -> Result<(), Self::Error> {
self.wrapped.transaction(address, operations).await?;
yield_now().await;
Ok(())
}
}
//
// SPI implementations
//
impl<T> embedded_hal_async::spi::ErrorType for YieldingAsync<T>
where
T: embedded_hal_async::spi::ErrorType,
{
type Error = T::Error;
}
impl<T> embedded_hal_async::spi::SpiBus<u8> for YieldingAsync<T>
where
T: embedded_hal_async::spi::SpiBus,
{
async fn transfer<'a>(&'a mut self, read: &'a mut [u8], write: &'a [u8]) -> Result<(), Self::Error> {
self.wrapped.transfer(read, write).await?;
yield_now().await;
Ok(())
}
async fn transfer_in_place<'a>(&'a mut self, words: &'a mut [u8]) -> Result<(), Self::Error> {
self.wrapped.transfer_in_place(words).await?;
yield_now().await;
Ok(())
}
}
impl<T> embedded_hal_async::spi::SpiBusFlush for YieldingAsync<T>
where
T: embedded_hal_async::spi::SpiBusFlush,
{
async fn flush(&mut self) -> Result<(), Self::Error> {
self.wrapped.flush().await?;
yield_now().await;
Ok(())
}
}
impl<T> embedded_hal_async::spi::SpiBusWrite<u8> for YieldingAsync<T>
where
T: embedded_hal_async::spi::SpiBusWrite<u8>,
{
async fn write(&mut self, data: &[u8]) -> Result<(), Self::Error> {
self.wrapped.write(data).await?;
yield_now().await;
Ok(())
}
}
impl<T> embedded_hal_async::spi::SpiBusRead<u8> for YieldingAsync<T>
where
T: embedded_hal_async::spi::SpiBusRead<u8>,
{
async fn read(&mut self, data: &mut [u8]) -> Result<(), Self::Error> {
self.wrapped.read(data).await?;
yield_now().await;
Ok(())
}
}
///
/// NOR flash implementations
///
impl<T: embedded_storage::nor_flash::ErrorType> embedded_storage::nor_flash::ErrorType for YieldingAsync<T> {
type Error = T::Error;
}
impl<T: embedded_storage_async::nor_flash::ReadNorFlash> embedded_storage_async::nor_flash::ReadNorFlash
for YieldingAsync<T>
{
const READ_SIZE: usize = T::READ_SIZE;
async fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
self.wrapped.read(offset, bytes).await?;
Ok(())
}
fn capacity(&self) -> usize {
self.wrapped.capacity()
}
}
impl<T: embedded_storage_async::nor_flash::NorFlash> embedded_storage_async::nor_flash::NorFlash for YieldingAsync<T> {
const WRITE_SIZE: usize = T::WRITE_SIZE;
const ERASE_SIZE: usize = T::ERASE_SIZE;
async fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
self.wrapped.write(offset, bytes).await?;
yield_now().await;
Ok(())
}
async fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
// Yield between each actual erase
for from in (from..to).step_by(T::ERASE_SIZE) {
let to = core::cmp::min(from + T::ERASE_SIZE as u32, to);
self.wrapped.erase(from, to).await?;
yield_now().await;
}
Ok(())
}
}
#[cfg(test)]
mod tests {
use embedded_storage_async::nor_flash::NorFlash;
use super::*;
use crate::flash::mem_flash::MemFlash;
#[futures_test::test]
async fn can_erase() {
let flash = MemFlash::<1024, 128, 4>::new(0x00);
let mut yielding = YieldingAsync::new(flash);
yielding.erase(0, 256).await.unwrap();
let flash = yielding.wrapped;
assert_eq!(2, flash.erases.len());
assert_eq!((0, 128), flash.erases[0]);
assert_eq!((128, 256), flash.erases[1]);
}
}

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use embedded_storage::nor_flash::{ErrorType, NorFlash, NorFlashError, ReadNorFlash};
#[cfg(feature = "nightly")]
use embedded_storage_async::nor_flash::{NorFlash as AsyncNorFlash, ReadNorFlash as AsyncReadNorFlash};
/// Convenience helper for concatenating two consecutive flashes into one.
/// This is especially useful if used with "flash regions", where one may
/// want to concatenate multiple regions into one larger region.
pub struct ConcatFlash<First, Second>(First, Second);
impl<First, Second> ConcatFlash<First, Second> {
/// Create a new flash that concatenates two consecutive flashes.
pub fn new(first: First, second: Second) -> Self {
Self(first, second)
}
}
const fn get_read_size(first_read_size: usize, second_read_size: usize) -> usize {
if first_read_size != second_read_size {
panic!("The read size for the concatenated flashes must be the same");
}
first_read_size
}
const fn get_write_size(first_write_size: usize, second_write_size: usize) -> usize {
if first_write_size != second_write_size {
panic!("The write size for the concatenated flashes must be the same");
}
first_write_size
}
const fn get_max_erase_size(first_erase_size: usize, second_erase_size: usize) -> usize {
let max_erase_size = if first_erase_size > second_erase_size {
first_erase_size
} else {
second_erase_size
};
if max_erase_size % first_erase_size != 0 || max_erase_size % second_erase_size != 0 {
panic!("The erase sizes for the concatenated flashes must have have a gcd equal to the max erase size");
}
max_erase_size
}
impl<First, Second, E> ErrorType for ConcatFlash<First, Second>
where
First: ErrorType<Error = E>,
Second: ErrorType<Error = E>,
E: NorFlashError,
{
type Error = E;
}
impl<First, Second, E> ReadNorFlash for ConcatFlash<First, Second>
where
First: ReadNorFlash<Error = E>,
Second: ReadNorFlash<Error = E>,
E: NorFlashError,
{
const READ_SIZE: usize = get_read_size(First::READ_SIZE, Second::READ_SIZE);
fn read(&mut self, mut offset: u32, mut bytes: &mut [u8]) -> Result<(), E> {
if offset < self.0.capacity() as u32 {
let len = core::cmp::min(self.0.capacity() - offset as usize, bytes.len());
self.0.read(offset, &mut bytes[..len])?;
offset += len as u32;
bytes = &mut bytes[len..];
}
if !bytes.is_empty() {
self.1.read(offset - self.0.capacity() as u32, bytes)?;
}
Ok(())
}
fn capacity(&self) -> usize {
self.0.capacity() + self.1.capacity()
}
}
impl<First, Second, E> NorFlash for ConcatFlash<First, Second>
where
First: NorFlash<Error = E>,
Second: NorFlash<Error = E>,
E: NorFlashError,
{
const WRITE_SIZE: usize = get_write_size(First::WRITE_SIZE, Second::WRITE_SIZE);
const ERASE_SIZE: usize = get_max_erase_size(First::ERASE_SIZE, Second::ERASE_SIZE);
fn write(&mut self, mut offset: u32, mut bytes: &[u8]) -> Result<(), E> {
if offset < self.0.capacity() as u32 {
let len = core::cmp::min(self.0.capacity() - offset as usize, bytes.len());
self.0.write(offset, &bytes[..len])?;
offset += len as u32;
bytes = &bytes[len..];
}
if !bytes.is_empty() {
self.1.write(offset - self.0.capacity() as u32, bytes)?;
}
Ok(())
}
fn erase(&mut self, mut from: u32, to: u32) -> Result<(), E> {
if from < self.0.capacity() as u32 {
let to = core::cmp::min(self.0.capacity() as u32, to);
self.0.erase(from, to)?;
from = self.0.capacity() as u32;
}
if from < to {
self.1
.erase(from - self.0.capacity() as u32, to - self.0.capacity() as u32)?;
}
Ok(())
}
}
#[cfg(feature = "nightly")]
impl<First, Second, E> AsyncReadNorFlash for ConcatFlash<First, Second>
where
First: AsyncReadNorFlash<Error = E>,
Second: AsyncReadNorFlash<Error = E>,
E: NorFlashError,
{
const READ_SIZE: usize = get_read_size(First::READ_SIZE, Second::READ_SIZE);
async fn read(&mut self, mut offset: u32, mut bytes: &mut [u8]) -> Result<(), E> {
if offset < self.0.capacity() as u32 {
let len = core::cmp::min(self.0.capacity() - offset as usize, bytes.len());
self.0.read(offset, &mut bytes[..len]).await?;
offset += len as u32;
bytes = &mut bytes[len..];
}
if !bytes.is_empty() {
self.1.read(offset - self.0.capacity() as u32, bytes).await?;
}
Ok(())
}
fn capacity(&self) -> usize {
self.0.capacity() + self.1.capacity()
}
}
#[cfg(feature = "nightly")]
impl<First, Second, E> AsyncNorFlash for ConcatFlash<First, Second>
where
First: AsyncNorFlash<Error = E>,
Second: AsyncNorFlash<Error = E>,
E: NorFlashError,
{
const WRITE_SIZE: usize = get_write_size(First::WRITE_SIZE, Second::WRITE_SIZE);
const ERASE_SIZE: usize = get_max_erase_size(First::ERASE_SIZE, Second::ERASE_SIZE);
async fn write(&mut self, mut offset: u32, mut bytes: &[u8]) -> Result<(), E> {
if offset < self.0.capacity() as u32 {
let len = core::cmp::min(self.0.capacity() - offset as usize, bytes.len());
self.0.write(offset, &bytes[..len]).await?;
offset += len as u32;
bytes = &bytes[len..];
}
if !bytes.is_empty() {
self.1.write(offset - self.0.capacity() as u32, bytes).await?;
}
Ok(())
}
async fn erase(&mut self, mut from: u32, to: u32) -> Result<(), E> {
if from < self.0.capacity() as u32 {
let to = core::cmp::min(self.0.capacity() as u32, to);
self.0.erase(from, to).await?;
from = self.0.capacity() as u32;
}
if from < to {
self.1
.erase(from - self.0.capacity() as u32, to - self.0.capacity() as u32)
.await?;
}
Ok(())
}
}
#[cfg(test)]
mod tests {
use embedded_storage::nor_flash::{NorFlash, ReadNorFlash};
use super::ConcatFlash;
use crate::flash::mem_flash::MemFlash;
#[test]
fn can_write_and_read_across_flashes() {
let first = MemFlash::<64, 16, 4>::default();
let second = MemFlash::<64, 64, 4>::default();
let mut f = ConcatFlash::new(first, second);
f.write(60, &[0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88]).unwrap();
assert_eq!(&[0x11, 0x22, 0x33, 0x44], &f.0.mem[60..]);
assert_eq!(&[0x55, 0x66, 0x77, 0x88], &f.1.mem[0..4]);
let mut read_buf = [0; 8];
f.read(60, &mut read_buf).unwrap();
assert_eq!(&[0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88], &read_buf);
}
#[test]
fn can_erase_across_flashes() {
let first = MemFlash::<128, 16, 4>::new(0x00);
let second = MemFlash::<128, 64, 4>::new(0x00);
let mut f = ConcatFlash::new(first, second);
f.erase(64, 192).unwrap();
assert_eq!(&[0x00; 64], &f.0.mem[0..64]);
assert_eq!(&[0xff; 64], &f.0.mem[64..128]);
assert_eq!(&[0xff; 64], &f.1.mem[0..64]);
assert_eq!(&[0x00; 64], &f.1.mem[64..128]);
}
}

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use alloc::vec::Vec;
use embedded_storage::nor_flash::{ErrorType, NorFlash, ReadNorFlash};
#[cfg(feature = "nightly")]
use embedded_storage_async::nor_flash::{NorFlash as AsyncNorFlash, ReadNorFlash as AsyncReadNorFlash};
extern crate alloc;
pub(crate) struct MemFlash<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> {
pub mem: [u8; SIZE],
pub writes: Vec<(u32, usize)>,
pub erases: Vec<(u32, u32)>,
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE> {
#[allow(unused)]
pub const fn new(fill: u8) -> Self {
Self {
mem: [fill; SIZE],
writes: Vec::new(),
erases: Vec::new(),
}
}
fn read(&mut self, offset: u32, bytes: &mut [u8]) {
let len = bytes.len();
bytes.copy_from_slice(&self.mem[offset as usize..offset as usize + len]);
}
fn write(&mut self, offset: u32, bytes: &[u8]) {
self.writes.push((offset, bytes.len()));
let offset = offset as usize;
assert_eq!(0, bytes.len() % WRITE_SIZE);
assert_eq!(0, offset % WRITE_SIZE);
assert!(offset + bytes.len() <= SIZE);
self.mem[offset..offset + bytes.len()].copy_from_slice(bytes);
}
fn erase(&mut self, from: u32, to: u32) {
self.erases.push((from, to));
let from = from as usize;
let to = to as usize;
assert_eq!(0, from % ERASE_SIZE);
assert_eq!(0, to % ERASE_SIZE);
self.mem[from..to].fill(0xff);
}
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> Default
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
fn default() -> Self {
Self::new(0xff)
}
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> ErrorType
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
type Error = core::convert::Infallible;
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> ReadNorFlash
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
const READ_SIZE: usize = 1;
fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
self.read(offset, bytes);
Ok(())
}
fn capacity(&self) -> usize {
SIZE
}
}
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> NorFlash
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
const WRITE_SIZE: usize = WRITE_SIZE;
const ERASE_SIZE: usize = ERASE_SIZE;
fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
self.write(offset, bytes);
Ok(())
}
fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
self.erase(from, to);
Ok(())
}
}
#[cfg(feature = "nightly")]
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> AsyncReadNorFlash
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
const READ_SIZE: usize = 1;
async fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
self.read(offset, bytes);
Ok(())
}
fn capacity(&self) -> usize {
SIZE
}
}
#[cfg(feature = "nightly")]
impl<const SIZE: usize, const ERASE_SIZE: usize, const WRITE_SIZE: usize> AsyncNorFlash
for MemFlash<SIZE, ERASE_SIZE, WRITE_SIZE>
{
const WRITE_SIZE: usize = WRITE_SIZE;
const ERASE_SIZE: usize = ERASE_SIZE;
async fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
self.write(offset, bytes);
Ok(())
}
async fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
self.erase(from, to);
Ok(())
}
}

View File

@ -0,0 +1,8 @@
//! Utilities related to flash.
mod concat_flash;
#[cfg(test)]
pub(crate) mod mem_flash;
pub mod partition;
pub use concat_flash::ConcatFlash;

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@ -0,0 +1,139 @@
use embassy_sync::blocking_mutex::raw::RawMutex;
use embassy_sync::mutex::Mutex;
use embedded_storage::nor_flash::ErrorType;
use embedded_storage_async::nor_flash::{NorFlash, ReadNorFlash};
use super::Error;
/// A logical partition of an underlying shared flash
///
/// A partition holds an offset and a size of the flash,
/// and is restricted to operate with that range.
/// There is no guarantee that muliple partitions on the same flash
/// operate on mutually exclusive ranges - such a separation is up to
/// the user to guarantee.
pub struct Partition<'a, M: RawMutex, T: NorFlash> {
flash: &'a Mutex<M, T>,
offset: u32,
size: u32,
}
impl<'a, M: RawMutex, T: NorFlash> Partition<'a, M, T> {
/// Create a new partition
pub const fn new(flash: &'a Mutex<M, T>, offset: u32, size: u32) -> Self {
if offset % T::READ_SIZE as u32 != 0 || offset % T::WRITE_SIZE as u32 != 0 || offset % T::ERASE_SIZE as u32 != 0
{
panic!("Partition offset must be a multiple of read, write and erase size");
}
if size % T::READ_SIZE as u32 != 0 || size % T::WRITE_SIZE as u32 != 0 || size % T::ERASE_SIZE as u32 != 0 {
panic!("Partition size must be a multiple of read, write and erase size");
}
Self { flash, offset, size }
}
/// Get the partition offset within the flash
pub const fn offset(&self) -> u32 {
self.offset
}
/// Get the partition size
pub const fn size(&self) -> u32 {
self.size
}
}
impl<M: RawMutex, T: NorFlash> ErrorType for Partition<'_, M, T> {
type Error = Error<T::Error>;
}
impl<M: RawMutex, T: NorFlash> ReadNorFlash for Partition<'_, M, T> {
const READ_SIZE: usize = T::READ_SIZE;
async fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
if offset + bytes.len() as u32 > self.size {
return Err(Error::OutOfBounds);
}
let mut flash = self.flash.lock().await;
flash.read(self.offset + offset, bytes).await.map_err(Error::Flash)
}
fn capacity(&self) -> usize {
self.size as usize
}
}
impl<M: RawMutex, T: NorFlash> NorFlash for Partition<'_, M, T> {
const WRITE_SIZE: usize = T::WRITE_SIZE;
const ERASE_SIZE: usize = T::ERASE_SIZE;
async fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
if offset + bytes.len() as u32 > self.size {
return Err(Error::OutOfBounds);
}
let mut flash = self.flash.lock().await;
flash.write(self.offset + offset, bytes).await.map_err(Error::Flash)
}
async fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
if to > self.size {
return Err(Error::OutOfBounds);
}
let mut flash = self.flash.lock().await;
flash
.erase(self.offset + from, self.offset + to)
.await
.map_err(Error::Flash)
}
}
#[cfg(test)]
mod tests {
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use super::*;
use crate::flash::mem_flash::MemFlash;
#[futures_test::test]
async fn can_read() {
let mut flash = MemFlash::<1024, 128, 4>::default();
flash.mem[132..132 + 8].fill(0xAA);
let flash = Mutex::<NoopRawMutex, _>::new(flash);
let mut partition = Partition::new(&flash, 128, 256);
let mut read_buf = [0; 8];
partition.read(4, &mut read_buf).await.unwrap();
assert!(read_buf.iter().position(|&x| x != 0xAA).is_none());
}
#[futures_test::test]
async fn can_write() {
let flash = MemFlash::<1024, 128, 4>::default();
let flash = Mutex::<NoopRawMutex, _>::new(flash);
let mut partition = Partition::new(&flash, 128, 256);
let write_buf = [0xAA; 8];
partition.write(4, &write_buf).await.unwrap();
let flash = flash.try_lock().unwrap();
assert!(flash.mem[132..132 + 8].iter().position(|&x| x != 0xAA).is_none());
}
#[futures_test::test]
async fn can_erase() {
let flash = MemFlash::<1024, 128, 4>::new(0x00);
let flash = Mutex::<NoopRawMutex, _>::new(flash);
let mut partition = Partition::new(&flash, 128, 256);
partition.erase(0, 128).await.unwrap();
let flash = flash.try_lock().unwrap();
assert!(flash.mem[128..256].iter().position(|&x| x != 0xFF).is_none());
}
}

View File

@ -0,0 +1,149 @@
use core::cell::RefCell;
use embassy_sync::blocking_mutex::raw::RawMutex;
use embassy_sync::blocking_mutex::Mutex;
use embedded_storage::nor_flash::{ErrorType, NorFlash, ReadNorFlash};
use super::Error;
/// A logical partition of an underlying shared flash
///
/// A partition holds an offset and a size of the flash,
/// and is restricted to operate with that range.
/// There is no guarantee that muliple partitions on the same flash
/// operate on mutually exclusive ranges - such a separation is up to
/// the user to guarantee.
pub struct BlockingPartition<'a, M: RawMutex, T: NorFlash> {
flash: &'a Mutex<M, RefCell<T>>,
offset: u32,
size: u32,
}
impl<'a, M: RawMutex, T: NorFlash> BlockingPartition<'a, M, T> {
/// Create a new partition
pub const fn new(flash: &'a Mutex<M, RefCell<T>>, offset: u32, size: u32) -> Self {
if offset % T::READ_SIZE as u32 != 0 || offset % T::WRITE_SIZE as u32 != 0 || offset % T::ERASE_SIZE as u32 != 0
{
panic!("Partition offset must be a multiple of read, write and erase size");
}
if size % T::READ_SIZE as u32 != 0 || size % T::WRITE_SIZE as u32 != 0 || size % T::ERASE_SIZE as u32 != 0 {
panic!("Partition size must be a multiple of read, write and erase size");
}
Self { flash, offset, size }
}
/// Get the partition offset within the flash
pub const fn offset(&self) -> u32 {
self.offset
}
/// Get the partition size
pub const fn size(&self) -> u32 {
self.size
}
}
impl<M: RawMutex, T: NorFlash> ErrorType for BlockingPartition<'_, M, T> {
type Error = Error<T::Error>;
}
impl<M: RawMutex, T: NorFlash> ReadNorFlash for BlockingPartition<'_, M, T> {
const READ_SIZE: usize = T::READ_SIZE;
fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
if offset + bytes.len() as u32 > self.size {
return Err(Error::OutOfBounds);
}
self.flash.lock(|flash| {
flash
.borrow_mut()
.read(self.offset + offset, bytes)
.map_err(Error::Flash)
})
}
fn capacity(&self) -> usize {
self.size as usize
}
}
impl<M: RawMutex, T: NorFlash> NorFlash for BlockingPartition<'_, M, T> {
const WRITE_SIZE: usize = T::WRITE_SIZE;
const ERASE_SIZE: usize = T::ERASE_SIZE;
fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
if offset + bytes.len() as u32 > self.size {
return Err(Error::OutOfBounds);
}
self.flash.lock(|flash| {
flash
.borrow_mut()
.write(self.offset + offset, bytes)
.map_err(Error::Flash)
})
}
fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
if to > self.size {
return Err(Error::OutOfBounds);
}
self.flash.lock(|flash| {
flash
.borrow_mut()
.erase(self.offset + from, self.offset + to)
.map_err(Error::Flash)
})
}
}
#[cfg(test)]
mod tests {
use embassy_sync::blocking_mutex::raw::NoopRawMutex;
use super::*;
use crate::flash::mem_flash::MemFlash;
#[test]
fn can_read() {
let mut flash = MemFlash::<1024, 128, 4>::default();
flash.mem[132..132 + 8].fill(0xAA);
let flash = Mutex::<NoopRawMutex, _>::new(RefCell::new(flash));
let mut partition = BlockingPartition::new(&flash, 128, 256);
let mut read_buf = [0; 8];
partition.read(4, &mut read_buf).unwrap();
assert!(read_buf.iter().position(|&x| x != 0xAA).is_none());
}
#[test]
fn can_write() {
let flash = MemFlash::<1024, 128, 4>::default();
let flash = Mutex::<NoopRawMutex, _>::new(RefCell::new(flash));
let mut partition = BlockingPartition::new(&flash, 128, 256);
let write_buf = [0xAA; 8];
partition.write(4, &write_buf).unwrap();
let flash = flash.into_inner().take();
assert!(flash.mem[132..132 + 8].iter().position(|&x| x != 0xAA).is_none());
}
#[test]
fn can_erase() {
let flash = MemFlash::<1024, 128, 4>::new(0x00);
let flash = Mutex::<NoopRawMutex, _>::new(RefCell::new(flash));
let mut partition = BlockingPartition::new(&flash, 128, 256);
partition.erase(0, 128).unwrap();
let flash = flash.into_inner().take();
assert!(flash.mem[128..256].iter().position(|&x| x != 0xFF).is_none());
}
}

View File

@ -0,0 +1,30 @@
//! Flash Partition utilities
use embedded_storage::nor_flash::{NorFlashError, NorFlashErrorKind};
#[cfg(feature = "nightly")]
mod asynch;
mod blocking;
#[cfg(feature = "nightly")]
pub use asynch::Partition;
pub use blocking::BlockingPartition;
/// Partition error
#[derive(Debug)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Error<T> {
/// The requested flash area is outside the partition
OutOfBounds,
/// Underlying flash error
Flash(T),
}
impl<T: NorFlashError> NorFlashError for Error<T> {
fn kind(&self) -> NorFlashErrorKind {
match self {
Error::OutOfBounds => NorFlashErrorKind::OutOfBounds,
Error::Flash(f) => f.kind(),
}
}
}

View File

@ -1,5 +1,5 @@
#![cfg_attr(not(feature = "std"), no_std)]
#![cfg_attr(feature = "nightly", feature(type_alias_impl_trait))]
#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections, try_blocks))]
#![warn(missing_docs)]
//! Utilities to use `embedded-hal` traits with Embassy.
@ -7,6 +7,8 @@
#[cfg(feature = "nightly")]
pub mod adapter;
pub mod flash;
pub mod shared_bus;
/// Set the configuration of a peripheral driver.

View File

@ -22,7 +22,6 @@
//! let i2c_dev2 = I2cDevice::new(i2c_bus);
//! let mpu = Mpu6050::new(i2c_dev2);
//! ```
use core::future::Future;
use embassy_sync::blocking_mutex::raw::RawMutex;
use embassy_sync::mutex::Mutex;
@ -55,53 +54,41 @@ where
M: RawMutex + 'static,
BUS: i2c::I2c + 'static,
{
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
async move {
let mut bus = self.bus.lock().await;
bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await;
bus.read(address, read).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> {
async move {
let mut bus = self.bus.lock().await;
bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await;
bus.write(address, write).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
type WriteReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn write_read<'a>(
&'a mut self,
async fn write_read(
&mut self,
address: u8,
wr_buffer: &'a [u8],
rd_buffer: &'a mut [u8],
) -> Self::WriteReadFuture<'a> {
async move {
let mut bus = self.bus.lock().await;
bus.write_read(address, wr_buffer, rd_buffer)
.await
.map_err(I2cDeviceError::I2c)?;
Ok(())
}
write: &[u8],
read: &mut [u8],
) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await;
bus.write_read(address, write, read)
.await
.map_err(I2cDeviceError::I2c)?;
Ok(())
}
type TransactionFuture<'a, 'b> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a, 'b: 'a;
fn transaction<'a, 'b>(
&'a mut self,
async fn transaction(
&mut self,
address: u8,
operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
) -> Self::TransactionFuture<'a, 'b> {
let _ = address;
let _ = operations;
async move { todo!() }
operations: &mut [embedded_hal_async::i2c::Operation<'_>],
) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await;
bus.transaction(address, operations)
.await
.map_err(I2cDeviceError::I2c)?;
Ok(())
}
}
@ -136,55 +123,40 @@ where
M: RawMutex + 'static,
BUS: i2c::I2c + SetConfig + 'static,
{
type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
async move {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Self::WriteFuture<'a> {
async move {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
Ok(())
}
type WriteReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
fn write_read<'a>(
&'a mut self,
async fn write_read(
&mut self,
address: u8,
wr_buffer: &'a [u8],
rd_buffer: &'a mut [u8],
) -> Self::WriteReadFuture<'a> {
async move {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.write_read(address, wr_buffer, rd_buffer)
.await
.map_err(I2cDeviceError::I2c)?;
Ok(())
}
wr_buffer: &[u8],
rd_buffer: &mut [u8],
) -> Result<(), I2cDeviceError<BUS::Error>> {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.write_read(address, wr_buffer, rd_buffer)
.await
.map_err(I2cDeviceError::I2c)?;
Ok(())
}
type TransactionFuture<'a, 'b> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a, 'b: 'a;
fn transaction<'a, 'b>(
&'a mut self,
address: u8,
operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
) -> Self::TransactionFuture<'a, 'b> {
let _ = address;
let _ = operations;
async move { todo!() }
async fn transaction(&mut self, address: u8, operations: &mut [i2c::Operation<'_>]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
bus.transaction(address, operations)
.await
.map_err(I2cDeviceError::I2c)?;
Ok(())
}
}

View File

@ -25,12 +25,11 @@
//! let spi_dev2 = SpiDevice::new(spi_bus, cs_pin2);
//! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128);
//! ```
use core::future::Future;
use embassy_sync::blocking_mutex::raw::RawMutex;
use embassy_sync::mutex::Mutex;
use embedded_hal_1::digital::OutputPin;
use embedded_hal_1::spi::ErrorType;
use embedded_hal_1::spi::Operation;
use embedded_hal_async::spi;
use crate::shared_bus::SpiDeviceError;
@ -57,41 +56,92 @@ where
type Error = SpiDeviceError<BUS::Error, CS::Error>;
}
unsafe impl<M, BUS, CS> spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
impl<M, BUS, CS> spi::SpiDeviceRead for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex + 'static,
BUS: spi::SpiBusFlush + 'static,
M: RawMutex,
BUS: spi::SpiBusRead,
CS: OutputPin,
{
type Bus = BUS;
async fn read_transaction(&mut self, operations: &mut [&mut [u8]]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
type TransactionFuture<'a, R, F, Fut> = impl Future<Output = Result<R, Self::Error>> + 'a
where
Self: 'a, R: 'a, F: FnOnce(*mut Self::Bus) -> Fut + 'a,
Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>> + 'a;
let op_res: Result<(), BUS::Error> = try {
for buf in operations {
bus.read(buf).await?;
}
};
fn transaction<'a, R, F, Fut>(&'a mut self, f: F) -> Self::TransactionFuture<'a, R, F, Fut>
where
R: 'a,
F: FnOnce(*mut Self::Bus) -> Fut + 'a,
Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>> + 'a,
{
async move {
let mut bus = self.bus.lock().await;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let f_res = f(&mut *bus).await;
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
Ok(op_res)
}
}
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
impl<M, BUS, CS> spi::SpiDeviceWrite for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex,
BUS: spi::SpiBusWrite,
CS: OutputPin,
{
async fn write_transaction(&mut self, operations: &[&[u8]]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
Ok(f_res)
}
let op_res: Result<(), BUS::Error> = try {
for buf in operations {
bus.write(buf).await?;
}
};
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(op_res)
}
}
impl<M, BUS, CS> spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex,
BUS: spi::SpiBus,
CS: OutputPin,
{
async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await;
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res: Result<(), BUS::Error> = try {
for op in operations {
match op {
Operation::Read(buf) => bus.read(buf).await?,
Operation::Write(buf) => bus.write(buf).await?,
Operation::Transfer(read, write) => bus.transfer(read, write).await?,
Operation::TransferInPlace(buf) => bus.transfer_in_place(buf).await?,
}
}
};
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(op_res)
}
}
@ -122,41 +172,94 @@ where
type Error = SpiDeviceError<BUS::Error, CS::Error>;
}
unsafe impl<M, BUS, CS> spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
impl<M, BUS, CS> spi::SpiDeviceWrite for SpiDeviceWithConfig<'_, M, BUS, CS>
where
M: RawMutex + 'static,
BUS: spi::SpiBusFlush + SetConfig + 'static,
M: RawMutex,
BUS: spi::SpiBusWrite + SetConfig,
CS: OutputPin,
{
type Bus = BUS;
async fn write_transaction(&mut self, operations: &[&[u8]]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
type TransactionFuture<'a, R, F, Fut> = impl Future<Output = Result<R, Self::Error>> + 'a
where
Self: 'a, R: 'a, F: FnOnce(*mut Self::Bus) -> Fut + 'a,
Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>> + 'a;
let op_res: Result<(), BUS::Error> = try {
for buf in operations {
bus.write(buf).await?;
}
};
fn transaction<'a, R, F, Fut>(&'a mut self, f: F) -> Self::TransactionFuture<'a, R, F, Fut>
where
R: 'a,
F: FnOnce(*mut Self::Bus) -> Fut + 'a,
Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>> + 'a,
{
async move {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let f_res = f(&mut *bus).await;
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
}
Ok(op_res)
}
}
impl<M, BUS, CS> spi::SpiDeviceRead for SpiDeviceWithConfig<'_, M, BUS, CS>
where
M: RawMutex,
BUS: spi::SpiBusRead + SetConfig,
CS: OutputPin,
{
async fn read_transaction(&mut self, operations: &mut [&mut [u8]]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res: Result<(), BUS::Error> = try {
for buf in operations {
bus.read(buf).await?;
}
};
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(op_res)
}
}
impl<M, BUS, CS> spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
where
M: RawMutex,
BUS: spi::SpiBus + SetConfig,
CS: OutputPin,
{
async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> {
let mut bus = self.bus.lock().await;
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res: Result<(), BUS::Error> = try {
for op in operations {
match op {
Operation::Read(buf) => bus.read(buf).await?,
Operation::Write(buf) => bus.write(buf).await?,
Operation::Transfer(read, write) => bus.transfer(read, write).await?,
Operation::TransferInPlace(buf) => bus.transfer_in_place(buf).await?,
}
}
};
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush().await;
let cs_res = self.cs.set_high();
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(op_res)
}
}

View File

@ -2,13 +2,12 @@
//!
//! # Example (nrf52)
//!
//! ```rust
//! ```rust,ignore
//! use embassy_embedded_hal::shared_bus::blocking::i2c::I2cDevice;
//! use embassy_sync::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
//!
//! static I2C_BUS: StaticCell<NoopMutex<RefCell<Twim<TWISPI0>>>> = StaticCell::new();
//! let irq = interrupt::take!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
//! let i2c = Twim::new(p.TWISPI0, irq, p.P0_03, p.P0_04, Config::default());
//! let i2c = Twim::new(p.TWISPI0, Irqs, p.P0_03, p.P0_04, Config::default());
//! let i2c_bus = NoopMutex::new(RefCell::new(i2c));
//! let i2c_bus = I2C_BUS.init(i2c_bus);
//!
@ -72,34 +71,6 @@ where
let _ = operations;
todo!()
}
fn write_iter<B: IntoIterator<Item = u8>>(&mut self, addr: u8, bytes: B) -> Result<(), Self::Error> {
let _ = addr;
let _ = bytes;
todo!()
}
fn write_iter_read<B: IntoIterator<Item = u8>>(
&mut self,
addr: u8,
bytes: B,
buffer: &mut [u8],
) -> Result<(), Self::Error> {
let _ = addr;
let _ = bytes;
let _ = buffer;
todo!()
}
fn transaction_iter<'a, O: IntoIterator<Item = Operation<'a>>>(
&mut self,
address: u8,
operations: O,
) -> Result<(), Self::Error> {
let _ = address;
let _ = operations;
todo!()
}
}
impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cDevice<'_, M, BUS>
@ -204,32 +175,4 @@ where
let _ = operations;
todo!()
}
fn write_iter<B: IntoIterator<Item = u8>>(&mut self, addr: u8, bytes: B) -> Result<(), Self::Error> {
let _ = addr;
let _ = bytes;
todo!()
}
fn write_iter_read<B: IntoIterator<Item = u8>>(
&mut self,
addr: u8,
bytes: B,
buffer: &mut [u8],
) -> Result<(), Self::Error> {
let _ = addr;
let _ = bytes;
let _ = buffer;
todo!()
}
fn transaction_iter<'a, O: IntoIterator<Item = Operation<'a>>>(
&mut self,
address: u8,
operations: O,
) -> Result<(), Self::Error> {
let _ = address;
let _ = operations;
todo!()
}
}

View File

@ -2,13 +2,12 @@
//!
//! # Example (nrf52)
//!
//! ```rust
//! ```rust,ignore
//! use embassy_embedded_hal::shared_bus::blocking::spi::SpiDevice;
//! use embassy_sync::blocking_mutex::{NoopMutex, raw::NoopRawMutex};
//!
//! static SPI_BUS: StaticCell<NoopMutex<RefCell<Spim<SPI3>>>> = StaticCell::new();
//! let irq = interrupt::take!(SPIM3);
//! let spi = Spim::new_txonly(p.SPI3, irq, p.P0_15, p.P0_18, Config::default());
//! let spi = Spim::new_txonly(p.SPI3, Irqs, p.P0_15, p.P0_18, Config::default());
//! let spi_bus = NoopMutex::new(RefCell::new(spi));
//! let spi_bus = SPI_BUS.init(spi_bus);
//!
@ -23,8 +22,7 @@ use core::cell::RefCell;
use embassy_sync::blocking_mutex::raw::RawMutex;
use embassy_sync::blocking_mutex::Mutex;
use embedded_hal_1::digital::OutputPin;
use embedded_hal_1::spi;
use embedded_hal_1::spi::SpiBusFlush;
use embedded_hal_1::spi::{self, Operation, SpiBus, SpiBusRead, SpiBusWrite};
use crate::shared_bus::SpiDeviceError;
use crate::SetConfig;
@ -50,30 +48,85 @@ where
type Error = SpiDeviceError<BUS::Error, CS::Error>;
}
impl<BUS, M, CS> embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
impl<BUS, M, CS> embedded_hal_1::spi::SpiDeviceRead for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex,
BUS: SpiBusFlush,
BUS: SpiBusRead,
CS: OutputPin,
{
type Bus = BUS;
fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
fn read_transaction(&mut self, operations: &mut [&mut [u8]]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = f(&mut bus);
let op_res = operations.iter_mut().try_for_each(|buf| bus.read(buf));
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush();
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
Ok(op_res)
})
}
}
impl<BUS, M, CS> embedded_hal_1::spi::SpiDeviceWrite for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex,
BUS: SpiBusWrite,
CS: OutputPin,
{
fn write_transaction(&mut self, operations: &[&[u8]]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res = operations.iter().try_for_each(|buf| bus.write(buf));
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush();
let cs_res = self.cs.set_high();
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(op_res)
})
}
}
impl<BUS, M, CS> embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
where
M: RawMutex,
BUS: SpiBus,
CS: OutputPin,
{
fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res = operations.iter_mut().try_for_each(|op| match op {
Operation::Read(buf) => bus.read(buf),
Operation::Write(buf) => bus.write(buf),
Operation::Transfer(read, write) => bus.transfer(read, write),
Operation::TransferInPlace(buf) => bus.transfer_in_place(buf),
});
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush();
let cs_res = self.cs.set_high();
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(op_res)
})
}
}
@ -89,11 +142,11 @@ where
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = bus.transfer(words);
let op_res = bus.transfer(words);
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
Ok(op_res)
})
}
}
@ -110,11 +163,11 @@ where
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = bus.write(words);
let op_res = bus.write(words);
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
Ok(op_res)
})
}
}
@ -146,30 +199,85 @@ where
type Error = SpiDeviceError<BUS::Error, CS::Error>;
}
impl<BUS, M, CS> embedded_hal_1::spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
impl<BUS, M, CS> embedded_hal_1::spi::SpiDeviceRead for SpiDeviceWithConfig<'_, M, BUS, CS>
where
M: RawMutex,
BUS: SpiBusFlush + SetConfig,
BUS: SpiBusRead + SetConfig,
CS: OutputPin,
{
type Bus = BUS;
fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
fn read_transaction(&mut self, operations: &mut [&mut [u8]]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let f_res = f(&mut bus);
let op_res = operations.iter_mut().try_for_each(|buf| bus.read(buf));
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush();
let cs_res = self.cs.set_high();
let f_res = f_res.map_err(SpiDeviceError::Spi)?;
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(f_res)
Ok(op_res)
})
}
}
impl<BUS, M, CS> embedded_hal_1::spi::SpiDeviceWrite for SpiDeviceWithConfig<'_, M, BUS, CS>
where
M: RawMutex,
BUS: SpiBusWrite + SetConfig,
CS: OutputPin,
{
fn write_transaction(&mut self, operations: &[&[u8]]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res = operations.iter().try_for_each(|buf| bus.write(buf));
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush();
let cs_res = self.cs.set_high();
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(op_res)
})
}
}
impl<BUS, M, CS> embedded_hal_1::spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
where
M: RawMutex,
BUS: SpiBus + SetConfig,
CS: OutputPin,
{
fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
self.bus.lock(|bus| {
let mut bus = bus.borrow_mut();
bus.set_config(&self.config);
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
let op_res = operations.iter_mut().try_for_each(|op| match op {
Operation::Read(buf) => bus.read(buf),
Operation::Write(buf) => bus.write(buf),
Operation::Transfer(read, write) => bus.transfer(read, write),
Operation::TransferInPlace(buf) => bus.transfer_in_place(buf),
});
// On failure, it's important to still flush and deassert CS.
let flush_res = bus.flush();
let cs_res = self.cs.set_high();
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
flush_res.map_err(SpiDeviceError::Spi)?;
cs_res.map_err(SpiDeviceError::Cs)?;
Ok(op_res)
})
}
}

View File

@ -0,0 +1,23 @@
# Changelog
All notable changes to this project will be documented in this file.
The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
## 0.2.0 - 2023-04-27
- Replace unnecessary atomics in runqueue
- add Pender, rework Cargo features.
- add support for turbo-wakers.
- Allow TaskStorage to auto-implement `Sync`
- Use AtomicPtr for signal_ctx, removes 1 unsafe.
- Replace unsound critical sections with atomics
## 0.1.1 - 2022-11-23
- Fix features for documentation
## 0.1.0 - 2022-11-23
- First release

View File

@ -1,6 +1,6 @@
[package]
name = "embassy-executor"
version = "0.1.1"
version = "0.2.0"
edition = "2021"
license = "MIT OR Apache-2.0"
description = "async/await executor designed for embedded usage"
@ -14,30 +14,42 @@ categories = [
[package.metadata.embassy_docs]
src_base = "https://github.com/embassy-rs/embassy/blob/embassy-executor-v$VERSION/embassy-executor/src/"
src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-executor/src/"
features = ["nightly", "defmt"]
features = ["nightly", "defmt", "pender-callback"]
flavors = [
{ name = "std", target = "x86_64-unknown-linux-gnu", features = ["std"] },
{ name = "wasm", target = "wasm32-unknown-unknown", features = ["wasm"] },
{ name = "thumbv6m-none-eabi", target = "thumbv6m-none-eabi", features = [] },
{ name = "thumbv7m-none-eabi", target = "thumbv7m-none-eabi", features = [] },
{ name = "thumbv7em-none-eabi", target = "thumbv7em-none-eabi", features = [] },
{ name = "thumbv7em-none-eabihf", target = "thumbv7em-none-eabihf", features = [] },
{ name = "thumbv8m.base-none-eabi", target = "thumbv8m.base-none-eabi", features = [] },
{ name = "thumbv8m.main-none-eabi", target = "thumbv8m.main-none-eabi", features = [] },
{ name = "thumbv8m.main-none-eabihf", target = "thumbv8m.main-none-eabihf", features = [] },
{ name = "std", target = "x86_64-unknown-linux-gnu", features = ["arch-std", "executor-thread"] },
{ name = "wasm", target = "wasm32-unknown-unknown", features = ["arch-wasm", "executor-thread"] },
{ name = "cortex-m", target = "thumbv7em-none-eabi", features = ["arch-cortex-m", "executor-thread", "executor-interrupt"] },
{ name = "riscv32", target = "riscv32imac-unknown-none-elf", features = ["arch-riscv32", "executor-thread"] },
]
[package.metadata.docs.rs]
features = ["std", "nightly", "defmt"]
default-target = "thumbv7em-none-eabi"
targets = ["thumbv7em-none-eabi"]
features = ["nightly", "defmt", "pender-callback", "arch-cortex-m", "executor-thread", "executor-interrupt"]
[features]
default = []
std = ["critical-section/std"]
wasm = ["dep:wasm-bindgen", "dep:js-sys"]
# Architecture
_arch = [] # some arch was picked
arch-std = ["_arch", "critical-section/std"]
arch-cortex-m = ["_arch", "dep:cortex-m"]
arch-xtensa = ["_arch"]
arch-riscv32 = ["_arch"]
arch-wasm = ["_arch", "dep:wasm-bindgen", "dep:js-sys"]
# Enable creating a `Pender` from an arbitrary function pointer callback.
pender-callback = []
# Enable the thread-mode executor (using WFE/SEV in Cortex-M, WFI in other embedded archs)
executor-thread = []
# Enable the interrupt-mode executor (available in Cortex-M only)
executor-interrupt = []
# Enable nightly-only features
nightly = []
turbowakers = []
integrated-timers = ["dep:embassy-time"]
# Trace interrupt invocations with rtos-trace.
@ -49,13 +61,15 @@ log = { version = "0.4.14", optional = true }
rtos-trace = { version = "0.1.2", optional = true }
futures-util = { version = "0.3.17", default-features = false }
embassy-macros = { version = "0.1.0", path = "../embassy-macros" }
embassy-macros = { version = "0.2.0", path = "../embassy-macros" }
embassy-time = { version = "0.1.0", path = "../embassy-time", optional = true}
atomic-polyfill = "1.0.1"
critical-section = "1.1"
cfg-if = "1.0.0"
static_cell = "1.0"
static_cell = "1.1"
# WASM dependencies
# arch-cortex-m dependencies
cortex-m = { version = "0.7.6", optional = true }
# arch-wasm dependencies
wasm-bindgen = { version = "0.2.82", optional = true }
js-sys = { version = "0.3", optional = true }

View File

@ -1,59 +1,224 @@
use core::arch::asm;
use core::marker::PhantomData;
use core::ptr;
#[cfg(feature = "executor-thread")]
pub use thread::*;
#[cfg(feature = "executor-thread")]
mod thread {
use core::arch::asm;
use core::marker::PhantomData;
use super::{raw, Spawner};
#[cfg(feature = "nightly")]
pub use embassy_macros::main_cortex_m as main;
/// Thread mode executor, using WFE/SEV.
///
/// This is the simplest and most common kind of executor. It runs on
/// thread mode (at the lowest priority level), and uses the `WFE` ARM instruction
/// to sleep when it has no more work to do. When a task is woken, a `SEV` instruction
/// is executed, to make the `WFE` exit from sleep and poll the task.
///
/// This executor allows for ultra low power consumption for chips where `WFE`
/// triggers low-power sleep without extra steps. If your chip requires extra steps,
/// you may use [`raw::Executor`] directly to program custom behavior.
pub struct Executor {
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
}
use crate::raw::{Pender, PenderInner};
use crate::{raw, Spawner};
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
Self {
inner: raw::Executor::new(|_| unsafe { asm!("sev") }, ptr::null_mut()),
not_send: PhantomData,
#[derive(Copy, Clone)]
pub(crate) struct ThreadPender;
impl ThreadPender {
pub(crate) fn pend(self) {
unsafe { core::arch::asm!("sev") }
}
}
/// Run the executor.
/// Thread mode executor, using WFE/SEV.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
/// This is the simplest and most common kind of executor. It runs on
/// thread mode (at the lowest priority level), and uses the `WFE` ARM instruction
/// to sleep when it has no more work to do. When a task is woken, a `SEV` instruction
/// is executed, to make the `WFE` exit from sleep and poll the task.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
///
/// This function never returns.
pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
init(self.inner.spawner());
/// This executor allows for ultra low power consumption for chips where `WFE`
/// triggers low-power sleep without extra steps. If your chip requires extra steps,
/// you may use [`raw::Executor`] directly to program custom behavior.
pub struct Executor {
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
}
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
Self {
inner: raw::Executor::new(Pender(PenderInner::Thread(ThreadPender))),
not_send: PhantomData,
}
}
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
///
/// This function never returns.
pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
init(self.inner.spawner());
loop {
unsafe {
self.inner.poll();
asm!("wfe");
};
}
}
}
}
#[cfg(feature = "executor-interrupt")]
pub use interrupt::*;
#[cfg(feature = "executor-interrupt")]
mod interrupt {
use core::cell::UnsafeCell;
use core::mem::MaybeUninit;
use atomic_polyfill::{AtomicBool, Ordering};
use cortex_m::interrupt::InterruptNumber;
use cortex_m::peripheral::NVIC;
use crate::raw::{self, Pender, PenderInner};
#[derive(Clone, Copy)]
pub(crate) struct InterruptPender(u16);
impl InterruptPender {
pub(crate) fn pend(self) {
// STIR is faster, but is only available in v7 and higher.
#[cfg(not(armv6m))]
{
let mut nvic: cortex_m::peripheral::NVIC = unsafe { core::mem::transmute(()) };
nvic.request(self);
}
#[cfg(armv6m)]
cortex_m::peripheral::NVIC::pend(self);
}
}
unsafe impl cortex_m::interrupt::InterruptNumber for InterruptPender {
fn number(self) -> u16 {
self.0
}
}
/// Interrupt mode executor.
///
/// This executor runs tasks in interrupt mode. The interrupt handler is set up
/// to poll tasks, and when a task is woken the interrupt is pended from software.
///
/// This allows running async tasks at a priority higher than thread mode. One
/// use case is to leave thread mode free for non-async tasks. Another use case is
/// to run multiple executors: one in thread mode for low priority tasks and another in
/// interrupt mode for higher priority tasks. Higher priority tasks will preempt lower
/// priority ones.
///
/// It is even possible to run multiple interrupt mode executors at different priorities,
/// by assigning different priorities to the interrupts. For an example on how to do this,
/// See the 'multiprio' example for 'embassy-nrf'.
///
/// To use it, you have to pick an interrupt that won't be used by the hardware.
/// Some chips reserve some interrupts for this purpose, sometimes named "software interrupts" (SWI).
/// If this is not the case, you may use an interrupt from any unused peripheral.
///
/// It is somewhat more complex to use, it's recommended to use the thread-mode
/// [`Executor`] instead, if it works for your use case.
pub struct InterruptExecutor {
started: AtomicBool,
executor: UnsafeCell<MaybeUninit<raw::Executor>>,
}
unsafe impl Send for InterruptExecutor {}
unsafe impl Sync for InterruptExecutor {}
impl InterruptExecutor {
/// Create a new, not started `InterruptExecutor`.
#[inline]
pub const fn new() -> Self {
Self {
started: AtomicBool::new(false),
executor: UnsafeCell::new(MaybeUninit::uninit()),
}
}
/// Executor interrupt callback.
///
/// # Safety
///
/// You MUST call this from the interrupt handler, and from nowhere else.
pub unsafe fn on_interrupt(&'static self) {
let executor = unsafe { (&*self.executor.get()).assume_init_ref() };
executor.poll();
}
/// Start the executor.
///
/// This initializes the executor, enables the interrupt, and returns.
/// The executor keeps running in the background through the interrupt.
///
/// This returns a [`SendSpawner`] you can use to spawn tasks on it. A [`SendSpawner`]
/// is returned instead of a [`Spawner`](embassy_executor::Spawner) because the executor effectively runs in a
/// different "thread" (the interrupt), so spawning tasks on it is effectively
/// sending them.
///
/// To obtain a [`Spawner`](embassy_executor::Spawner) for this executor, use [`Spawner::for_current_executor()`](embassy_executor::Spawner::for_current_executor()) from
/// a task running in it.
///
/// # Interrupt requirements
///
/// You must write the interrupt handler yourself, and make it call [`on_interrupt()`](Self::on_interrupt).
///
/// This method already enables (unmasks) the interrupt, you must NOT do it yourself.
///
/// You must set the interrupt priority before calling this method. You MUST NOT
/// do it after.
///
pub fn start(&'static self, irq: impl InterruptNumber) -> crate::SendSpawner {
if self
.started
.compare_exchange(false, true, Ordering::Acquire, Ordering::Relaxed)
.is_err()
{
panic!("InterruptExecutor::start() called multiple times on the same executor.");
}
loop {
unsafe {
self.inner.poll();
asm!("wfe");
};
(&mut *self.executor.get())
.as_mut_ptr()
.write(raw::Executor::new(Pender(PenderInner::Interrupt(InterruptPender(
irq.number(),
)))))
}
let executor = unsafe { (&*self.executor.get()).assume_init_ref() };
unsafe { NVIC::unmask(irq) }
executor.spawner().make_send()
}
/// Get a SendSpawner for this executor
///
/// This returns a [`SendSpawner`] you can use to spawn tasks on this
/// executor.
///
/// This MUST only be called on an executor that has already been spawned.
/// The function will panic otherwise.
pub fn spawner(&'static self) -> crate::SendSpawner {
if !self.started.load(Ordering::Acquire) {
panic!("InterruptExecutor::spawner() called on uninitialized executor.");
}
let executor = unsafe { (&*self.executor.get()).assume_init_ref() };
executor.spawner().make_send()
}
}
}

View File

@ -1,73 +1,86 @@
use core::marker::PhantomData;
use core::ptr;
#[cfg(feature = "executor-interrupt")]
compile_error!("`executor-interrupt` is not supported with `arch-riscv32`.");
use atomic_polyfill::{AtomicBool, Ordering};
#[cfg(feature = "executor-thread")]
pub use thread::*;
#[cfg(feature = "executor-thread")]
mod thread {
use core::marker::PhantomData;
use core::sync::atomic::{AtomicBool, Ordering};
use super::{raw, Spawner};
#[cfg(feature = "nightly")]
pub use embassy_macros::main_riscv as main;
/// global atomic used to keep track of whether there is work to do since sev() is not available on RISCV
///
static SIGNAL_WORK_THREAD_MODE: AtomicBool = AtomicBool::new(false);
use crate::raw::{Pender, PenderInner};
use crate::{raw, Spawner};
/// RISCV32 Executor
pub struct Executor {
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
}
#[derive(Copy, Clone)]
pub(crate) struct ThreadPender;
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
Self {
// use Signal_Work_Thread_Mode as substitute for local interrupt register
inner: raw::Executor::new(
|_| {
SIGNAL_WORK_THREAD_MODE.store(true, Ordering::SeqCst);
},
ptr::null_mut(),
),
not_send: PhantomData,
impl ThreadPender {
#[allow(unused)]
pub(crate) fn pend(self) {
SIGNAL_WORK_THREAD_MODE.store(true, core::sync::atomic::Ordering::SeqCst);
}
}
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
///
/// This function never returns.
pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
init(self.inner.spawner());
/// global atomic used to keep track of whether there is work to do since sev() is not available on RISCV
static SIGNAL_WORK_THREAD_MODE: AtomicBool = AtomicBool::new(false);
loop {
unsafe {
self.inner.poll();
// we do not care about race conditions between the load and store operations, interrupts
//will only set this value to true.
critical_section::with(|_| {
// if there is work to do, loop back to polling
// TODO can we relax this?
if SIGNAL_WORK_THREAD_MODE.load(Ordering::SeqCst) {
SIGNAL_WORK_THREAD_MODE.store(false, Ordering::SeqCst);
}
// if not, wait for interrupt
else {
core::arch::asm!("wfi");
}
});
// if an interrupt occurred while waiting, it will be serviced here
/// RISCV32 Executor
pub struct Executor {
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
}
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
Self {
inner: raw::Executor::new(Pender(PenderInner::Thread(ThreadPender))),
not_send: PhantomData,
}
}
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
///
/// This function never returns.
pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
init(self.inner.spawner());
loop {
unsafe {
self.inner.poll();
// we do not care about race conditions between the load and store operations, interrupts
//will only set this value to true.
critical_section::with(|_| {
// if there is work to do, loop back to polling
// TODO can we relax this?
if SIGNAL_WORK_THREAD_MODE.load(Ordering::SeqCst) {
SIGNAL_WORK_THREAD_MODE.store(false, Ordering::SeqCst);
}
// if not, wait for interrupt
else {
core::arch::asm!("wfi");
}
});
// if an interrupt occurred while waiting, it will be serviced here
}
}
}
}

View File

@ -1,84 +1,100 @@
use std::marker::PhantomData;
use std::sync::{Condvar, Mutex};
#[cfg(feature = "executor-interrupt")]
compile_error!("`executor-interrupt` is not supported with `arch-std`.");
use super::{raw, Spawner};
#[cfg(feature = "executor-thread")]
pub use thread::*;
#[cfg(feature = "executor-thread")]
mod thread {
use std::marker::PhantomData;
use std::sync::{Condvar, Mutex};
/// Single-threaded std-based executor.
pub struct Executor {
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
signaler: &'static Signaler,
}
#[cfg(feature = "nightly")]
pub use embassy_macros::main_std as main;
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
let signaler = &*Box::leak(Box::new(Signaler::new()));
Self {
inner: raw::Executor::new(
|p| unsafe {
let s = &*(p as *const () as *const Signaler);
s.signal()
},
signaler as *const _ as _,
),
not_send: PhantomData,
signaler,
use crate::raw::{Pender, PenderInner};
use crate::{raw, Spawner};
#[derive(Copy, Clone)]
pub(crate) struct ThreadPender(&'static Signaler);
impl ThreadPender {
#[allow(unused)]
pub(crate) fn pend(self) {
self.0.signal()
}
}
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
///
/// This function never returns.
pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
init(self.inner.spawner());
loop {
unsafe { self.inner.poll() };
self.signaler.wait()
}
/// Single-threaded std-based executor.
pub struct Executor {
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
signaler: &'static Signaler,
}
}
struct Signaler {
mutex: Mutex<bool>,
condvar: Condvar,
}
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
let signaler = &*Box::leak(Box::new(Signaler::new()));
Self {
inner: raw::Executor::new(Pender(PenderInner::Thread(ThreadPender(signaler)))),
not_send: PhantomData,
signaler,
}
}
impl Signaler {
fn new() -> Self {
Self {
mutex: Mutex::new(false),
condvar: Condvar::new(),
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
///
/// This function never returns.
pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
init(self.inner.spawner());
loop {
unsafe { self.inner.poll() };
self.signaler.wait()
}
}
}
fn wait(&self) {
let mut signaled = self.mutex.lock().unwrap();
while !*signaled {
signaled = self.condvar.wait(signaled).unwrap();
}
*signaled = false;
struct Signaler {
mutex: Mutex<bool>,
condvar: Condvar,
}
fn signal(&self) {
let mut signaled = self.mutex.lock().unwrap();
*signaled = true;
self.condvar.notify_one();
impl Signaler {
fn new() -> Self {
Self {
mutex: Mutex::new(false),
condvar: Condvar::new(),
}
}
fn wait(&self) {
let mut signaled = self.mutex.lock().unwrap();
while !*signaled {
signaled = self.condvar.wait(signaled).unwrap();
}
*signaled = false;
}
fn signal(&self) {
let mut signaled = self.mutex.lock().unwrap();
*signaled = true;
self.condvar.notify_one();
}
}
}

View File

@ -1,74 +1,88 @@
use core::marker::PhantomData;
#[cfg(feature = "executor-interrupt")]
compile_error!("`executor-interrupt` is not supported with `arch-wasm`.");
use js_sys::Promise;
use wasm_bindgen::prelude::*;
#[cfg(feature = "executor-thread")]
pub use thread::*;
#[cfg(feature = "executor-thread")]
mod thread {
use super::raw::util::UninitCell;
use super::raw::{self};
use super::Spawner;
use core::marker::PhantomData;
/// WASM executor, wasm_bindgen to schedule tasks on the JS event loop.
pub struct Executor {
inner: raw::Executor,
ctx: &'static WasmContext,
not_send: PhantomData<*mut ()>,
}
#[cfg(feature = "nightly")]
pub use embassy_macros::main_wasm as main;
use js_sys::Promise;
use wasm_bindgen::prelude::*;
pub(crate) struct WasmContext {
promise: Promise,
closure: UninitCell<Closure<dyn FnMut(JsValue)>>,
}
use crate::raw::util::UninitCell;
use crate::raw::{Pender, PenderInner};
use crate::{raw, Spawner};
impl WasmContext {
pub fn new() -> Self {
Self {
promise: Promise::resolve(&JsValue::undefined()),
closure: UninitCell::uninit(),
}
/// WASM executor, wasm_bindgen to schedule tasks on the JS event loop.
pub struct Executor {
inner: raw::Executor,
ctx: &'static WasmContext,
not_send: PhantomData<*mut ()>,
}
}
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
let ctx = &*Box::leak(Box::new(WasmContext::new()));
let inner = raw::Executor::new(
|p| unsafe {
let ctx = &*(p as *const () as *const WasmContext);
let _ = ctx.promise.then(ctx.closure.as_mut());
},
ctx as *const _ as _,
);
Self {
inner,
not_send: PhantomData,
ctx,
pub(crate) struct WasmContext {
promise: Promise,
closure: UninitCell<Closure<dyn FnMut(JsValue)>>,
}
#[derive(Copy, Clone)]
pub(crate) struct ThreadPender(&'static WasmContext);
impl ThreadPender {
#[allow(unused)]
pub(crate) fn pend(self) {
let _ = self.0.promise.then(unsafe { self.0.closure.as_mut() });
}
}
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
pub fn start(&'static mut self, init: impl FnOnce(Spawner)) {
unsafe {
let executor = &self.inner;
self.ctx.closure.write(Closure::new(move |_| {
executor.poll();
}));
init(self.inner.spawner());
impl WasmContext {
pub fn new() -> Self {
Self {
promise: Promise::resolve(&JsValue::undefined()),
closure: UninitCell::uninit(),
}
}
}
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
let ctx = &*Box::leak(Box::new(WasmContext::new()));
Self {
inner: raw::Executor::new(Pender(PenderInner::Thread(ThreadPender(ctx)))),
not_send: PhantomData,
ctx,
}
}
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
pub fn start(&'static mut self, init: impl FnOnce(Spawner)) {
unsafe {
let executor = &self.inner;
self.ctx.closure.write(Closure::new(move |_| {
executor.poll();
}));
init(self.inner.spawner());
}
}
}
}

View File

@ -1,66 +1,84 @@
use core::marker::PhantomData;
use core::ptr;
#[cfg(feature = "executor-interrupt")]
compile_error!("`executor-interrupt` is not supported with `arch-xtensa`.");
use atomic_polyfill::{AtomicBool, Ordering};
#[cfg(feature = "executor-thread")]
pub use thread::*;
#[cfg(feature = "executor-thread")]
mod thread {
use core::marker::PhantomData;
use core::sync::atomic::{AtomicBool, Ordering};
use super::{raw, Spawner};
use crate::raw::{Pender, PenderInner};
use crate::{raw, Spawner};
/// global atomic used to keep track of whether there is work to do since sev() is not available on Xtensa
///
static SIGNAL_WORK_THREAD_MODE: AtomicBool = AtomicBool::new(false);
#[derive(Copy, Clone)]
pub(crate) struct ThreadPender;
/// Xtensa Executor
pub struct Executor {
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
}
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
Self {
// use Signal_Work_Thread_Mode as substitute for local interrupt register
inner: raw::Executor::new(
|_| {
SIGNAL_WORK_THREAD_MODE.store(true, Ordering::SeqCst);
},
ptr::null_mut(),
),
not_send: PhantomData,
impl ThreadPender {
#[allow(unused)]
pub(crate) fn pend(self) {
SIGNAL_WORK_THREAD_MODE.store(true, core::sync::atomic::Ordering::SeqCst);
}
}
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
///
/// This function never returns.
pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
init(self.inner.spawner());
/// global atomic used to keep track of whether there is work to do since sev() is not available on Xtensa
static SIGNAL_WORK_THREAD_MODE: AtomicBool = AtomicBool::new(false);
loop {
unsafe {
self.inner.poll();
// we do not care about race conditions between the load and store operations, interrupts
// will only set this value to true.
// if there is work to do, loop back to polling
// TODO can we relax this?
critical_section::with(|_| {
/// Xtensa Executor
pub struct Executor {
inner: raw::Executor,
not_send: PhantomData<*mut ()>,
}
impl Executor {
/// Create a new Executor.
pub fn new() -> Self {
Self {
inner: raw::Executor::new(Pender(PenderInner::Thread(ThreadPender))),
not_send: PhantomData,
}
}
/// Run the executor.
///
/// The `init` closure is called with a [`Spawner`] that spawns tasks on
/// this executor. Use it to spawn the initial task(s). After `init` returns,
/// the executor starts running the tasks.
///
/// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is `Copy`),
/// for example by passing it as an argument to the initial tasks.
///
/// This function requires `&'static mut self`. This means you have to store the
/// Executor instance in a place where it'll live forever and grants you mutable
/// access. There's a few ways to do this:
///
/// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
/// - a `static mut` (unsafe)
/// - a local variable in a function you know never returns (like `fn main() -> !`), upgrading its lifetime with `transmute`. (unsafe)
///
/// This function never returns.
pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
init(self.inner.spawner());
loop {
unsafe {
self.inner.poll();
// Manual critical section implementation that only masks interrupts handlers.
// We must not acquire the cross-core on dual-core systems because that would
// prevent the other core from doing useful work while this core is sleeping.
let token: critical_section::RawRestoreState;
core::arch::asm!("rsil {0}, 5", out(reg) token);
// we do not care about race conditions between the load and store operations, interrupts
// will only set this value to true.
// if there is work to do, loop back to polling
if SIGNAL_WORK_THREAD_MODE.load(Ordering::SeqCst) {
SIGNAL_WORK_THREAD_MODE.store(false, Ordering::SeqCst);
core::arch::asm!(
"wsr.ps {0}",
"rsync", in(reg) token)
} else {
// waiti sets the PS.INTLEVEL when slipping into sleep
// because critical sections in Xtensa are implemented via increasing
@ -68,7 +86,7 @@ impl Executor {
// take care not add code after `waiti` if it needs to be inside the CS
core::arch::asm!("waiti 0"); // critical section ends here
}
});
}
}
}
}

View File

@ -1,5 +1,5 @@
#![cfg_attr(not(any(feature = "std", feature = "wasm")), no_std)]
#![cfg_attr(all(feature = "nightly", target_arch = "xtensa"), feature(asm_experimental_arch))]
#![cfg_attr(not(any(feature = "arch-std", feature = "arch-wasm")), no_std)]
#![cfg_attr(all(feature = "nightly", feature = "arch-xtensa"), feature(asm_experimental_arch))]
#![allow(clippy::new_without_default)]
#![doc = include_str!("../README.md")]
#![warn(missing_docs)]
@ -10,47 +10,43 @@ pub(crate) mod fmt;
#[cfg(feature = "nightly")]
pub use embassy_macros::task;
cfg_if::cfg_if! {
if #[cfg(cortex_m)] {
#[path="arch/cortex_m.rs"]
mod arch;
pub use arch::*;
#[cfg(feature = "nightly")]
pub use embassy_macros::main_cortex_m as main;
}
else if #[cfg(target_arch="riscv32")] {
#[path="arch/riscv32.rs"]
mod arch;
pub use arch::*;
#[cfg(feature = "nightly")]
pub use embassy_macros::main_riscv as main;
}
else if #[cfg(all(target_arch="xtensa", feature = "nightly"))] {
#[path="arch/xtensa.rs"]
mod arch;
pub use arch::*;
}
else if #[cfg(feature="wasm")] {
#[path="arch/wasm.rs"]
mod arch;
pub use arch::*;
#[cfg(feature = "nightly")]
pub use embassy_macros::main_wasm as main;
}
else if #[cfg(feature="std")] {
#[path="arch/std.rs"]
mod arch;
pub use arch::*;
#[cfg(feature = "nightly")]
pub use embassy_macros::main_std as main;
}
macro_rules! check_at_most_one {
(@amo [$($feats:literal)*] [] [$($res:tt)*]) => {
#[cfg(any($($res)*))]
compile_error!(concat!("At most one of these features can be enabled at the same time:", $(" `", $feats, "`",)*));
};
(@amo $feats:tt [$curr:literal $($rest:literal)*] [$($res:tt)*]) => {
check_at_most_one!(@amo $feats [$($rest)*] [$($res)* $(all(feature=$curr, feature=$rest),)*]);
};
($($f:literal),*$(,)?) => {
check_at_most_one!(@amo [$($f)*] [$($f)*] []);
};
}
check_at_most_one!("arch-cortex-m", "arch-riscv32", "arch-xtensa", "arch-std", "arch-wasm",);
#[cfg(feature = "_arch")]
#[cfg_attr(feature = "arch-cortex-m", path = "arch/cortex_m.rs")]
#[cfg_attr(feature = "arch-riscv32", path = "arch/riscv32.rs")]
#[cfg_attr(feature = "arch-xtensa", path = "arch/xtensa.rs")]
#[cfg_attr(feature = "arch-std", path = "arch/std.rs")]
#[cfg_attr(feature = "arch-wasm", path = "arch/wasm.rs")]
mod arch;
#[cfg(feature = "_arch")]
pub use arch::*;
pub mod raw;
mod spawner;
pub use spawner::*;
/// Implementation details for embassy macros.
/// Do not use. Used for macros and HALs only. Not covered by semver guarantees.
#[doc(hidden)]
/// Implementation details for embassy macros. DO NOT USE.
pub mod export {
pub mod _export {
#[cfg(feature = "rtos-trace")]
pub use rtos_trace::trace;
pub use static_cell::StaticCell;
/// Expands the given block of code when `embassy-executor` is compiled with
/// the `rtos-trace-interrupt` feature.
@ -70,14 +66,3 @@ pub mod export {
($($tt:tt)*) => {};
}
}
pub mod raw;
mod spawner;
pub use spawner::*;
/// Do not use. Used for macros and HALs only. Not covered by semver guarantees.
#[doc(hidden)]
pub mod _export {
pub use static_cell::StaticCell;
}

View File

@ -11,17 +11,17 @@ mod run_queue;
#[cfg(feature = "integrated-timers")]
mod timer_queue;
pub(crate) mod util;
#[cfg_attr(feature = "turbowakers", path = "waker_turbo.rs")]
mod waker;
use core::cell::Cell;
use core::future::Future;
use core::marker::PhantomData;
use core::mem;
use core::pin::Pin;
use core::ptr::NonNull;
use core::task::{Context, Poll};
use core::{mem, ptr};
use atomic_polyfill::{AtomicU32, Ordering};
use critical_section::CriticalSection;
#[cfg(feature = "integrated-timers")]
use embassy_time::driver::{self, AlarmHandle};
#[cfg(feature = "integrated-timers")]
@ -30,7 +30,7 @@ use embassy_time::Instant;
use rtos_trace::trace;
use self::run_queue::{RunQueue, RunQueueItem};
use self::util::UninitCell;
use self::util::{SyncUnsafeCell, UninitCell};
pub use self::waker::task_from_waker;
use super::SpawnToken;
@ -43,35 +43,49 @@ pub(crate) const STATE_RUN_QUEUED: u32 = 1 << 1;
pub(crate) const STATE_TIMER_QUEUED: u32 = 1 << 2;
/// Raw task header for use in task pointers.
///
/// This is an opaque struct, used for raw pointers to tasks, for use
/// with funtions like [`wake_task`] and [`task_from_waker`].
pub struct TaskHeader {
pub(crate) struct TaskHeader {
pub(crate) state: AtomicU32,
pub(crate) run_queue_item: RunQueueItem,
pub(crate) executor: Cell<*const Executor>, // Valid if state != 0
pub(crate) poll_fn: UninitCell<unsafe fn(NonNull<TaskHeader>)>, // Valid if STATE_SPAWNED
pub(crate) executor: SyncUnsafeCell<Option<&'static SyncExecutor>>,
poll_fn: SyncUnsafeCell<Option<unsafe fn(TaskRef)>>,
#[cfg(feature = "integrated-timers")]
pub(crate) expires_at: Cell<Instant>,
pub(crate) expires_at: SyncUnsafeCell<Instant>,
#[cfg(feature = "integrated-timers")]
pub(crate) timer_queue_item: timer_queue::TimerQueueItem,
}
impl TaskHeader {
pub(crate) const fn new() -> Self {
Self {
state: AtomicU32::new(0),
run_queue_item: RunQueueItem::new(),
executor: Cell::new(ptr::null()),
poll_fn: UninitCell::uninit(),
/// This is essentially a `&'static TaskStorage<F>` where the type of the future has been erased.
#[derive(Clone, Copy)]
pub struct TaskRef {
ptr: NonNull<TaskHeader>,
}
#[cfg(feature = "integrated-timers")]
expires_at: Cell::new(Instant::from_ticks(0)),
#[cfg(feature = "integrated-timers")]
timer_queue_item: timer_queue::TimerQueueItem::new(),
unsafe impl Send for TaskRef where &'static TaskHeader: Send {}
unsafe impl Sync for TaskRef where &'static TaskHeader: Sync {}
impl TaskRef {
fn new<F: Future + 'static>(task: &'static TaskStorage<F>) -> Self {
Self {
ptr: NonNull::from(task).cast(),
}
}
/// Safety: The pointer must have been obtained with `Task::as_ptr`
pub(crate) unsafe fn from_ptr(ptr: *const TaskHeader) -> Self {
Self {
ptr: NonNull::new_unchecked(ptr as *mut TaskHeader),
}
}
pub(crate) fn header(self) -> &'static TaskHeader {
unsafe { self.ptr.as_ref() }
}
/// The returned pointer is valid for the entire TaskStorage.
pub(crate) fn as_ptr(self) -> *const TaskHeader {
self.ptr.as_ptr()
}
}
/// Raw storage in which a task can be spawned.
@ -101,7 +115,18 @@ impl<F: Future + 'static> TaskStorage<F> {
/// Create a new TaskStorage, in not-spawned state.
pub const fn new() -> Self {
Self {
raw: TaskHeader::new(),
raw: TaskHeader {
state: AtomicU32::new(0),
run_queue_item: RunQueueItem::new(),
executor: SyncUnsafeCell::new(None),
// Note: this is lazily initialized so that a static `TaskStorage` will go in `.bss`
poll_fn: SyncUnsafeCell::new(None),
#[cfg(feature = "integrated-timers")]
expires_at: SyncUnsafeCell::new(Instant::from_ticks(0)),
#[cfg(feature = "integrated-timers")]
timer_queue_item: timer_queue::TimerQueueItem::new(),
},
future: UninitCell::uninit(),
}
}
@ -120,29 +145,17 @@ impl<F: Future + 'static> TaskStorage<F> {
/// Once the task has finished running, you may spawn it again. It is allowed to spawn it
/// on a different executor.
pub fn spawn(&'static self, future: impl FnOnce() -> F) -> SpawnToken<impl Sized> {
if self.spawn_mark_used() {
return unsafe { SpawnToken::<F>::new(self.spawn_initialize(future)) };
let task = AvailableTask::claim(self);
match task {
Some(task) => {
let task = task.initialize(future);
unsafe { SpawnToken::<F>::new(task) }
}
None => SpawnToken::new_failed(),
}
SpawnToken::<F>::new_failed()
}
fn spawn_mark_used(&'static self) -> bool {
let state = STATE_SPAWNED | STATE_RUN_QUEUED;
self.raw
.state
.compare_exchange(0, state, Ordering::AcqRel, Ordering::Acquire)
.is_ok()
}
unsafe fn spawn_initialize(&'static self, future: impl FnOnce() -> F) -> NonNull<TaskHeader> {
// Initialize the task
self.raw.poll_fn.write(Self::poll);
self.future.write(future());
NonNull::new_unchecked(self as *const TaskStorage<F> as *const TaskHeader as *mut TaskHeader)
}
unsafe fn poll(p: NonNull<TaskHeader>) {
unsafe fn poll(p: TaskRef) {
let this = &*(p.as_ptr() as *const TaskStorage<F>);
let future = Pin::new_unchecked(this.future.as_mut());
@ -160,9 +173,37 @@ impl<F: Future + 'static> TaskStorage<F> {
// it's a noop for our waker.
mem::forget(waker);
}
#[doc(hidden)]
#[allow(dead_code)]
fn _assert_sync(self) {
fn assert_sync<T: Sync>(_: T) {}
assert_sync(self)
}
}
unsafe impl<F: Future + 'static> Sync for TaskStorage<F> {}
struct AvailableTask<F: Future + 'static> {
task: &'static TaskStorage<F>,
}
impl<F: Future + 'static> AvailableTask<F> {
fn claim(task: &'static TaskStorage<F>) -> Option<Self> {
task.raw
.state
.compare_exchange(0, STATE_SPAWNED | STATE_RUN_QUEUED, Ordering::AcqRel, Ordering::Acquire)
.ok()
.map(|_| Self { task })
}
fn initialize(self, future: impl FnOnce() -> F) -> TaskRef {
unsafe {
self.task.raw.poll_fn.set(Some(TaskStorage::<F>::poll));
self.task.future.write(future());
}
TaskRef::new(self.task)
}
}
/// Raw storage that can hold up to N tasks of the same type.
///
@ -187,13 +228,14 @@ impl<F: Future + 'static, const N: usize> TaskPool<F, N> {
/// is currently free. If none is free, a "poisoned" SpawnToken is returned,
/// which will cause [`Spawner::spawn()`](super::Spawner::spawn) to return the error.
pub fn spawn(&'static self, future: impl FnOnce() -> F) -> SpawnToken<impl Sized> {
for task in &self.pool {
if task.spawn_mark_used() {
return unsafe { SpawnToken::<F>::new(task.spawn_initialize(future)) };
let task = self.pool.iter().find_map(AvailableTask::claim);
match task {
Some(task) => {
let task = task.initialize(future);
unsafe { SpawnToken::<F>::new(task) }
}
None => SpawnToken::new_failed(),
}
SpawnToken::<F>::new_failed()
}
/// Like spawn(), but allows the task to be send-spawned if the args are Send even if
@ -235,39 +277,71 @@ impl<F: Future + 'static, const N: usize> TaskPool<F, N> {
// This ONLY holds for `async fn` futures. The other `spawn` methods can be called directly
// by the user, with arbitrary hand-implemented futures. This is why these return `SpawnToken<F>`.
for task in &self.pool {
if task.spawn_mark_used() {
return SpawnToken::<FutFn>::new(task.spawn_initialize(future));
let task = self.pool.iter().find_map(AvailableTask::claim);
match task {
Some(task) => {
let task = task.initialize(future);
unsafe { SpawnToken::<FutFn>::new(task) }
}
None => SpawnToken::new_failed(),
}
SpawnToken::<FutFn>::new_failed()
}
}
/// Raw executor.
#[derive(Clone, Copy)]
pub(crate) enum PenderInner {
#[cfg(feature = "executor-thread")]
Thread(crate::arch::ThreadPender),
#[cfg(feature = "executor-interrupt")]
Interrupt(crate::arch::InterruptPender),
#[cfg(feature = "pender-callback")]
Callback { func: fn(*mut ()), context: *mut () },
}
unsafe impl Send for PenderInner {}
unsafe impl Sync for PenderInner {}
/// Platform/architecture-specific action executed when an executor has pending work.
///
/// This is the core of the Embassy executor. It is low-level, requiring manual
/// handling of wakeups and task polling. If you can, prefer using one of the
/// [higher level executors](crate::Executor).
/// When a task within an executor is woken, the `Pender` is called. This does a
/// platform/architecture-specific action to signal there is pending work in the executor.
/// When this happens, you must arrange for [`Executor::poll`] to be called.
///
/// The raw executor leaves it up to you to handle wakeups and scheduling:
///
/// - To get the executor to do work, call `poll()`. This will poll all queued tasks (all tasks
/// that "want to run").
/// - You must supply a `signal_fn`. The executor will call it to notify you it has work
/// to do. You must arrange for `poll()` to be called as soon as possible.
///
/// `signal_fn` can be called from *any* context: any thread, any interrupt priority
/// level, etc. It may be called synchronously from any `Executor` method call as well.
/// You must deal with this correctly.
///
/// In particular, you must NOT call `poll` directly from `signal_fn`, as this violates
/// the requirement for `poll` to not be called reentrantly.
pub struct Executor {
/// You can think of it as a waker, but for the whole executor.
pub struct Pender(pub(crate) PenderInner);
impl Pender {
/// Create a `Pender` that will call an arbitrary function pointer.
///
/// # Arguments
///
/// - `func`: The function pointer to call.
/// - `context`: Opaque context pointer, that will be passed to the function pointer.
#[cfg(feature = "pender-callback")]
pub fn new_from_callback(func: fn(*mut ()), context: *mut ()) -> Self {
Self(PenderInner::Callback {
func,
context: context.into(),
})
}
}
impl Pender {
pub(crate) fn pend(&self) {
match self.0 {
#[cfg(feature = "executor-thread")]
PenderInner::Thread(x) => x.pend(),
#[cfg(feature = "executor-interrupt")]
PenderInner::Interrupt(x) => x.pend(),
#[cfg(feature = "pender-callback")]
PenderInner::Callback { func, context } => func(context),
}
}
}
pub(crate) struct SyncExecutor {
run_queue: RunQueue,
signal_fn: fn(*mut ()),
signal_ctx: *mut (),
pender: Pender,
#[cfg(feature = "integrated-timers")]
pub(crate) timer_queue: timer_queue::TimerQueue,
@ -275,23 +349,14 @@ pub struct Executor {
alarm: AlarmHandle,
}
impl Executor {
/// Create a new executor.
///
/// When the executor has work to do, it will call `signal_fn` with
/// `signal_ctx` as argument.
///
/// See [`Executor`] docs for details on `signal_fn`.
pub fn new(signal_fn: fn(*mut ()), signal_ctx: *mut ()) -> Self {
impl SyncExecutor {
pub(crate) fn new(pender: Pender) -> Self {
#[cfg(feature = "integrated-timers")]
let alarm = unsafe { unwrap!(driver::allocate_alarm()) };
#[cfg(feature = "integrated-timers")]
driver::set_alarm_callback(alarm, signal_fn, signal_ctx);
Self {
run_queue: RunQueue::new(),
signal_fn,
signal_ctx,
pender,
#[cfg(feature = "integrated-timers")]
timer_queue: timer_queue::TimerQueue::new(),
@ -307,59 +372,44 @@ impl Executor {
/// - `task` must be set up to run in this executor.
/// - `task` must NOT be already enqueued (in this executor or another one).
#[inline(always)]
unsafe fn enqueue(&self, cs: CriticalSection, task: NonNull<TaskHeader>) {
unsafe fn enqueue(&self, task: TaskRef) {
#[cfg(feature = "rtos-trace")]
trace::task_ready_begin(task.as_ptr() as u32);
if self.run_queue.enqueue(cs, task) {
(self.signal_fn)(self.signal_ctx)
if self.run_queue.enqueue(task) {
self.pender.pend();
}
}
/// Spawn a task in this executor.
///
/// # Safety
///
/// `task` must be a valid pointer to an initialized but not-already-spawned task.
///
/// It is OK to use `unsafe` to call this from a thread that's not the executor thread.
/// In this case, the task's Future must be Send. This is because this is effectively
/// sending the task to the executor thread.
pub(super) unsafe fn spawn(&'static self, task: NonNull<TaskHeader>) {
task.as_ref().executor.set(self);
#[cfg(feature = "integrated-timers")]
fn alarm_callback(ctx: *mut ()) {
let this: &Self = unsafe { &*(ctx as *const Self) };
this.pender.pend();
}
pub(super) unsafe fn spawn(&'static self, task: TaskRef) {
task.header().executor.set(Some(self));
#[cfg(feature = "rtos-trace")]
trace::task_new(task.as_ptr() as u32);
critical_section::with(|cs| {
self.enqueue(cs, task);
})
self.enqueue(task);
}
/// Poll all queued tasks in this executor.
///
/// This loops over all tasks that are queued to be polled (i.e. they're
/// freshly spawned or they've been woken). Other tasks are not polled.
///
/// You must call `poll` after receiving a call to `signal_fn`. It is OK
/// to call `poll` even when not requested by `signal_fn`, but it wastes
/// energy.
///
/// # Safety
///
/// You must NOT call `poll` reentrantly on the same executor.
///
/// In particular, note that `poll` may call `signal_fn` synchronously. Therefore, you
/// must NOT directly call `poll()` from your `signal_fn`. Instead, `signal_fn` has to
/// somehow schedule for `poll()` to be called later, at a time you know for sure there's
/// no `poll()` already running.
pub unsafe fn poll(&'static self) {
/// Same as [`Executor::poll`], plus you must only call this on the thread this executor was created.
pub(crate) unsafe fn poll(&'static self) {
#[cfg(feature = "integrated-timers")]
driver::set_alarm_callback(self.alarm, Self::alarm_callback, self as *const _ as *mut ());
#[allow(clippy::never_loop)]
loop {
#[cfg(feature = "integrated-timers")]
self.timer_queue.dequeue_expired(Instant::now(), |task| wake_task(task));
self.run_queue.dequeue_all(|p| {
let task = p.as_ref();
let task = p.header();
#[cfg(feature = "integrated-timers")]
task.expires_at.set(Instant::MAX);
@ -378,7 +428,7 @@ impl Executor {
trace::task_exec_begin(p.as_ptr() as u32);
// Run the task
task.poll_fn.read()(p as _);
task.poll_fn.get().unwrap_unchecked()(p);
#[cfg(feature = "rtos-trace")]
trace::task_exec_end();
@ -407,6 +457,84 @@ impl Executor {
#[cfg(feature = "rtos-trace")]
trace::system_idle();
}
}
/// Raw executor.
///
/// This is the core of the Embassy executor. It is low-level, requiring manual
/// handling of wakeups and task polling. If you can, prefer using one of the
/// [higher level executors](crate::Executor).
///
/// The raw executor leaves it up to you to handle wakeups and scheduling:
///
/// - To get the executor to do work, call `poll()`. This will poll all queued tasks (all tasks
/// that "want to run").
/// - You must supply a [`Pender`]. The executor will call it to notify you it has work
/// to do. You must arrange for `poll()` to be called as soon as possible.
///
/// The [`Pender`] can be called from *any* context: any thread, any interrupt priority
/// level, etc. It may be called synchronously from any `Executor` method call as well.
/// You must deal with this correctly.
///
/// In particular, you must NOT call `poll` directly from the pender callback, as this violates
/// the requirement for `poll` to not be called reentrantly.
#[repr(transparent)]
pub struct Executor {
pub(crate) inner: SyncExecutor,
_not_sync: PhantomData<*mut ()>,
}
impl Executor {
pub(crate) unsafe fn wrap(inner: &SyncExecutor) -> &Self {
mem::transmute(inner)
}
/// Create a new executor.
///
/// When the executor has work to do, it will call the [`Pender`].
///
/// See [`Executor`] docs for details on `Pender`.
pub fn new(pender: Pender) -> Self {
Self {
inner: SyncExecutor::new(pender),
_not_sync: PhantomData,
}
}
/// Spawn a task in this executor.
///
/// # Safety
///
/// `task` must be a valid pointer to an initialized but not-already-spawned task.
///
/// It is OK to use `unsafe` to call this from a thread that's not the executor thread.
/// In this case, the task's Future must be Send. This is because this is effectively
/// sending the task to the executor thread.
pub(super) unsafe fn spawn(&'static self, task: TaskRef) {
self.inner.spawn(task)
}
/// Poll all queued tasks in this executor.
///
/// This loops over all tasks that are queued to be polled (i.e. they're
/// freshly spawned or they've been woken). Other tasks are not polled.
///
/// You must call `poll` after receiving a call to the [`Pender`]. It is OK
/// to call `poll` even when not requested by the `Pender`, but it wastes
/// energy.
///
/// # Safety
///
/// You must NOT call `poll` reentrantly on the same executor.
///
/// In particular, note that `poll` may call the `Pender` synchronously. Therefore, you
/// must NOT directly call `poll()` from the `Pender` callback. Instead, the callback has to
/// somehow schedule for `poll()` to be called later, at a time you know for sure there's
/// no `poll()` already running.
pub unsafe fn poll(&'static self) {
self.inner.poll()
}
/// Get a spawner that spawns tasks in this executor.
///
@ -417,30 +545,29 @@ impl Executor {
}
}
/// Wake a task by raw pointer.
/// Wake a task by `TaskRef`.
///
/// You can obtain task pointers from `Waker`s using [`task_from_waker`].
///
/// # Safety
///
/// `task` must be a valid task pointer obtained from [`task_from_waker`].
pub unsafe fn wake_task(task: NonNull<TaskHeader>) {
critical_section::with(|cs| {
let header = task.as_ref();
let state = header.state.load(Ordering::Relaxed);
/// You can obtain a `TaskRef` from a `Waker` using [`task_from_waker`].
pub fn wake_task(task: TaskRef) {
let header = task.header();
let res = header.state.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |state| {
// If already scheduled, or if not started,
if (state & STATE_RUN_QUEUED != 0) || (state & STATE_SPAWNED == 0) {
return;
None
} else {
// Mark it as scheduled
Some(state | STATE_RUN_QUEUED)
}
});
// Mark it as scheduled
header.state.store(state | STATE_RUN_QUEUED, Ordering::Relaxed);
if res.is_ok() {
// We have just marked the task as scheduled, so enqueue it.
let executor = &*header.executor.get();
executor.enqueue(cs, task);
})
unsafe {
let executor = header.executor.get().unwrap_unchecked();
executor.enqueue(task);
}
}
}
#[cfg(feature = "integrated-timers")]
@ -450,9 +577,11 @@ struct TimerQueue;
impl embassy_time::queue::TimerQueue for TimerQueue {
fn schedule_wake(&'static self, at: Instant, waker: &core::task::Waker) {
let task = waker::task_from_waker(waker);
let task = unsafe { task.as_ref() };
let expires_at = task.expires_at.get();
task.expires_at.set(expires_at.min(at));
let task = task.header();
unsafe {
let expires_at = task.expires_at.get();
task.expires_at.set(expires_at.min(at));
}
}
}

View File

@ -2,18 +2,18 @@ use core::ptr;
use core::ptr::NonNull;
use atomic_polyfill::{AtomicPtr, Ordering};
use critical_section::CriticalSection;
use super::TaskHeader;
use super::{TaskHeader, TaskRef};
use crate::raw::util::SyncUnsafeCell;
pub(crate) struct RunQueueItem {
next: AtomicPtr<TaskHeader>,
next: SyncUnsafeCell<Option<TaskRef>>,
}
impl RunQueueItem {
pub const fn new() -> Self {
Self {
next: AtomicPtr::new(ptr::null_mut()),
next: SyncUnsafeCell::new(None),
}
}
}
@ -46,29 +46,43 @@ impl RunQueue {
///
/// `item` must NOT be already enqueued in any queue.
#[inline(always)]
pub(crate) unsafe fn enqueue(&self, _cs: CriticalSection, task: NonNull<TaskHeader>) -> bool {
let prev = self.head.load(Ordering::Relaxed);
task.as_ref().run_queue_item.next.store(prev, Ordering::Relaxed);
self.head.store(task.as_ptr(), Ordering::Relaxed);
prev.is_null()
pub(crate) unsafe fn enqueue(&self, task: TaskRef) -> bool {
let mut was_empty = false;
self.head
.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |prev| {
was_empty = prev.is_null();
unsafe {
// safety: the pointer is either null or valid
let prev = NonNull::new(prev).map(|ptr| TaskRef::from_ptr(ptr.as_ptr()));
// safety: there are no concurrent accesses to `next`
task.header().run_queue_item.next.set(prev);
}
Some(task.as_ptr() as *mut _)
})
.ok();
was_empty
}
/// Empty the queue, then call `on_task` for each task that was in the queue.
/// NOTE: It is OK for `on_task` to enqueue more tasks. In this case they're left in the queue
/// and will be processed by the *next* call to `dequeue_all`, *not* the current one.
pub(crate) fn dequeue_all(&self, on_task: impl Fn(NonNull<TaskHeader>)) {
pub(crate) fn dequeue_all(&self, on_task: impl Fn(TaskRef)) {
// Atomically empty the queue.
let mut ptr = self.head.swap(ptr::null_mut(), Ordering::AcqRel);
let ptr = self.head.swap(ptr::null_mut(), Ordering::AcqRel);
// safety: the pointer is either null or valid
let mut next = unsafe { NonNull::new(ptr).map(|ptr| TaskRef::from_ptr(ptr.as_ptr())) };
// Iterate the linked list of tasks that were previously in the queue.
while let Some(task) = NonNull::new(ptr) {
while let Some(task) = next {
// If the task re-enqueues itself, the `next` pointer will get overwritten.
// Therefore, first read the next pointer, and only then process the task.
let next = unsafe { task.as_ref() }.run_queue_item.next.load(Ordering::Relaxed);
// safety: there are no concurrent accesses to `next`
next = unsafe { task.header().run_queue_item.next.get() };
on_task(task);
ptr = next
}
}
}

View File

@ -1,45 +1,43 @@
use core::cell::Cell;
use core::cmp::min;
use core::ptr;
use core::ptr::NonNull;
use atomic_polyfill::Ordering;
use embassy_time::Instant;
use super::{TaskHeader, STATE_TIMER_QUEUED};
use super::{TaskRef, STATE_TIMER_QUEUED};
use crate::raw::util::SyncUnsafeCell;
pub(crate) struct TimerQueueItem {
next: Cell<*mut TaskHeader>,
next: SyncUnsafeCell<Option<TaskRef>>,
}
impl TimerQueueItem {
pub const fn new() -> Self {
Self {
next: Cell::new(ptr::null_mut()),
next: SyncUnsafeCell::new(None),
}
}
}
pub(crate) struct TimerQueue {
head: Cell<*mut TaskHeader>,
head: SyncUnsafeCell<Option<TaskRef>>,
}
impl TimerQueue {
pub const fn new() -> Self {
Self {
head: Cell::new(ptr::null_mut()),
head: SyncUnsafeCell::new(None),
}
}
pub(crate) unsafe fn update(&self, p: NonNull<TaskHeader>) {
let task = p.as_ref();
pub(crate) unsafe fn update(&self, p: TaskRef) {
let task = p.header();
if task.expires_at.get() != Instant::MAX {
let old_state = task.state.fetch_or(STATE_TIMER_QUEUED, Ordering::AcqRel);
let is_new = old_state & STATE_TIMER_QUEUED == 0;
if is_new {
task.timer_queue_item.next.set(self.head.get());
self.head.set(p.as_ptr());
self.head.set(Some(p));
}
}
}
@ -47,7 +45,7 @@ impl TimerQueue {
pub(crate) unsafe fn next_expiration(&self) -> Instant {
let mut res = Instant::MAX;
self.retain(|p| {
let task = p.as_ref();
let task = p.header();
let expires = task.expires_at.get();
res = min(res, expires);
expires != Instant::MAX
@ -55,9 +53,9 @@ impl TimerQueue {
res
}
pub(crate) unsafe fn dequeue_expired(&self, now: Instant, on_task: impl Fn(NonNull<TaskHeader>)) {
pub(crate) unsafe fn dequeue_expired(&self, now: Instant, on_task: impl Fn(TaskRef)) {
self.retain(|p| {
let task = p.as_ref();
let task = p.header();
if task.expires_at.get() <= now {
on_task(p);
false
@ -67,11 +65,10 @@ impl TimerQueue {
});
}
pub(crate) unsafe fn retain(&self, mut f: impl FnMut(NonNull<TaskHeader>) -> bool) {
pub(crate) unsafe fn retain(&self, mut f: impl FnMut(TaskRef) -> bool) {
let mut prev = &self.head;
while !prev.get().is_null() {
let p = NonNull::new_unchecked(prev.get());
let task = &*p.as_ptr();
while let Some(p) = prev.get() {
let task = p.header();
if f(p) {
// Skip to next
prev = &task.timer_queue_item.next;

View File

@ -26,8 +26,31 @@ impl<T> UninitCell<T> {
}
}
impl<T: Copy> UninitCell<T> {
pub unsafe fn read(&self) -> T {
ptr::read(self.as_mut_ptr())
unsafe impl<T> Sync for UninitCell<T> {}
#[repr(transparent)]
pub struct SyncUnsafeCell<T> {
value: UnsafeCell<T>,
}
unsafe impl<T: Sync> Sync for SyncUnsafeCell<T> {}
impl<T> SyncUnsafeCell<T> {
#[inline]
pub const fn new(value: T) -> Self {
Self {
value: UnsafeCell::new(value),
}
}
pub unsafe fn set(&self, value: T) {
*self.value.get() = value;
}
pub unsafe fn get(&self) -> T
where
T: Copy,
{
*self.value.get()
}
}

View File

@ -1,8 +1,7 @@
use core::mem;
use core::ptr::NonNull;
use core::task::{RawWaker, RawWakerVTable, Waker};
use super::{wake_task, TaskHeader};
use super::{wake_task, TaskHeader, TaskRef};
const VTABLE: RawWakerVTable = RawWakerVTable::new(clone, wake, wake, drop);
@ -11,14 +10,14 @@ unsafe fn clone(p: *const ()) -> RawWaker {
}
unsafe fn wake(p: *const ()) {
wake_task(NonNull::new_unchecked(p as *mut TaskHeader))
wake_task(TaskRef::from_ptr(p as *const TaskHeader))
}
unsafe fn drop(_: *const ()) {
// nop
}
pub(crate) unsafe fn from_task(p: NonNull<TaskHeader>) -> Waker {
pub(crate) unsafe fn from_task(p: TaskRef) -> Waker {
Waker::from_raw(RawWaker::new(p.as_ptr() as _, &VTABLE))
}
@ -33,7 +32,7 @@ pub(crate) unsafe fn from_task(p: NonNull<TaskHeader>) -> Waker {
/// # Panics
///
/// Panics if the waker is not created by the Embassy executor.
pub fn task_from_waker(waker: &Waker) -> NonNull<TaskHeader> {
pub fn task_from_waker(waker: &Waker) -> TaskRef {
// safety: OK because WakerHack has the same layout as Waker.
// This is not really guaranteed because the structs are `repr(Rust)`, it is
// indeed the case in the current implementation.
@ -43,8 +42,8 @@ pub fn task_from_waker(waker: &Waker) -> NonNull<TaskHeader> {
panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.")
}
// safety: we never create a waker with a null data pointer.
unsafe { NonNull::new_unchecked(hack.data as *mut TaskHeader) }
// safety: our wakers are always created with `TaskRef::as_ptr`
unsafe { TaskRef::from_ptr(hack.data as *const TaskHeader) }
}
struct WakerHack {

View File

@ -0,0 +1,34 @@
use core::ptr::NonNull;
use core::task::Waker;
use super::{wake_task, TaskHeader, TaskRef};
pub(crate) unsafe fn from_task(p: TaskRef) -> Waker {
Waker::from_turbo_ptr(NonNull::new_unchecked(p.as_ptr() as _))
}
/// Get a task pointer from a waker.
///
/// This can be used as an optimization in wait queues to store task pointers
/// (1 word) instead of full Wakers (2 words). This saves a bit of RAM and helps
/// avoid dynamic dispatch.
///
/// You can use the returned task pointer to wake the task with [`wake_task`](super::wake_task).
///
/// # Panics
///
/// Panics if the waker is not created by the Embassy executor.
pub fn task_from_waker(waker: &Waker) -> TaskRef {
let ptr = waker.as_turbo_ptr().as_ptr();
// safety: our wakers are always created with `TaskRef::as_ptr`
unsafe { TaskRef::from_ptr(ptr as *const TaskHeader) }
}
#[inline(never)]
#[no_mangle]
fn _turbo_wake(ptr: NonNull<()>) {
// safety: our wakers are always created with `TaskRef::as_ptr`
let task = unsafe { TaskRef::from_ptr(ptr.as_ptr() as *const TaskHeader) };
wake_task(task)
}

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